Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Hardware definitions for Compaq iPAQ H3xxx Handheld Computers |
| 3 | * |
| 4 | * Copyright 2000,1 Compaq Computer Corporation. |
| 5 | * |
| 6 | * Use consistent with the GNU GPL is permitted, |
| 7 | * provided that this copyright notice is |
| 8 | * preserved in its entirety in all copies and derived works. |
| 9 | * |
| 10 | * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, |
| 11 | * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS |
| 12 | * FITNESS FOR ANY PARTICULAR PURPOSE. |
| 13 | * |
| 14 | * Author: Jamey Hicks. |
| 15 | * |
| 16 | * History: |
| 17 | * |
| 18 | * 2001-10-?? Andrew Christian Added support for iPAQ H3800 |
| 19 | * and abstracted EGPIO interface. |
| 20 | * |
| 21 | */ |
| 22 | #include <linux/config.h> |
| 23 | #include <linux/module.h> |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/tty.h> |
| 27 | #include <linux/pm.h> |
| 28 | #include <linux/device.h> |
| 29 | #include <linux/mtd/mtd.h> |
| 30 | #include <linux/mtd/partitions.h> |
| 31 | #include <linux/serial_core.h> |
| 32 | |
| 33 | #include <asm/irq.h> |
| 34 | #include <asm/hardware.h> |
| 35 | #include <asm/mach-types.h> |
| 36 | #include <asm/setup.h> |
| 37 | |
| 38 | #include <asm/mach/irq.h> |
| 39 | #include <asm/mach/arch.h> |
| 40 | #include <asm/mach/flash.h> |
| 41 | #include <asm/mach/irda.h> |
| 42 | #include <asm/mach/map.h> |
| 43 | #include <asm/mach/serial_sa1100.h> |
| 44 | |
| 45 | #include <asm/arch/h3600.h> |
| 46 | |
| 47 | #if defined (CONFIG_SA1100_H3600) || defined (CONFIG_SA1100_H3100) |
| 48 | #include <asm/arch/h3600_gpio.h> |
| 49 | #endif |
| 50 | |
| 51 | #ifdef CONFIG_SA1100_H3800 |
| 52 | #include <asm/arch/h3600_asic.h> |
| 53 | #endif |
| 54 | |
| 55 | #include "generic.h" |
| 56 | |
| 57 | struct ipaq_model_ops ipaq_model_ops; |
| 58 | EXPORT_SYMBOL(ipaq_model_ops); |
| 59 | |
| 60 | static struct mtd_partition h3xxx_partitions[] = { |
| 61 | { |
| 62 | .name = "H3XXX boot firmware", |
| 63 | .size = 0x00040000, |
| 64 | .offset = 0, |
| 65 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
| 66 | }, { |
| 67 | #ifdef CONFIG_MTD_2PARTS_IPAQ |
| 68 | .name = "H3XXX root jffs2", |
| 69 | .size = MTDPART_SIZ_FULL, |
| 70 | .offset = 0x00040000, |
| 71 | #else |
| 72 | .name = "H3XXX kernel", |
| 73 | .size = 0x00080000, |
| 74 | .offset = 0x00040000, |
| 75 | }, { |
| 76 | .name = "H3XXX params", |
| 77 | .size = 0x00040000, |
| 78 | .offset = 0x000C0000, |
| 79 | }, { |
| 80 | #ifdef CONFIG_JFFS2_FS |
| 81 | .name = "H3XXX root jffs2", |
| 82 | .size = MTDPART_SIZ_FULL, |
| 83 | .offset = 0x00100000, |
| 84 | #else |
| 85 | .name = "H3XXX initrd", |
| 86 | .size = 0x00100000, |
| 87 | .offset = 0x00100000, |
| 88 | }, { |
| 89 | .name = "H3XXX root cramfs", |
| 90 | .size = 0x00300000, |
| 91 | .offset = 0x00200000, |
| 92 | }, { |
| 93 | .name = "H3XXX usr cramfs", |
| 94 | .size = 0x00800000, |
| 95 | .offset = 0x00500000, |
| 96 | }, { |
| 97 | .name = "H3XXX usr local", |
| 98 | .size = MTDPART_SIZ_FULL, |
| 99 | .offset = 0x00d00000, |
| 100 | #endif |
| 101 | #endif |
| 102 | } |
| 103 | }; |
| 104 | |
| 105 | static void h3xxx_set_vpp(int vpp) |
| 106 | { |
| 107 | assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, vpp); |
| 108 | } |
| 109 | |
| 110 | static struct flash_platform_data h3xxx_flash_data = { |
| 111 | .map_name = "cfi_probe", |
| 112 | .set_vpp = h3xxx_set_vpp, |
| 113 | .parts = h3xxx_partitions, |
| 114 | .nr_parts = ARRAY_SIZE(h3xxx_partitions), |
| 115 | }; |
| 116 | |
| 117 | static struct resource h3xxx_flash_resource = { |
| 118 | .start = SA1100_CS0_PHYS, |
| 119 | .end = SA1100_CS0_PHYS + SZ_32M - 1, |
| 120 | .flags = IORESOURCE_MEM, |
| 121 | }; |
| 122 | |
| 123 | /* |
| 124 | * This turns the IRDA power on or off on the Compaq H3600 |
| 125 | */ |
| 126 | static int h3600_irda_set_power(struct device *dev, unsigned int state) |
| 127 | { |
| 128 | assign_h3600_egpio( IPAQ_EGPIO_IR_ON, state ); |
| 129 | |
| 130 | return 0; |
| 131 | } |
| 132 | |
Russell King | 58c02ec | 2005-04-17 15:40:46 +0100 | [diff] [blame^] | 133 | static void h3600_irda_set_speed(struct device *dev, unsigned int speed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | { |
| 135 | if (speed < 4000000) { |
| 136 | clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL); |
| 137 | } else { |
| 138 | set_h3600_egpio(IPAQ_EGPIO_IR_FSEL); |
| 139 | } |
| 140 | } |
| 141 | |
| 142 | static struct irda_platform_data h3600_irda_data = { |
| 143 | .set_power = h3600_irda_set_power, |
| 144 | .set_speed = h3600_irda_set_speed, |
| 145 | }; |
| 146 | |
| 147 | static void h3xxx_mach_init(void) |
| 148 | { |
| 149 | sa11x0_set_flash_data(&h3xxx_flash_data, &h3xxx_flash_resource, 1); |
| 150 | sa11x0_set_irda_data(&h3600_irda_data); |
| 151 | } |
| 152 | |
| 153 | /* |
| 154 | * low-level UART features |
| 155 | */ |
| 156 | |
| 157 | static void h3600_uart_set_mctrl(struct uart_port *port, u_int mctrl) |
| 158 | { |
| 159 | if (port->mapbase == _Ser3UTCR0) { |
| 160 | if (mctrl & TIOCM_RTS) |
| 161 | GPCR = GPIO_H3600_COM_RTS; |
| 162 | else |
| 163 | GPSR = GPIO_H3600_COM_RTS; |
| 164 | } |
| 165 | } |
| 166 | |
| 167 | static u_int h3600_uart_get_mctrl(struct uart_port *port) |
| 168 | { |
| 169 | u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; |
| 170 | |
| 171 | if (port->mapbase == _Ser3UTCR0) { |
| 172 | int gplr = GPLR; |
| 173 | /* DCD and CTS bits are inverted in GPLR by RS232 transceiver */ |
| 174 | if (gplr & GPIO_H3600_COM_DCD) |
| 175 | ret &= ~TIOCM_CD; |
| 176 | if (gplr & GPIO_H3600_COM_CTS) |
| 177 | ret &= ~TIOCM_CTS; |
| 178 | } |
| 179 | |
| 180 | return ret; |
| 181 | } |
| 182 | |
| 183 | static void h3600_uart_pm(struct uart_port *port, u_int state, u_int oldstate) |
| 184 | { |
| 185 | if (port->mapbase == _Ser2UTCR0) { /* TODO: REMOVE THIS */ |
| 186 | assign_h3600_egpio(IPAQ_EGPIO_IR_ON, !state); |
| 187 | } else if (port->mapbase == _Ser3UTCR0) { |
| 188 | assign_h3600_egpio(IPAQ_EGPIO_RS232_ON, !state); |
| 189 | } |
| 190 | } |
| 191 | |
| 192 | /* |
| 193 | * Enable/Disable wake up events for this serial port. |
| 194 | * Obviously, we only support this on the normal COM port. |
| 195 | */ |
| 196 | static int h3600_uart_set_wake(struct uart_port *port, u_int enable) |
| 197 | { |
| 198 | int err = -EINVAL; |
| 199 | |
| 200 | if (port->mapbase == _Ser3UTCR0) { |
| 201 | if (enable) |
| 202 | PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */ |
| 203 | else |
| 204 | PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */ |
| 205 | err = 0; |
| 206 | } |
| 207 | return err; |
| 208 | } |
| 209 | |
| 210 | static struct sa1100_port_fns h3600_port_fns __initdata = { |
| 211 | .set_mctrl = h3600_uart_set_mctrl, |
| 212 | .get_mctrl = h3600_uart_get_mctrl, |
| 213 | .pm = h3600_uart_pm, |
| 214 | .set_wake = h3600_uart_set_wake, |
| 215 | }; |
| 216 | |
| 217 | /* |
| 218 | * helper for sa1100fb |
| 219 | */ |
| 220 | static void h3xxx_lcd_power(int enable) |
| 221 | { |
| 222 | assign_h3600_egpio(IPAQ_EGPIO_LCD_POWER, enable); |
| 223 | } |
| 224 | |
| 225 | static struct map_desc h3600_io_desc[] __initdata = { |
| 226 | /* virtual physical length type */ |
| 227 | { H3600_BANK_2_VIRT, SA1100_CS2_PHYS, 0x02800000, MT_DEVICE }, /* static memory bank 2 CS#2 */ |
| 228 | { H3600_BANK_4_VIRT, SA1100_CS4_PHYS, 0x00800000, MT_DEVICE }, /* static memory bank 4 CS#4 */ |
| 229 | { H3600_EGPIO_VIRT, H3600_EGPIO_PHYS, 0x01000000, MT_DEVICE }, /* EGPIO 0 CS#5 */ |
| 230 | }; |
| 231 | |
| 232 | /* |
| 233 | * Common map_io initialization |
| 234 | */ |
| 235 | |
| 236 | static void __init h3xxx_map_io(void) |
| 237 | { |
| 238 | sa1100_map_io(); |
| 239 | iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc)); |
| 240 | |
| 241 | sa1100_register_uart_fns(&h3600_port_fns); |
| 242 | sa1100_register_uart(0, 3); /* Common serial port */ |
| 243 | // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */ |
| 244 | |
| 245 | /* Ensure those pins are outputs and driving low */ |
| 246 | PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; |
| 247 | PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); |
| 248 | |
| 249 | /* Configure suspend conditions */ |
| 250 | PGSR = 0; |
| 251 | PWER = PWER_GPIO0 | PWER_RTC; |
| 252 | PCFR = PCFR_OPDE; |
| 253 | PSDR = 0; |
| 254 | |
| 255 | sa1100fb_lcd_power = h3xxx_lcd_power; |
| 256 | } |
| 257 | |
| 258 | static __inline__ void do_blank(int setp) |
| 259 | { |
| 260 | if (ipaq_model_ops.blank_callback) |
| 261 | ipaq_model_ops.blank_callback(1-setp); |
| 262 | } |
| 263 | |
| 264 | /************************* H3100 *************************/ |
| 265 | |
| 266 | #ifdef CONFIG_SA1100_H3100 |
| 267 | |
| 268 | #define H3100_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT) |
| 269 | static unsigned int h3100_egpio = 0; |
| 270 | |
| 271 | static void h3100_control_egpio(enum ipaq_egpio_type x, int setp) |
| 272 | { |
| 273 | unsigned int egpio = 0; |
| 274 | long gpio = 0; |
| 275 | unsigned long flags; |
| 276 | |
| 277 | switch (x) { |
| 278 | case IPAQ_EGPIO_LCD_POWER: |
| 279 | egpio |= EGPIO_H3600_LCD_ON; |
| 280 | gpio |= GPIO_H3100_LCD_3V_ON; |
| 281 | do_blank(setp); |
| 282 | break; |
| 283 | case IPAQ_EGPIO_LCD_ENABLE: |
| 284 | break; |
| 285 | case IPAQ_EGPIO_CODEC_NRESET: |
| 286 | egpio |= EGPIO_H3600_CODEC_NRESET; |
| 287 | break; |
| 288 | case IPAQ_EGPIO_AUDIO_ON: |
| 289 | gpio |= GPIO_H3100_AUD_PWR_ON |
| 290 | | GPIO_H3100_AUD_ON; |
| 291 | break; |
| 292 | case IPAQ_EGPIO_QMUTE: |
| 293 | gpio |= GPIO_H3100_QMUTE; |
| 294 | break; |
| 295 | case IPAQ_EGPIO_OPT_NVRAM_ON: |
| 296 | egpio |= EGPIO_H3600_OPT_NVRAM_ON; |
| 297 | break; |
| 298 | case IPAQ_EGPIO_OPT_ON: |
| 299 | egpio |= EGPIO_H3600_OPT_ON; |
| 300 | break; |
| 301 | case IPAQ_EGPIO_CARD_RESET: |
| 302 | egpio |= EGPIO_H3600_CARD_RESET; |
| 303 | break; |
| 304 | case IPAQ_EGPIO_OPT_RESET: |
| 305 | egpio |= EGPIO_H3600_OPT_RESET; |
| 306 | break; |
| 307 | case IPAQ_EGPIO_IR_ON: |
| 308 | gpio |= GPIO_H3100_IR_ON; |
| 309 | break; |
| 310 | case IPAQ_EGPIO_IR_FSEL: |
| 311 | gpio |= GPIO_H3100_IR_FSEL; |
| 312 | break; |
| 313 | case IPAQ_EGPIO_RS232_ON: |
| 314 | egpio |= EGPIO_H3600_RS232_ON; |
| 315 | break; |
| 316 | case IPAQ_EGPIO_VPP_ON: |
| 317 | egpio |= EGPIO_H3600_VPP_ON; |
| 318 | break; |
| 319 | } |
| 320 | |
| 321 | if (egpio || gpio) { |
| 322 | local_irq_save(flags); |
| 323 | if (setp) { |
| 324 | h3100_egpio |= egpio; |
| 325 | GPSR = gpio; |
| 326 | } else { |
| 327 | h3100_egpio &= ~egpio; |
| 328 | GPCR = gpio; |
| 329 | } |
| 330 | H3100_EGPIO = h3100_egpio; |
| 331 | local_irq_restore(flags); |
| 332 | } |
| 333 | } |
| 334 | |
| 335 | static unsigned long h3100_read_egpio(void) |
| 336 | { |
| 337 | return h3100_egpio; |
| 338 | } |
| 339 | |
| 340 | static int h3100_pm_callback(int req) |
| 341 | { |
| 342 | if (ipaq_model_ops.pm_callback_aux) |
| 343 | return ipaq_model_ops.pm_callback_aux(req); |
| 344 | return 0; |
| 345 | } |
| 346 | |
| 347 | static struct ipaq_model_ops h3100_model_ops __initdata = { |
| 348 | .generic_name = "3100", |
| 349 | .control = h3100_control_egpio, |
| 350 | .read = h3100_read_egpio, |
| 351 | .pm_callback = h3100_pm_callback |
| 352 | }; |
| 353 | |
| 354 | #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \ |
| 355 | | GPIO_H3100_GPIO3 \ |
| 356 | | GPIO_H3100_QMUTE \ |
| 357 | | GPIO_H3100_LCD_3V_ON \ |
| 358 | | GPIO_H3100_AUD_ON \ |
| 359 | | GPIO_H3100_AUD_PWR_ON \ |
| 360 | | GPIO_H3100_IR_ON \ |
| 361 | | GPIO_H3100_IR_FSEL) |
| 362 | |
| 363 | static void __init h3100_map_io(void) |
| 364 | { |
| 365 | h3xxx_map_io(); |
| 366 | |
| 367 | /* Initialize h3100-specific values here */ |
| 368 | GPCR = 0x0fffffff; /* All outputs are set low by default */ |
| 369 | GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | |
| 370 | GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | |
| 371 | GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 | |
| 372 | H3100_DIRECT_EGPIO; |
| 373 | |
| 374 | /* Older bootldrs put GPIO2-9 in alternate mode on the |
| 375 | assumption that they are used for video */ |
| 376 | GAFR &= ~H3100_DIRECT_EGPIO; |
| 377 | |
| 378 | H3100_EGPIO = h3100_egpio; |
| 379 | ipaq_model_ops = h3100_model_ops; |
| 380 | } |
| 381 | |
| 382 | MACHINE_START(H3100, "Compaq iPAQ H3100") |
| 383 | BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000) |
| 384 | BOOT_PARAMS(0xc0000100) |
| 385 | MAPIO(h3100_map_io) |
| 386 | INITIRQ(sa1100_init_irq) |
| 387 | .timer = &sa1100_timer, |
| 388 | .init_machine = h3xxx_mach_init, |
| 389 | MACHINE_END |
| 390 | |
| 391 | #endif /* CONFIG_SA1100_H3100 */ |
| 392 | |
| 393 | /************************* H3600 *************************/ |
| 394 | |
| 395 | #ifdef CONFIG_SA1100_H3600 |
| 396 | |
| 397 | #define H3600_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT) |
| 398 | static unsigned int h3600_egpio = EGPIO_H3600_RS232_ON; |
| 399 | |
| 400 | static void h3600_control_egpio(enum ipaq_egpio_type x, int setp) |
| 401 | { |
| 402 | unsigned int egpio = 0; |
| 403 | unsigned long flags; |
| 404 | |
| 405 | switch (x) { |
| 406 | case IPAQ_EGPIO_LCD_POWER: |
| 407 | egpio |= EGPIO_H3600_LCD_ON | |
| 408 | EGPIO_H3600_LCD_PCI | |
| 409 | EGPIO_H3600_LCD_5V_ON | |
| 410 | EGPIO_H3600_LVDD_ON; |
| 411 | do_blank(setp); |
| 412 | break; |
| 413 | case IPAQ_EGPIO_LCD_ENABLE: |
| 414 | break; |
| 415 | case IPAQ_EGPIO_CODEC_NRESET: |
| 416 | egpio |= EGPIO_H3600_CODEC_NRESET; |
| 417 | break; |
| 418 | case IPAQ_EGPIO_AUDIO_ON: |
| 419 | egpio |= EGPIO_H3600_AUD_AMP_ON | |
| 420 | EGPIO_H3600_AUD_PWR_ON; |
| 421 | break; |
| 422 | case IPAQ_EGPIO_QMUTE: |
| 423 | egpio |= EGPIO_H3600_QMUTE; |
| 424 | break; |
| 425 | case IPAQ_EGPIO_OPT_NVRAM_ON: |
| 426 | egpio |= EGPIO_H3600_OPT_NVRAM_ON; |
| 427 | break; |
| 428 | case IPAQ_EGPIO_OPT_ON: |
| 429 | egpio |= EGPIO_H3600_OPT_ON; |
| 430 | break; |
| 431 | case IPAQ_EGPIO_CARD_RESET: |
| 432 | egpio |= EGPIO_H3600_CARD_RESET; |
| 433 | break; |
| 434 | case IPAQ_EGPIO_OPT_RESET: |
| 435 | egpio |= EGPIO_H3600_OPT_RESET; |
| 436 | break; |
| 437 | case IPAQ_EGPIO_IR_ON: |
| 438 | egpio |= EGPIO_H3600_IR_ON; |
| 439 | break; |
| 440 | case IPAQ_EGPIO_IR_FSEL: |
| 441 | egpio |= EGPIO_H3600_IR_FSEL; |
| 442 | break; |
| 443 | case IPAQ_EGPIO_RS232_ON: |
| 444 | egpio |= EGPIO_H3600_RS232_ON; |
| 445 | break; |
| 446 | case IPAQ_EGPIO_VPP_ON: |
| 447 | egpio |= EGPIO_H3600_VPP_ON; |
| 448 | break; |
| 449 | } |
| 450 | |
| 451 | if (egpio) { |
| 452 | local_irq_save(flags); |
| 453 | if (setp) |
| 454 | h3600_egpio |= egpio; |
| 455 | else |
| 456 | h3600_egpio &= ~egpio; |
| 457 | H3600_EGPIO = h3600_egpio; |
| 458 | local_irq_restore(flags); |
| 459 | } |
| 460 | } |
| 461 | |
| 462 | static unsigned long h3600_read_egpio(void) |
| 463 | { |
| 464 | return h3600_egpio; |
| 465 | } |
| 466 | |
| 467 | static int h3600_pm_callback(int req) |
| 468 | { |
| 469 | if (ipaq_model_ops.pm_callback_aux) |
| 470 | return ipaq_model_ops.pm_callback_aux(req); |
| 471 | return 0; |
| 472 | } |
| 473 | |
| 474 | static struct ipaq_model_ops h3600_model_ops __initdata = { |
| 475 | .generic_name = "3600", |
| 476 | .control = h3600_control_egpio, |
| 477 | .read = h3600_read_egpio, |
| 478 | .pm_callback = h3600_pm_callback |
| 479 | }; |
| 480 | |
| 481 | static void __init h3600_map_io(void) |
| 482 | { |
| 483 | h3xxx_map_io(); |
| 484 | |
| 485 | /* Initialize h3600-specific values here */ |
| 486 | |
| 487 | GPCR = 0x0fffffff; /* All outputs are set low by default */ |
| 488 | GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | |
| 489 | GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | |
| 490 | GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 | |
| 491 | GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | |
| 492 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; |
| 493 | |
| 494 | H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */ |
| 495 | ipaq_model_ops = h3600_model_ops; |
| 496 | } |
| 497 | |
| 498 | MACHINE_START(H3600, "Compaq iPAQ H3600") |
| 499 | BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000) |
| 500 | BOOT_PARAMS(0xc0000100) |
| 501 | MAPIO(h3600_map_io) |
| 502 | INITIRQ(sa1100_init_irq) |
| 503 | .timer = &sa1100_timer, |
| 504 | .init_machine = h3xxx_mach_init, |
| 505 | MACHINE_END |
| 506 | |
| 507 | #endif /* CONFIG_SA1100_H3600 */ |
| 508 | |
| 509 | #ifdef CONFIG_SA1100_H3800 |
| 510 | |
| 511 | #define SET_ASIC1(x) \ |
| 512 | do {if (setp) { H3800_ASIC1_GPIO_OUT |= (x); } else { H3800_ASIC1_GPIO_OUT &= ~(x); }} while(0) |
| 513 | |
| 514 | #define SET_ASIC2(x) \ |
| 515 | do {if (setp) { H3800_ASIC2_GPIOPIOD |= (x); } else { H3800_ASIC2_GPIOPIOD &= ~(x); }} while(0) |
| 516 | |
| 517 | #define CLEAR_ASIC1(x) \ |
| 518 | do {if (setp) { H3800_ASIC1_GPIO_OUT &= ~(x); } else { H3800_ASIC1_GPIO_OUT |= (x); }} while(0) |
| 519 | |
| 520 | #define CLEAR_ASIC2(x) \ |
| 521 | do {if (setp) { H3800_ASIC2_GPIOPIOD &= ~(x); } else { H3800_ASIC2_GPIOPIOD |= (x); }} while(0) |
| 522 | |
| 523 | |
| 524 | /* |
| 525 | On screen enable, we get |
| 526 | |
| 527 | h3800_video_power_on(1) |
| 528 | LCD controller starts |
| 529 | h3800_video_lcd_enable(1) |
| 530 | |
| 531 | On screen disable, we get |
| 532 | |
| 533 | h3800_video_lcd_enable(0) |
| 534 | LCD controller stops |
| 535 | h3800_video_power_on(0) |
| 536 | */ |
| 537 | |
| 538 | |
| 539 | static void h3800_video_power_on(int setp) |
| 540 | { |
| 541 | if (setp) { |
| 542 | H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_ON; |
| 543 | msleep(30); |
| 544 | H3800_ASIC1_GPIO_OUT |= GPIO1_VGL_ON; |
| 545 | msleep(5); |
| 546 | H3800_ASIC1_GPIO_OUT |= GPIO1_VGH_ON; |
| 547 | msleep(50); |
| 548 | H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_5V_ON; |
| 549 | msleep(5); |
| 550 | } else { |
| 551 | msleep(5); |
| 552 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_5V_ON; |
| 553 | msleep(50); |
| 554 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGL_ON; |
| 555 | msleep(5); |
| 556 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGH_ON; |
| 557 | msleep(100); |
| 558 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_ON; |
| 559 | } |
| 560 | } |
| 561 | |
| 562 | static void h3800_video_lcd_enable(int setp) |
| 563 | { |
| 564 | if (setp) { |
| 565 | msleep(17); // Wait one from before turning on |
| 566 | H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_PCI; |
| 567 | } else { |
| 568 | H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_PCI; |
| 569 | msleep(30); // Wait before turning off |
| 570 | } |
| 571 | } |
| 572 | |
| 573 | |
| 574 | static void h3800_control_egpio(enum ipaq_egpio_type x, int setp) |
| 575 | { |
| 576 | switch (x) { |
| 577 | case IPAQ_EGPIO_LCD_POWER: |
| 578 | h3800_video_power_on(setp); |
| 579 | break; |
| 580 | case IPAQ_EGPIO_LCD_ENABLE: |
| 581 | h3800_video_lcd_enable(setp); |
| 582 | break; |
| 583 | case IPAQ_EGPIO_CODEC_NRESET: |
| 584 | case IPAQ_EGPIO_AUDIO_ON: |
| 585 | case IPAQ_EGPIO_QMUTE: |
| 586 | printk("%s: error - should not be called\n", __FUNCTION__); |
| 587 | break; |
| 588 | case IPAQ_EGPIO_OPT_NVRAM_ON: |
| 589 | SET_ASIC2(GPIO2_OPT_ON_NVRAM); |
| 590 | break; |
| 591 | case IPAQ_EGPIO_OPT_ON: |
| 592 | SET_ASIC2(GPIO2_OPT_ON); |
| 593 | break; |
| 594 | case IPAQ_EGPIO_CARD_RESET: |
| 595 | SET_ASIC2(GPIO2_OPT_PCM_RESET); |
| 596 | break; |
| 597 | case IPAQ_EGPIO_OPT_RESET: |
| 598 | SET_ASIC2(GPIO2_OPT_RESET); |
| 599 | break; |
| 600 | case IPAQ_EGPIO_IR_ON: |
| 601 | CLEAR_ASIC1(GPIO1_IR_ON_N); |
| 602 | break; |
| 603 | case IPAQ_EGPIO_IR_FSEL: |
| 604 | break; |
| 605 | case IPAQ_EGPIO_RS232_ON: |
| 606 | SET_ASIC1(GPIO1_RS232_ON); |
| 607 | break; |
| 608 | case IPAQ_EGPIO_VPP_ON: |
| 609 | H3800_ASIC2_FlashWP_VPP_ON = setp; |
| 610 | break; |
| 611 | } |
| 612 | } |
| 613 | |
| 614 | static unsigned long h3800_read_egpio(void) |
| 615 | { |
| 616 | return H3800_ASIC1_GPIO_OUT | (H3800_ASIC2_GPIOPIOD << 16); |
| 617 | } |
| 618 | |
| 619 | /* We need to fix ASIC2 GPIO over suspend/resume. At the moment, |
| 620 | it doesn't appear that ASIC1 GPIO has the same problem */ |
| 621 | |
| 622 | static int h3800_pm_callback(int req) |
| 623 | { |
| 624 | static u16 asic1_data; |
| 625 | static u16 asic2_data; |
| 626 | int result = 0; |
| 627 | |
| 628 | printk("%s %d\n", __FUNCTION__, req); |
| 629 | |
| 630 | switch (req) { |
| 631 | case PM_RESUME: |
| 632 | MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; /* Set MSC2 correctly */ |
| 633 | |
| 634 | H3800_ASIC2_GPIOPIOD = asic2_data; |
| 635 | H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ |
| 636 | | GPIO2_SD_DETECT |
| 637 | | GPIO2_EAR_IN_N |
| 638 | | GPIO2_USB_DETECT_N |
| 639 | | GPIO2_SD_CON_SLT; |
| 640 | |
| 641 | H3800_ASIC1_GPIO_OUT = asic1_data; |
| 642 | |
| 643 | if (ipaq_model_ops.pm_callback_aux) |
| 644 | result = ipaq_model_ops.pm_callback_aux(req); |
| 645 | break; |
| 646 | |
| 647 | case PM_SUSPEND: |
| 648 | if (ipaq_model_ops.pm_callback_aux && |
| 649 | ((result = ipaq_model_ops.pm_callback_aux(req)) != 0)) |
| 650 | return result; |
| 651 | |
| 652 | asic1_data = H3800_ASIC1_GPIO_OUT; |
| 653 | asic2_data = H3800_ASIC2_GPIOPIOD; |
| 654 | break; |
| 655 | default: |
| 656 | printk("%s: unrecognized PM callback\n", __FUNCTION__); |
| 657 | break; |
| 658 | } |
| 659 | return result; |
| 660 | } |
| 661 | |
| 662 | static struct ipaq_model_ops h3800_model_ops __initdata = { |
| 663 | .generic_name = "3800", |
| 664 | .control = h3800_control_egpio, |
| 665 | .read = h3800_read_egpio, |
| 666 | .pm_callback = h3800_pm_callback |
| 667 | }; |
| 668 | |
| 669 | #define MAX_ASIC_ISR_LOOPS 20 |
| 670 | |
| 671 | /* The order of these is important - see #include <asm/arch/irqs.h> */ |
| 672 | static u32 kpio_irq_mask[] = { |
| 673 | KPIO_KEY_ALL, |
| 674 | KPIO_SPI_INT, |
| 675 | KPIO_OWM_INT, |
| 676 | KPIO_ADC_INT, |
| 677 | KPIO_UART_0_INT, |
| 678 | KPIO_UART_1_INT, |
| 679 | KPIO_TIMER_0_INT, |
| 680 | KPIO_TIMER_1_INT, |
| 681 | KPIO_TIMER_2_INT |
| 682 | }; |
| 683 | |
| 684 | static u32 gpio_irq_mask[] = { |
| 685 | GPIO2_PEN_IRQ, |
| 686 | GPIO2_SD_DETECT, |
| 687 | GPIO2_EAR_IN_N, |
| 688 | GPIO2_USB_DETECT_N, |
| 689 | GPIO2_SD_CON_SLT, |
| 690 | }; |
| 691 | |
| 692 | static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) |
| 693 | { |
| 694 | int i; |
| 695 | |
| 696 | if (0) printk("%s: interrupt received\n", __FUNCTION__); |
| 697 | |
| 698 | desc->chip->ack(irq); |
| 699 | |
| 700 | for (i = 0; i < MAX_ASIC_ISR_LOOPS && (GPLR & GPIO_H3800_ASIC); i++) { |
| 701 | u32 irq; |
| 702 | int j; |
| 703 | |
| 704 | /* KPIO */ |
| 705 | irq = H3800_ASIC2_KPIINTFLAG; |
| 706 | if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq); |
| 707 | for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++) |
| 708 | if (irq & kpio_irq_mask[j]) |
| 709 | do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j, regs); |
| 710 | |
| 711 | /* GPIO2 */ |
| 712 | irq = H3800_ASIC2_GPIINTFLAG; |
| 713 | if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq); |
| 714 | for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++) |
| 715 | if (irq & gpio_irq_mask[j]) |
| 716 | do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j , regs); |
| 717 | } |
| 718 | |
| 719 | if (i >= MAX_ASIC_ISR_LOOPS) |
| 720 | printk("%s: interrupt processing overrun\n", __FUNCTION__); |
| 721 | |
| 722 | /* For level-based interrupts */ |
| 723 | desc->chip->unmask(irq); |
| 724 | |
| 725 | } |
| 726 | |
| 727 | static struct irqaction h3800_irq = { |
| 728 | .name = "h3800_asic", |
| 729 | .handler = h3800_IRQ_demux, |
| 730 | .flags = SA_INTERRUPT, |
| 731 | }; |
| 732 | |
| 733 | u32 kpio_int_shadow = 0; |
| 734 | |
| 735 | |
| 736 | /* mask_ack <- IRQ is first serviced. |
| 737 | mask <- IRQ is disabled. |
| 738 | unmask <- IRQ is enabled |
| 739 | |
| 740 | The INTCLR registers are poorly documented. I believe that writing |
| 741 | a "1" to the register clears the specific interrupt, but the documentation |
| 742 | indicates writing a "0" clears the interrupt. In any case, they shouldn't |
| 743 | be read (that's the INTFLAG register) |
| 744 | */ |
| 745 | |
| 746 | static void h3800_mask_ack_kpio_irq(unsigned int irq) |
| 747 | { |
| 748 | u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; |
| 749 | kpio_int_shadow &= ~mask; |
| 750 | H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; |
| 751 | H3800_ASIC2_KPIINTCLR = mask; |
| 752 | } |
| 753 | |
| 754 | static void h3800_mask_kpio_irq(unsigned int irq) |
| 755 | { |
| 756 | u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; |
| 757 | kpio_int_shadow &= ~mask; |
| 758 | H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; |
| 759 | } |
| 760 | |
| 761 | static void h3800_unmask_kpio_irq(unsigned int irq) |
| 762 | { |
| 763 | u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START]; |
| 764 | kpio_int_shadow |= mask; |
| 765 | H3800_ASIC2_KPIINTSTAT = kpio_int_shadow; |
| 766 | } |
| 767 | |
| 768 | static void h3800_mask_ack_gpio_irq(unsigned int irq) |
| 769 | { |
| 770 | u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; |
| 771 | H3800_ASIC2_GPIINTSTAT &= ~mask; |
| 772 | H3800_ASIC2_GPIINTCLR = mask; |
| 773 | } |
| 774 | |
| 775 | static void h3800_mask_gpio_irq(unsigned int irq) |
| 776 | { |
| 777 | u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; |
| 778 | H3800_ASIC2_GPIINTSTAT &= ~mask; |
| 779 | } |
| 780 | |
| 781 | static void h3800_unmask_gpio_irq(unsigned int irq) |
| 782 | { |
| 783 | u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START]; |
| 784 | H3800_ASIC2_GPIINTSTAT |= mask; |
| 785 | } |
| 786 | |
| 787 | static void __init h3800_init_irq(void) |
| 788 | { |
| 789 | int i; |
| 790 | |
| 791 | /* Initialize standard IRQs */ |
| 792 | sa1100_init_irq(); |
| 793 | |
| 794 | /* Disable all IRQs and set up clock */ |
| 795 | H3800_ASIC2_KPIINTSTAT = 0; /* Disable all interrupts */ |
| 796 | H3800_ASIC2_GPIINTSTAT = 0; |
| 797 | |
| 798 | H3800_ASIC2_KPIINTCLR = 0; /* Clear all KPIO interrupts */ |
| 799 | H3800_ASIC2_GPIINTCLR = 0; /* Clear all GPIO interrupts */ |
| 800 | |
| 801 | // H3800_ASIC2_KPIINTCLR = 0xffff; /* Clear all KPIO interrupts */ |
| 802 | // H3800_ASIC2_GPIINTCLR = 0xffff; /* Clear all GPIO interrupts */ |
| 803 | |
| 804 | H3800_ASIC2_CLOCK_Enable |= ASIC2_CLOCK_EX0; /* 32 kHZ crystal on */ |
| 805 | H3800_ASIC2_INTR_ClockPrescale |= ASIC2_INTCPS_SET; |
| 806 | H3800_ASIC2_INTR_ClockPrescale = ASIC2_INTCPS_CPS(0x0e) | ASIC2_INTCPS_SET; |
| 807 | H3800_ASIC2_INTR_TimerSet = 1; |
| 808 | |
| 809 | #if 0 |
| 810 | for (i = 0; i < H3800_KPIO_IRQ_COUNT; i++) { |
| 811 | int irq = i + H3800_KPIO_IRQ_START; |
| 812 | irq_desc[irq].valid = 1; |
| 813 | irq_desc[irq].probe_ok = 1; |
| 814 | set_irq_chip(irq, &h3800_kpio_irqchip); |
| 815 | } |
| 816 | |
| 817 | for (i = 0; i < H3800_GPIO_IRQ_COUNT; i++) { |
| 818 | int irq = i + H3800_GPIO_IRQ_START; |
| 819 | irq_desc[irq].valid = 1; |
| 820 | irq_desc[irq].probe_ok = 1; |
| 821 | set_irq_chip(irq, &h3800_gpio_irqchip); |
| 822 | } |
| 823 | #endif |
| 824 | set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING); |
| 825 | set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, &h3800_IRQ_demux); |
| 826 | } |
| 827 | |
| 828 | |
| 829 | #define ASIC1_OUTPUTS 0x7fff /* First 15 bits are used */ |
| 830 | |
| 831 | static void __init h3800_map_io(void) |
| 832 | { |
| 833 | h3xxx_map_io(); |
| 834 | |
| 835 | /* Add wakeup on AC plug/unplug */ |
| 836 | PWER |= PWER_GPIO12; |
| 837 | |
| 838 | /* Initialize h3800-specific values here */ |
| 839 | GPCR = 0x0fffffff; /* All outputs are set low by default */ |
| 840 | GAFR = GPIO_H3800_CLK_OUT | |
| 841 | GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | |
| 842 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; |
| 843 | GPDR = GPIO_H3800_CLK_OUT | |
| 844 | GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK | |
| 845 | GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA | |
| 846 | GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 | |
| 847 | GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; |
| 848 | TUCR = TUCR_3_6864MHz; /* Seems to be used only for the Bluetooth UART */ |
| 849 | |
| 850 | /* Fix the memory bus */ |
| 851 | MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; |
| 852 | |
| 853 | /* Set up ASIC #1 */ |
| 854 | H3800_ASIC1_GPIO_DIR = ASIC1_OUTPUTS; /* All outputs */ |
| 855 | H3800_ASIC1_GPIO_MASK = ASIC1_OUTPUTS; /* No interrupts */ |
| 856 | H3800_ASIC1_GPIO_SLEEP_MASK = ASIC1_OUTPUTS; |
| 857 | H3800_ASIC1_GPIO_SLEEP_DIR = ASIC1_OUTPUTS; |
| 858 | H3800_ASIC1_GPIO_SLEEP_OUT = GPIO1_EAR_ON_N; |
| 859 | H3800_ASIC1_GPIO_BATT_FAULT_DIR = ASIC1_OUTPUTS; |
| 860 | H3800_ASIC1_GPIO_BATT_FAULT_OUT = GPIO1_EAR_ON_N; |
| 861 | |
| 862 | H3800_ASIC1_GPIO_OUT = GPIO1_IR_ON_N |
| 863 | | GPIO1_RS232_ON |
| 864 | | GPIO1_EAR_ON_N; |
| 865 | |
| 866 | /* Set up ASIC #2 */ |
| 867 | H3800_ASIC2_GPIOPIOD = GPIO2_IN_Y1_N | GPIO2_IN_X1_N; |
| 868 | H3800_ASIC2_GPOBFSTAT = GPIO2_IN_Y1_N | GPIO2_IN_X1_N; |
| 869 | |
| 870 | H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ |
| 871 | | GPIO2_SD_DETECT |
| 872 | | GPIO2_EAR_IN_N |
| 873 | | GPIO2_USB_DETECT_N |
| 874 | | GPIO2_SD_CON_SLT; |
| 875 | |
| 876 | /* TODO : Set sleep states & battery fault states */ |
| 877 | |
| 878 | /* Clear VPP Enable */ |
| 879 | H3800_ASIC2_FlashWP_VPP_ON = 0; |
| 880 | ipaq_model_ops = h3800_model_ops; |
| 881 | } |
| 882 | |
| 883 | MACHINE_START(H3800, "Compaq iPAQ H3800") |
| 884 | BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000) |
| 885 | BOOT_PARAMS(0xc0000100) |
| 886 | MAPIO(h3800_map_io) |
| 887 | INITIRQ(h3800_init_irq) |
| 888 | .timer = &sa1100_timer, |
| 889 | .init_machine = h3xxx_mach_init, |
| 890 | MACHINE_END |
| 891 | |
| 892 | #endif /* CONFIG_SA1100_H3800 */ |