Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * video1394.c - video driver for OHCI 1394 boards |
| 3 | * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au> |
| 4 | * Peter Schlaile <udbz@rz.uni-karlsruhe.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software Foundation, |
| 18 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | * |
| 20 | * NOTES: |
| 21 | * |
| 22 | * jds -- add private data to file to keep track of iso contexts associated |
| 23 | * with each open -- so release won't kill all iso transfers. |
| 24 | * |
| 25 | * Damien Douxchamps: Fix failure when the number of DMA pages per frame is |
| 26 | * one. |
| 27 | * |
| 28 | * ioctl return codes: |
| 29 | * EFAULT is only for invalid address for the argp |
| 30 | * EINVAL for out of range values |
| 31 | * EBUSY when trying to use an already used resource |
| 32 | * ESRCH when trying to free/stop a not used resource |
| 33 | * EAGAIN for resource allocation failure that could perhaps succeed later |
| 34 | * ENOTTY for unsupported ioctl request |
| 35 | * |
| 36 | */ |
| 37 | |
| 38 | #include <linux/config.h> |
| 39 | #include <linux/kernel.h> |
| 40 | #include <linux/list.h> |
| 41 | #include <linux/slab.h> |
| 42 | #include <linux/interrupt.h> |
| 43 | #include <linux/wait.h> |
| 44 | #include <linux/errno.h> |
| 45 | #include <linux/module.h> |
| 46 | #include <linux/init.h> |
| 47 | #include <linux/pci.h> |
| 48 | #include <linux/fs.h> |
| 49 | #include <linux/poll.h> |
| 50 | #include <linux/smp_lock.h> |
| 51 | #include <linux/delay.h> |
| 52 | #include <linux/devfs_fs_kernel.h> |
| 53 | #include <linux/bitops.h> |
| 54 | #include <linux/types.h> |
| 55 | #include <linux/vmalloc.h> |
| 56 | #include <linux/timex.h> |
| 57 | #include <linux/mm.h> |
| 58 | #include <linux/ioctl32.h> |
| 59 | #include <linux/compat.h> |
| 60 | #include <linux/cdev.h> |
| 61 | |
| 62 | #include "ieee1394.h" |
| 63 | #include "ieee1394_types.h" |
| 64 | #include "hosts.h" |
| 65 | #include "ieee1394_core.h" |
| 66 | #include "highlevel.h" |
| 67 | #include "video1394.h" |
| 68 | #include "nodemgr.h" |
| 69 | #include "dma.h" |
| 70 | |
| 71 | #include "ohci1394.h" |
| 72 | |
| 73 | #define ISO_CHANNELS 64 |
| 74 | |
| 75 | #ifndef virt_to_page |
| 76 | #define virt_to_page(x) MAP_NR(x) |
| 77 | #endif |
| 78 | |
| 79 | #ifndef vmalloc_32 |
| 80 | #define vmalloc_32(x) vmalloc(x) |
| 81 | #endif |
| 82 | |
| 83 | struct it_dma_prg { |
| 84 | struct dma_cmd begin; |
| 85 | quadlet_t data[4]; |
| 86 | struct dma_cmd end; |
| 87 | quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */ |
| 88 | }; |
| 89 | |
| 90 | struct dma_iso_ctx { |
| 91 | struct ti_ohci *ohci; |
| 92 | int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */ |
| 93 | struct ohci1394_iso_tasklet iso_tasklet; |
| 94 | int channel; |
| 95 | int ctx; |
| 96 | int last_buffer; |
| 97 | int * next_buffer; /* For ISO Transmit of video packets |
| 98 | to write the correct SYT field |
| 99 | into the next block */ |
| 100 | unsigned int num_desc; |
| 101 | unsigned int buf_size; |
| 102 | unsigned int frame_size; |
| 103 | unsigned int packet_size; |
| 104 | unsigned int left_size; |
| 105 | unsigned int nb_cmd; |
| 106 | |
| 107 | struct dma_region dma; |
| 108 | |
| 109 | struct dma_prog_region *prg_reg; |
| 110 | |
| 111 | struct dma_cmd **ir_prg; |
| 112 | struct it_dma_prg **it_prg; |
| 113 | |
| 114 | unsigned int *buffer_status; |
| 115 | struct timeval *buffer_time; /* time when the buffer was received */ |
| 116 | unsigned int *last_used_cmd; /* For ISO Transmit with |
| 117 | variable sized packets only ! */ |
| 118 | int ctrlClear; |
| 119 | int ctrlSet; |
| 120 | int cmdPtr; |
| 121 | int ctxMatch; |
| 122 | wait_queue_head_t waitq; |
| 123 | spinlock_t lock; |
| 124 | unsigned int syt_offset; |
| 125 | int flags; |
| 126 | |
| 127 | struct list_head link; |
| 128 | }; |
| 129 | |
| 130 | |
| 131 | struct file_ctx { |
| 132 | struct ti_ohci *ohci; |
| 133 | struct list_head context_list; |
| 134 | struct dma_iso_ctx *current_ctx; |
| 135 | }; |
| 136 | |
| 137 | #ifdef CONFIG_IEEE1394_VERBOSEDEBUG |
| 138 | #define VIDEO1394_DEBUG |
| 139 | #endif |
| 140 | |
| 141 | #ifdef DBGMSG |
| 142 | #undef DBGMSG |
| 143 | #endif |
| 144 | |
| 145 | #ifdef VIDEO1394_DEBUG |
| 146 | #define DBGMSG(card, fmt, args...) \ |
| 147 | printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args) |
| 148 | #else |
| 149 | #define DBGMSG(card, fmt, args...) |
| 150 | #endif |
| 151 | |
| 152 | /* print general (card independent) information */ |
| 153 | #define PRINT_G(level, fmt, args...) \ |
| 154 | printk(level "video1394: " fmt "\n" , ## args) |
| 155 | |
| 156 | /* print card specific information */ |
| 157 | #define PRINT(level, card, fmt, args...) \ |
| 158 | printk(level "video1394_%d: " fmt "\n" , card , ## args) |
| 159 | |
| 160 | static void wakeup_dma_ir_ctx(unsigned long l); |
| 161 | static void wakeup_dma_it_ctx(unsigned long l); |
| 162 | |
| 163 | static struct hpsb_highlevel video1394_highlevel; |
| 164 | |
| 165 | static int free_dma_iso_ctx(struct dma_iso_ctx *d) |
| 166 | { |
| 167 | int i; |
| 168 | |
| 169 | DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx); |
| 170 | |
| 171 | ohci1394_stop_context(d->ohci, d->ctrlClear, NULL); |
| 172 | if (d->iso_tasklet.link.next != NULL) |
| 173 | ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet); |
| 174 | |
| 175 | dma_region_free(&d->dma); |
| 176 | |
| 177 | if (d->prg_reg) { |
| 178 | for (i = 0; i < d->num_desc; i++) |
| 179 | dma_prog_region_free(&d->prg_reg[i]); |
| 180 | kfree(d->prg_reg); |
| 181 | } |
| 182 | |
| 183 | if (d->ir_prg) |
| 184 | kfree(d->ir_prg); |
| 185 | |
| 186 | if (d->it_prg) |
| 187 | kfree(d->it_prg); |
| 188 | |
| 189 | if (d->buffer_status) |
| 190 | kfree(d->buffer_status); |
| 191 | if (d->buffer_time) |
| 192 | kfree(d->buffer_time); |
| 193 | if (d->last_used_cmd) |
| 194 | kfree(d->last_used_cmd); |
| 195 | if (d->next_buffer) |
| 196 | kfree(d->next_buffer); |
| 197 | |
| 198 | list_del(&d->link); |
| 199 | |
| 200 | kfree(d); |
| 201 | |
| 202 | return 0; |
| 203 | } |
| 204 | |
| 205 | static struct dma_iso_ctx * |
| 206 | alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc, |
| 207 | int buf_size, int channel, unsigned int packet_size) |
| 208 | { |
| 209 | struct dma_iso_ctx *d; |
| 210 | int i; |
| 211 | |
| 212 | d = kmalloc(sizeof(struct dma_iso_ctx), GFP_KERNEL); |
| 213 | if (d == NULL) { |
| 214 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx"); |
| 215 | return NULL; |
| 216 | } |
| 217 | |
| 218 | memset(d, 0, sizeof *d); |
| 219 | |
| 220 | d->ohci = ohci; |
| 221 | d->type = type; |
| 222 | d->channel = channel; |
| 223 | d->num_desc = num_desc; |
| 224 | d->frame_size = buf_size; |
| 225 | d->buf_size = PAGE_ALIGN(buf_size); |
| 226 | d->last_buffer = -1; |
| 227 | INIT_LIST_HEAD(&d->link); |
| 228 | init_waitqueue_head(&d->waitq); |
| 229 | |
| 230 | /* Init the regions for easy cleanup */ |
| 231 | dma_region_init(&d->dma); |
| 232 | |
| 233 | if (dma_region_alloc(&d->dma, d->num_desc * d->buf_size, ohci->dev, |
| 234 | PCI_DMA_BIDIRECTIONAL)) { |
| 235 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer"); |
| 236 | free_dma_iso_ctx(d); |
| 237 | return NULL; |
| 238 | } |
| 239 | |
| 240 | if (type == OHCI_ISO_RECEIVE) |
| 241 | ohci1394_init_iso_tasklet(&d->iso_tasklet, type, |
| 242 | wakeup_dma_ir_ctx, |
| 243 | (unsigned long) d); |
| 244 | else |
| 245 | ohci1394_init_iso_tasklet(&d->iso_tasklet, type, |
| 246 | wakeup_dma_it_ctx, |
| 247 | (unsigned long) d); |
| 248 | |
| 249 | if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) { |
| 250 | PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts", |
| 251 | type == OHCI_ISO_RECEIVE ? "receive" : "transmit"); |
| 252 | free_dma_iso_ctx(d); |
| 253 | return NULL; |
| 254 | } |
| 255 | d->ctx = d->iso_tasklet.context; |
| 256 | |
| 257 | d->prg_reg = kmalloc(d->num_desc * sizeof(struct dma_prog_region), |
| 258 | GFP_KERNEL); |
| 259 | if (d->prg_reg == NULL) { |
| 260 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs"); |
| 261 | free_dma_iso_ctx(d); |
| 262 | return NULL; |
| 263 | } |
| 264 | /* Makes for easier cleanup */ |
| 265 | for (i = 0; i < d->num_desc; i++) |
| 266 | dma_prog_region_init(&d->prg_reg[i]); |
| 267 | |
| 268 | if (type == OHCI_ISO_RECEIVE) { |
| 269 | d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx; |
| 270 | d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx; |
| 271 | d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx; |
| 272 | d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx; |
| 273 | |
| 274 | d->ir_prg = kmalloc(d->num_desc * sizeof(struct dma_cmd *), |
| 275 | GFP_KERNEL); |
| 276 | |
| 277 | if (d->ir_prg == NULL) { |
| 278 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg"); |
| 279 | free_dma_iso_ctx(d); |
| 280 | return NULL; |
| 281 | } |
| 282 | memset(d->ir_prg, 0, d->num_desc * sizeof(struct dma_cmd *)); |
| 283 | |
| 284 | d->nb_cmd = d->buf_size / PAGE_SIZE + 1; |
| 285 | d->left_size = (d->frame_size % PAGE_SIZE) ? |
| 286 | d->frame_size % PAGE_SIZE : PAGE_SIZE; |
| 287 | |
| 288 | for (i = 0;i < d->num_desc; i++) { |
| 289 | if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd * |
| 290 | sizeof(struct dma_cmd), ohci->dev)) { |
| 291 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg"); |
| 292 | free_dma_iso_ctx(d); |
| 293 | return NULL; |
| 294 | } |
| 295 | d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt; |
| 296 | } |
| 297 | |
| 298 | } else { /* OHCI_ISO_TRANSMIT */ |
| 299 | d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx; |
| 300 | d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx; |
| 301 | d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx; |
| 302 | |
| 303 | d->it_prg = kmalloc(d->num_desc * sizeof(struct it_dma_prg *), |
| 304 | GFP_KERNEL); |
| 305 | |
| 306 | if (d->it_prg == NULL) { |
| 307 | PRINT(KERN_ERR, ohci->host->id, |
| 308 | "Failed to allocate dma it prg"); |
| 309 | free_dma_iso_ctx(d); |
| 310 | return NULL; |
| 311 | } |
| 312 | memset(d->it_prg, 0, d->num_desc*sizeof(struct it_dma_prg *)); |
| 313 | |
| 314 | d->packet_size = packet_size; |
| 315 | |
| 316 | if (PAGE_SIZE % packet_size || packet_size>4096) { |
| 317 | PRINT(KERN_ERR, ohci->host->id, |
| 318 | "Packet size %d (page_size: %ld) " |
| 319 | "not yet supported\n", |
| 320 | packet_size, PAGE_SIZE); |
| 321 | free_dma_iso_ctx(d); |
| 322 | return NULL; |
| 323 | } |
| 324 | |
| 325 | d->nb_cmd = d->frame_size / d->packet_size; |
| 326 | if (d->frame_size % d->packet_size) { |
| 327 | d->nb_cmd++; |
| 328 | d->left_size = d->frame_size % d->packet_size; |
| 329 | } else |
| 330 | d->left_size = d->packet_size; |
| 331 | |
| 332 | for (i = 0; i < d->num_desc; i++) { |
| 333 | if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd * |
| 334 | sizeof(struct it_dma_prg), ohci->dev)) { |
| 335 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg"); |
| 336 | free_dma_iso_ctx(d); |
| 337 | return NULL; |
| 338 | } |
| 339 | d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt; |
| 340 | } |
| 341 | } |
| 342 | |
| 343 | d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int), |
| 344 | GFP_KERNEL); |
| 345 | d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval), |
| 346 | GFP_KERNEL); |
| 347 | d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int), |
| 348 | GFP_KERNEL); |
| 349 | d->next_buffer = kmalloc(d->num_desc * sizeof(int), |
| 350 | GFP_KERNEL); |
| 351 | |
| 352 | if (d->buffer_status == NULL) { |
| 353 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_status"); |
| 354 | free_dma_iso_ctx(d); |
| 355 | return NULL; |
| 356 | } |
| 357 | if (d->buffer_time == NULL) { |
| 358 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_time"); |
| 359 | free_dma_iso_ctx(d); |
| 360 | return NULL; |
| 361 | } |
| 362 | if (d->last_used_cmd == NULL) { |
| 363 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate last_used_cmd"); |
| 364 | free_dma_iso_ctx(d); |
| 365 | return NULL; |
| 366 | } |
| 367 | if (d->next_buffer == NULL) { |
| 368 | PRINT(KERN_ERR, ohci->host->id, "Failed to allocate next_buffer"); |
| 369 | free_dma_iso_ctx(d); |
| 370 | return NULL; |
| 371 | } |
| 372 | memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int)); |
| 373 | memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval)); |
| 374 | memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int)); |
| 375 | memset(d->next_buffer, -1, d->num_desc * sizeof(int)); |
| 376 | |
| 377 | spin_lock_init(&d->lock); |
| 378 | |
| 379 | PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers " |
| 380 | "of size %d allocated for a frame size %d, each with %d prgs", |
| 381 | (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit", |
| 382 | d->num_desc, d->buf_size, d->frame_size, d->nb_cmd); |
| 383 | |
| 384 | return d; |
| 385 | } |
| 386 | |
| 387 | static void reset_ir_status(struct dma_iso_ctx *d, int n) |
| 388 | { |
| 389 | int i; |
| 390 | d->ir_prg[n][0].status = cpu_to_le32(4); |
| 391 | d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4); |
| 392 | for (i = 2; i < d->nb_cmd - 1; i++) |
| 393 | d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE); |
| 394 | d->ir_prg[n][i].status = cpu_to_le32(d->left_size); |
| 395 | } |
| 396 | |
| 397 | static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags) |
| 398 | { |
| 399 | struct dma_cmd *ir_prg = d->ir_prg[n]; |
| 400 | struct dma_prog_region *ir_reg = &d->prg_reg[n]; |
| 401 | unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size; |
| 402 | int i; |
| 403 | |
| 404 | /* the first descriptor will read only 4 bytes */ |
| 405 | ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | |
| 406 | DMA_CTL_BRANCH | 4); |
| 407 | |
| 408 | /* set the sync flag */ |
| 409 | if (flags & VIDEO1394_SYNC_FRAMES) |
| 410 | ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT); |
| 411 | |
| 412 | ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf - |
| 413 | (unsigned long)d->dma.kvirt)); |
| 414 | ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg, |
| 415 | 1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1); |
| 416 | |
| 417 | /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */ |
| 418 | if (d->nb_cmd > 2) { |
| 419 | /* The second descriptor will read PAGE_SIZE-4 bytes */ |
| 420 | ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | |
| 421 | DMA_CTL_BRANCH | (PAGE_SIZE-4)); |
| 422 | ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) - |
| 423 | (unsigned long)d->dma.kvirt)); |
| 424 | ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg, |
| 425 | 2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1); |
| 426 | |
| 427 | for (i = 2; i < d->nb_cmd - 1; i++) { |
| 428 | ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | |
| 429 | DMA_CTL_BRANCH | PAGE_SIZE); |
| 430 | ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, |
| 431 | (buf+(i-1)*PAGE_SIZE) - |
| 432 | (unsigned long)d->dma.kvirt)); |
| 433 | |
| 434 | ir_prg[i].branchAddress = |
| 435 | cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg, |
| 436 | (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1); |
| 437 | } |
| 438 | |
| 439 | /* The last descriptor will generate an interrupt */ |
| 440 | ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | |
| 441 | DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size); |
| 442 | ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, |
| 443 | (buf+(i-1)*PAGE_SIZE) - |
| 444 | (unsigned long)d->dma.kvirt)); |
| 445 | } else { |
| 446 | /* Only one DMA page is used. Read d->left_size immediately and */ |
| 447 | /* generate an interrupt as this is also the last page. */ |
| 448 | ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | |
| 449 | DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4)); |
| 450 | ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, |
| 451 | (buf + 4) - (unsigned long)d->dma.kvirt)); |
| 452 | } |
| 453 | } |
| 454 | |
| 455 | static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags) |
| 456 | { |
| 457 | struct ti_ohci *ohci = (struct ti_ohci *)d->ohci; |
| 458 | int i; |
| 459 | |
| 460 | d->flags = flags; |
| 461 | |
| 462 | ohci1394_stop_context(ohci, d->ctrlClear, NULL); |
| 463 | |
| 464 | for (i=0;i<d->num_desc;i++) { |
| 465 | initialize_dma_ir_prg(d, i, flags); |
| 466 | reset_ir_status(d, i); |
| 467 | } |
| 468 | |
| 469 | /* reset the ctrl register */ |
| 470 | reg_write(ohci, d->ctrlClear, 0xf0000000); |
| 471 | |
| 472 | /* Set bufferFill */ |
| 473 | reg_write(ohci, d->ctrlSet, 0x80000000); |
| 474 | |
| 475 | /* Set isoch header */ |
| 476 | if (flags & VIDEO1394_INCLUDE_ISO_HEADERS) |
| 477 | reg_write(ohci, d->ctrlSet, 0x40000000); |
| 478 | |
| 479 | /* Set the context match register to match on all tags, |
| 480 | sync for sync tag, and listen to d->channel */ |
| 481 | reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel); |
| 482 | |
| 483 | /* Set up isoRecvIntMask to generate interrupts */ |
| 484 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx); |
| 485 | } |
| 486 | |
| 487 | /* find which context is listening to this channel */ |
| 488 | static struct dma_iso_ctx * |
| 489 | find_ctx(struct list_head *list, int type, int channel) |
| 490 | { |
| 491 | struct dma_iso_ctx *ctx; |
| 492 | |
| 493 | list_for_each_entry(ctx, list, link) { |
| 494 | if (ctx->type == type && ctx->channel == channel) |
| 495 | return ctx; |
| 496 | } |
| 497 | |
| 498 | return NULL; |
| 499 | } |
| 500 | |
| 501 | static void wakeup_dma_ir_ctx(unsigned long l) |
| 502 | { |
| 503 | struct dma_iso_ctx *d = (struct dma_iso_ctx *) l; |
| 504 | int i; |
| 505 | |
| 506 | spin_lock(&d->lock); |
| 507 | |
| 508 | for (i = 0; i < d->num_desc; i++) { |
| 509 | if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) { |
| 510 | reset_ir_status(d, i); |
| 511 | d->buffer_status[i] = VIDEO1394_BUFFER_READY; |
| 512 | do_gettimeofday(&d->buffer_time[i]); |
| 513 | } |
| 514 | } |
| 515 | |
| 516 | spin_unlock(&d->lock); |
| 517 | |
| 518 | if (waitqueue_active(&d->waitq)) |
| 519 | wake_up_interruptible(&d->waitq); |
| 520 | } |
| 521 | |
| 522 | static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d, |
| 523 | int n) |
| 524 | { |
| 525 | unsigned char* buf = d->dma.kvirt + n * d->buf_size; |
| 526 | u32 cycleTimer; |
| 527 | u32 timeStamp; |
| 528 | |
| 529 | if (n == -1) { |
| 530 | return; |
| 531 | } |
| 532 | |
| 533 | cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 534 | |
| 535 | timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */ |
| 536 | timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12) |
| 537 | + (cycleTimer & 0xf000)) & 0xffff; |
| 538 | |
| 539 | buf[6] = timeStamp >> 8; |
| 540 | buf[7] = timeStamp & 0xff; |
| 541 | |
| 542 | /* if first packet is empty packet, then put timestamp into the next full one too */ |
| 543 | if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) { |
| 544 | buf += d->packet_size; |
| 545 | buf[6] = timeStamp >> 8; |
| 546 | buf[7] = timeStamp & 0xff; |
| 547 | } |
| 548 | |
| 549 | /* do the next buffer frame too in case of irq latency */ |
| 550 | n = d->next_buffer[n]; |
| 551 | if (n == -1) { |
| 552 | return; |
| 553 | } |
| 554 | buf = d->dma.kvirt + n * d->buf_size; |
| 555 | |
| 556 | timeStamp += (d->last_used_cmd[n] << 12) & 0xffff; |
| 557 | |
| 558 | buf[6] = timeStamp >> 8; |
| 559 | buf[7] = timeStamp & 0xff; |
| 560 | |
| 561 | /* if first packet is empty packet, then put timestamp into the next full one too */ |
| 562 | if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) { |
| 563 | buf += d->packet_size; |
| 564 | buf[6] = timeStamp >> 8; |
| 565 | buf[7] = timeStamp & 0xff; |
| 566 | } |
| 567 | |
| 568 | #if 0 |
| 569 | printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n", |
| 570 | curr, n, cycleTimer, timeStamp); |
| 571 | #endif |
| 572 | } |
| 573 | |
| 574 | static void wakeup_dma_it_ctx(unsigned long l) |
| 575 | { |
| 576 | struct dma_iso_ctx *d = (struct dma_iso_ctx *) l; |
| 577 | struct ti_ohci *ohci = d->ohci; |
| 578 | int i; |
| 579 | |
| 580 | spin_lock(&d->lock); |
| 581 | |
| 582 | for (i = 0; i < d->num_desc; i++) { |
| 583 | if (d->it_prg[i][d->last_used_cmd[i]].end.status & |
| 584 | cpu_to_le32(0xFFFF0000)) { |
| 585 | int next = d->next_buffer[i]; |
| 586 | put_timestamp(ohci, d, next); |
| 587 | d->it_prg[i][d->last_used_cmd[i]].end.status = 0; |
| 588 | d->buffer_status[i] = VIDEO1394_BUFFER_READY; |
| 589 | } |
| 590 | } |
| 591 | |
| 592 | spin_unlock(&d->lock); |
| 593 | |
| 594 | if (waitqueue_active(&d->waitq)) |
| 595 | wake_up_interruptible(&d->waitq); |
| 596 | } |
| 597 | |
| 598 | static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag) |
| 599 | { |
| 600 | struct it_dma_prg *it_prg = d->it_prg[n]; |
| 601 | struct dma_prog_region *it_reg = &d->prg_reg[n]; |
| 602 | unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size; |
| 603 | int i; |
| 604 | d->last_used_cmd[n] = d->nb_cmd - 1; |
| 605 | for (i=0;i<d->nb_cmd;i++) { |
| 606 | |
| 607 | it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE | |
| 608 | DMA_CTL_IMMEDIATE | 8) ; |
| 609 | it_prg[i].begin.address = 0; |
| 610 | |
| 611 | it_prg[i].begin.status = 0; |
| 612 | |
| 613 | it_prg[i].data[0] = cpu_to_le32( |
| 614 | (IEEE1394_SPEED_100 << 16) |
| 615 | | (/* tag */ 1 << 14) |
| 616 | | (d->channel << 8) |
| 617 | | (TCODE_ISO_DATA << 4)); |
| 618 | if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag); |
| 619 | it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16); |
| 620 | it_prg[i].data[2] = 0; |
| 621 | it_prg[i].data[3] = 0; |
| 622 | |
| 623 | it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | |
| 624 | DMA_CTL_BRANCH); |
| 625 | it_prg[i].end.address = |
| 626 | cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) - |
| 627 | (unsigned long)d->dma.kvirt)); |
| 628 | |
| 629 | if (i<d->nb_cmd-1) { |
| 630 | it_prg[i].end.control |= cpu_to_le32(d->packet_size); |
| 631 | it_prg[i].begin.branchAddress = |
| 632 | cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) * |
| 633 | sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3); |
| 634 | it_prg[i].end.branchAddress = |
| 635 | cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) * |
| 636 | sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3); |
| 637 | } else { |
| 638 | /* the last prg generates an interrupt */ |
| 639 | it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE | |
| 640 | DMA_CTL_IRQ | d->left_size); |
| 641 | /* the last prg doesn't branch */ |
| 642 | it_prg[i].begin.branchAddress = 0; |
| 643 | it_prg[i].end.branchAddress = 0; |
| 644 | } |
| 645 | it_prg[i].end.status = 0; |
| 646 | } |
| 647 | } |
| 648 | |
| 649 | static void initialize_dma_it_prg_var_packet_queue( |
| 650 | struct dma_iso_ctx *d, int n, unsigned int * packet_sizes, |
| 651 | struct ti_ohci *ohci) |
| 652 | { |
| 653 | struct it_dma_prg *it_prg = d->it_prg[n]; |
| 654 | struct dma_prog_region *it_reg = &d->prg_reg[n]; |
| 655 | int i; |
| 656 | |
| 657 | #if 0 |
| 658 | if (n != -1) { |
| 659 | put_timestamp(ohci, d, n); |
| 660 | } |
| 661 | #endif |
| 662 | d->last_used_cmd[n] = d->nb_cmd - 1; |
| 663 | |
| 664 | for (i = 0; i < d->nb_cmd; i++) { |
| 665 | unsigned int size; |
| 666 | if (packet_sizes[i] > d->packet_size) { |
| 667 | size = d->packet_size; |
| 668 | } else { |
| 669 | size = packet_sizes[i]; |
| 670 | } |
| 671 | it_prg[i].data[1] = cpu_to_le32(size << 16); |
| 672 | it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH); |
| 673 | |
| 674 | if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) { |
| 675 | it_prg[i].end.control |= cpu_to_le32(size); |
| 676 | it_prg[i].begin.branchAddress = |
| 677 | cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) * |
| 678 | sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3); |
| 679 | it_prg[i].end.branchAddress = |
| 680 | cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) * |
| 681 | sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3); |
| 682 | } else { |
| 683 | /* the last prg generates an interrupt */ |
| 684 | it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE | |
| 685 | DMA_CTL_IRQ | size); |
| 686 | /* the last prg doesn't branch */ |
| 687 | it_prg[i].begin.branchAddress = 0; |
| 688 | it_prg[i].end.branchAddress = 0; |
| 689 | d->last_used_cmd[n] = i; |
| 690 | break; |
| 691 | } |
| 692 | } |
| 693 | } |
| 694 | |
| 695 | static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag, |
| 696 | unsigned int syt_offset, int flags) |
| 697 | { |
| 698 | struct ti_ohci *ohci = (struct ti_ohci *)d->ohci; |
| 699 | int i; |
| 700 | |
| 701 | d->flags = flags; |
| 702 | d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset); |
| 703 | |
| 704 | ohci1394_stop_context(ohci, d->ctrlClear, NULL); |
| 705 | |
| 706 | for (i=0;i<d->num_desc;i++) |
| 707 | initialize_dma_it_prg(d, i, sync_tag); |
| 708 | |
| 709 | /* Set up isoRecvIntMask to generate interrupts */ |
| 710 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx); |
| 711 | } |
| 712 | |
| 713 | static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d, |
| 714 | unsigned int buffer) |
| 715 | { |
| 716 | unsigned long flags; |
| 717 | unsigned int ret; |
| 718 | spin_lock_irqsave(&d->lock, flags); |
| 719 | ret = d->buffer_status[buffer]; |
| 720 | spin_unlock_irqrestore(&d->lock, flags); |
| 721 | return ret; |
| 722 | } |
| 723 | |
| 724 | static int __video1394_ioctl(struct file *file, |
| 725 | unsigned int cmd, unsigned long arg) |
| 726 | { |
| 727 | struct file_ctx *ctx = (struct file_ctx *)file->private_data; |
| 728 | struct ti_ohci *ohci = ctx->ohci; |
| 729 | unsigned long flags; |
| 730 | void __user *argp = (void __user *)arg; |
| 731 | |
| 732 | switch(cmd) |
| 733 | { |
| 734 | case VIDEO1394_IOC_LISTEN_CHANNEL: |
| 735 | case VIDEO1394_IOC_TALK_CHANNEL: |
| 736 | { |
| 737 | struct video1394_mmap v; |
| 738 | u64 mask; |
| 739 | struct dma_iso_ctx *d; |
| 740 | int i; |
| 741 | |
| 742 | if (copy_from_user(&v, argp, sizeof(v))) |
| 743 | return -EFAULT; |
| 744 | |
| 745 | /* if channel < 0, find lowest available one */ |
| 746 | if (v.channel < 0) { |
| 747 | mask = (u64)0x1; |
| 748 | for (i=0; ; i++) { |
| 749 | if (i == ISO_CHANNELS) { |
| 750 | PRINT(KERN_ERR, ohci->host->id, |
| 751 | "No free channel found"); |
| 752 | return EAGAIN; |
| 753 | } |
| 754 | if (!(ohci->ISO_channel_usage & mask)) { |
| 755 | v.channel = i; |
| 756 | PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i); |
| 757 | break; |
| 758 | } |
| 759 | mask = mask << 1; |
| 760 | } |
| 761 | } else if (v.channel >= ISO_CHANNELS) { |
| 762 | PRINT(KERN_ERR, ohci->host->id, |
| 763 | "Iso channel %d out of bounds", v.channel); |
| 764 | return -EINVAL; |
| 765 | } else { |
| 766 | mask = (u64)0x1<<v.channel; |
| 767 | } |
| 768 | PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n", |
| 769 | (u32)(mask>>32),(u32)(mask&0xffffffff), |
| 770 | (u32)(ohci->ISO_channel_usage>>32), |
| 771 | (u32)(ohci->ISO_channel_usage&0xffffffff)); |
| 772 | if (ohci->ISO_channel_usage & mask) { |
| 773 | PRINT(KERN_ERR, ohci->host->id, |
| 774 | "Channel %d is already taken", v.channel); |
| 775 | return -EBUSY; |
| 776 | } |
| 777 | |
| 778 | if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) { |
| 779 | PRINT(KERN_ERR, ohci->host->id, |
| 780 | "Invalid %d length buffer requested",v.buf_size); |
| 781 | return -EINVAL; |
| 782 | } |
| 783 | |
| 784 | if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) { |
| 785 | PRINT(KERN_ERR, ohci->host->id, |
| 786 | "Invalid %d buffers requested",v.nb_buffers); |
| 787 | return -EINVAL; |
| 788 | } |
| 789 | |
| 790 | if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) { |
| 791 | PRINT(KERN_ERR, ohci->host->id, |
| 792 | "%d buffers of size %d bytes is too big", |
| 793 | v.nb_buffers, v.buf_size); |
| 794 | return -EINVAL; |
| 795 | } |
| 796 | |
| 797 | if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) { |
| 798 | d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE, |
| 799 | v.nb_buffers, v.buf_size, |
| 800 | v.channel, 0); |
| 801 | |
| 802 | if (d == NULL) { |
| 803 | PRINT(KERN_ERR, ohci->host->id, |
| 804 | "Couldn't allocate ir context"); |
| 805 | return -EAGAIN; |
| 806 | } |
| 807 | initialize_dma_ir_ctx(d, v.sync_tag, v.flags); |
| 808 | |
| 809 | ctx->current_ctx = d; |
| 810 | |
| 811 | v.buf_size = d->buf_size; |
| 812 | list_add_tail(&d->link, &ctx->context_list); |
| 813 | |
| 814 | PRINT(KERN_INFO, ohci->host->id, |
| 815 | "iso context %d listen on channel %d", |
| 816 | d->ctx, v.channel); |
| 817 | } |
| 818 | else { |
| 819 | d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT, |
| 820 | v.nb_buffers, v.buf_size, |
| 821 | v.channel, v.packet_size); |
| 822 | |
| 823 | if (d == NULL) { |
| 824 | PRINT(KERN_ERR, ohci->host->id, |
| 825 | "Couldn't allocate it context"); |
| 826 | return -EAGAIN; |
| 827 | } |
| 828 | initialize_dma_it_ctx(d, v.sync_tag, |
| 829 | v.syt_offset, v.flags); |
| 830 | |
| 831 | ctx->current_ctx = d; |
| 832 | |
| 833 | v.buf_size = d->buf_size; |
| 834 | |
| 835 | list_add_tail(&d->link, &ctx->context_list); |
| 836 | |
| 837 | PRINT(KERN_INFO, ohci->host->id, |
| 838 | "Iso context %d talk on channel %d", d->ctx, |
| 839 | v.channel); |
| 840 | } |
| 841 | |
| 842 | if (copy_to_user((void *)arg, &v, sizeof(v))) { |
| 843 | /* FIXME : free allocated dma resources */ |
| 844 | return -EFAULT; |
| 845 | } |
| 846 | |
| 847 | ohci->ISO_channel_usage |= mask; |
| 848 | |
| 849 | return 0; |
| 850 | } |
| 851 | case VIDEO1394_IOC_UNLISTEN_CHANNEL: |
| 852 | case VIDEO1394_IOC_UNTALK_CHANNEL: |
| 853 | { |
| 854 | int channel; |
| 855 | u64 mask; |
| 856 | struct dma_iso_ctx *d; |
| 857 | |
| 858 | if (copy_from_user(&channel, argp, sizeof(int))) |
| 859 | return -EFAULT; |
| 860 | |
| 861 | if (channel < 0 || channel >= ISO_CHANNELS) { |
| 862 | PRINT(KERN_ERR, ohci->host->id, |
| 863 | "Iso channel %d out of bound", channel); |
| 864 | return -EINVAL; |
| 865 | } |
| 866 | mask = (u64)0x1<<channel; |
| 867 | if (!(ohci->ISO_channel_usage & mask)) { |
| 868 | PRINT(KERN_ERR, ohci->host->id, |
| 869 | "Channel %d is not being used", channel); |
| 870 | return -ESRCH; |
| 871 | } |
| 872 | |
| 873 | /* Mark this channel as unused */ |
| 874 | ohci->ISO_channel_usage &= ~mask; |
| 875 | |
| 876 | if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL) |
| 877 | d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel); |
| 878 | else |
| 879 | d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel); |
| 880 | |
| 881 | if (d == NULL) return -ESRCH; |
| 882 | PRINT(KERN_INFO, ohci->host->id, "Iso context %d " |
| 883 | "stop talking on channel %d", d->ctx, channel); |
| 884 | free_dma_iso_ctx(d); |
| 885 | |
| 886 | return 0; |
| 887 | } |
| 888 | case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER: |
| 889 | { |
| 890 | struct video1394_wait v; |
| 891 | struct dma_iso_ctx *d; |
| 892 | |
| 893 | if (copy_from_user(&v, argp, sizeof(v))) |
| 894 | return -EFAULT; |
| 895 | |
| 896 | d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel); |
| 897 | if (d == NULL) return -EFAULT; |
| 898 | |
| 899 | if ((v.buffer<0) || (v.buffer>d->num_desc)) { |
| 900 | PRINT(KERN_ERR, ohci->host->id, |
| 901 | "Buffer %d out of range",v.buffer); |
| 902 | return -EINVAL; |
| 903 | } |
| 904 | |
| 905 | spin_lock_irqsave(&d->lock,flags); |
| 906 | |
| 907 | if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) { |
| 908 | PRINT(KERN_ERR, ohci->host->id, |
| 909 | "Buffer %d is already used",v.buffer); |
| 910 | spin_unlock_irqrestore(&d->lock,flags); |
| 911 | return -EBUSY; |
| 912 | } |
| 913 | |
| 914 | d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED; |
| 915 | |
| 916 | if (d->last_buffer>=0) |
| 917 | d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = |
| 918 | cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) |
| 919 | & 0xfffffff0) | 0x1); |
| 920 | |
| 921 | d->last_buffer = v.buffer; |
| 922 | |
| 923 | d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0; |
| 924 | |
| 925 | spin_unlock_irqrestore(&d->lock,flags); |
| 926 | |
| 927 | if (!(reg_read(ohci, d->ctrlSet) & 0x8000)) |
| 928 | { |
| 929 | DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx); |
| 930 | |
| 931 | /* Tell the controller where the first program is */ |
| 932 | reg_write(ohci, d->cmdPtr, |
| 933 | dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x1); |
| 934 | |
| 935 | /* Run IR context */ |
| 936 | reg_write(ohci, d->ctrlSet, 0x8000); |
| 937 | } |
| 938 | else { |
| 939 | /* Wake up dma context if necessary */ |
| 940 | if (!(reg_read(ohci, d->ctrlSet) & 0x400)) { |
| 941 | PRINT(KERN_INFO, ohci->host->id, |
| 942 | "Waking up iso dma ctx=%d", d->ctx); |
| 943 | reg_write(ohci, d->ctrlSet, 0x1000); |
| 944 | } |
| 945 | } |
| 946 | return 0; |
| 947 | |
| 948 | } |
| 949 | case VIDEO1394_IOC_LISTEN_WAIT_BUFFER: |
| 950 | case VIDEO1394_IOC_LISTEN_POLL_BUFFER: |
| 951 | { |
| 952 | struct video1394_wait v; |
| 953 | struct dma_iso_ctx *d; |
| 954 | int i; |
| 955 | |
| 956 | if (copy_from_user(&v, argp, sizeof(v))) |
| 957 | return -EFAULT; |
| 958 | |
| 959 | d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel); |
| 960 | if (d == NULL) return -EFAULT; |
| 961 | |
| 962 | if ((v.buffer<0) || (v.buffer>d->num_desc)) { |
| 963 | PRINT(KERN_ERR, ohci->host->id, |
| 964 | "Buffer %d out of range",v.buffer); |
| 965 | return -EINVAL; |
| 966 | } |
| 967 | |
| 968 | /* |
| 969 | * I change the way it works so that it returns |
| 970 | * the last received frame. |
| 971 | */ |
| 972 | spin_lock_irqsave(&d->lock, flags); |
| 973 | switch(d->buffer_status[v.buffer]) { |
| 974 | case VIDEO1394_BUFFER_READY: |
| 975 | d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE; |
| 976 | break; |
| 977 | case VIDEO1394_BUFFER_QUEUED: |
| 978 | if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) { |
| 979 | /* for polling, return error code EINTR */ |
| 980 | spin_unlock_irqrestore(&d->lock, flags); |
| 981 | return -EINTR; |
| 982 | } |
| 983 | |
| 984 | spin_unlock_irqrestore(&d->lock, flags); |
| 985 | wait_event_interruptible(d->waitq, |
| 986 | video1394_buffer_state(d, v.buffer) == |
| 987 | VIDEO1394_BUFFER_READY); |
| 988 | if (signal_pending(current)) |
| 989 | return -EINTR; |
| 990 | spin_lock_irqsave(&d->lock, flags); |
| 991 | d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE; |
| 992 | break; |
| 993 | default: |
| 994 | PRINT(KERN_ERR, ohci->host->id, |
| 995 | "Buffer %d is not queued",v.buffer); |
| 996 | spin_unlock_irqrestore(&d->lock, flags); |
| 997 | return -ESRCH; |
| 998 | } |
| 999 | |
| 1000 | /* set time of buffer */ |
| 1001 | v.filltime = d->buffer_time[v.buffer]; |
| 1002 | // printk("Buffer %d time %d\n", v.buffer, (d->buffer_time[v.buffer]).tv_usec); |
| 1003 | |
| 1004 | /* |
| 1005 | * Look ahead to see how many more buffers have been received |
| 1006 | */ |
| 1007 | i=0; |
| 1008 | while (d->buffer_status[(v.buffer+1)%d->num_desc]== |
| 1009 | VIDEO1394_BUFFER_READY) { |
| 1010 | v.buffer=(v.buffer+1)%d->num_desc; |
| 1011 | i++; |
| 1012 | } |
| 1013 | spin_unlock_irqrestore(&d->lock, flags); |
| 1014 | |
| 1015 | v.buffer=i; |
| 1016 | if (copy_to_user(argp, &v, sizeof(v))) |
| 1017 | return -EFAULT; |
| 1018 | |
| 1019 | return 0; |
| 1020 | } |
| 1021 | case VIDEO1394_IOC_TALK_QUEUE_BUFFER: |
| 1022 | { |
| 1023 | struct video1394_wait v; |
| 1024 | unsigned int *psizes = NULL; |
| 1025 | struct dma_iso_ctx *d; |
| 1026 | |
| 1027 | if (copy_from_user(&v, argp, sizeof(v))) |
| 1028 | return -EFAULT; |
| 1029 | |
| 1030 | d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel); |
| 1031 | if (d == NULL) return -EFAULT; |
| 1032 | |
| 1033 | if ((v.buffer<0) || (v.buffer>d->num_desc)) { |
| 1034 | PRINT(KERN_ERR, ohci->host->id, |
| 1035 | "Buffer %d out of range",v.buffer); |
| 1036 | return -EINVAL; |
| 1037 | } |
| 1038 | |
| 1039 | if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) { |
| 1040 | int buf_size = d->nb_cmd * sizeof(unsigned int); |
| 1041 | struct video1394_queue_variable __user *p = argp; |
| 1042 | unsigned int __user *qv; |
| 1043 | |
| 1044 | if (get_user(qv, &p->packet_sizes)) |
| 1045 | return -EFAULT; |
| 1046 | |
| 1047 | psizes = kmalloc(buf_size, GFP_KERNEL); |
| 1048 | if (!psizes) |
| 1049 | return -ENOMEM; |
| 1050 | |
| 1051 | if (copy_from_user(psizes, qv, buf_size)) { |
| 1052 | kfree(psizes); |
| 1053 | return -EFAULT; |
| 1054 | } |
| 1055 | } |
| 1056 | |
| 1057 | spin_lock_irqsave(&d->lock,flags); |
| 1058 | |
| 1059 | if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) { |
| 1060 | PRINT(KERN_ERR, ohci->host->id, |
| 1061 | "Buffer %d is already used",v.buffer); |
| 1062 | spin_unlock_irqrestore(&d->lock,flags); |
| 1063 | if (psizes) |
| 1064 | kfree(psizes); |
| 1065 | return -EBUSY; |
| 1066 | } |
| 1067 | |
| 1068 | if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) { |
| 1069 | initialize_dma_it_prg_var_packet_queue( |
| 1070 | d, v.buffer, psizes, |
| 1071 | ohci); |
| 1072 | } |
| 1073 | |
| 1074 | d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED; |
| 1075 | |
| 1076 | if (d->last_buffer >= 0) { |
| 1077 | d->it_prg[d->last_buffer] |
| 1078 | [ d->last_used_cmd[d->last_buffer] ].end.branchAddress = |
| 1079 | cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], |
| 1080 | 0) & 0xfffffff0) | 0x3); |
| 1081 | |
| 1082 | d->it_prg[d->last_buffer] |
| 1083 | [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress = |
| 1084 | cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], |
| 1085 | 0) & 0xfffffff0) | 0x3); |
| 1086 | d->next_buffer[d->last_buffer] = v.buffer; |
| 1087 | } |
| 1088 | d->last_buffer = v.buffer; |
| 1089 | d->next_buffer[d->last_buffer] = -1; |
| 1090 | |
| 1091 | d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0; |
| 1092 | |
| 1093 | spin_unlock_irqrestore(&d->lock,flags); |
| 1094 | |
| 1095 | if (!(reg_read(ohci, d->ctrlSet) & 0x8000)) |
| 1096 | { |
| 1097 | DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d", |
| 1098 | d->ctx); |
| 1099 | put_timestamp(ohci, d, d->last_buffer); |
| 1100 | |
| 1101 | /* Tell the controller where the first program is */ |
| 1102 | reg_write(ohci, d->cmdPtr, |
| 1103 | dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x3); |
| 1104 | |
| 1105 | /* Run IT context */ |
| 1106 | reg_write(ohci, d->ctrlSet, 0x8000); |
| 1107 | } |
| 1108 | else { |
| 1109 | /* Wake up dma context if necessary */ |
| 1110 | if (!(reg_read(ohci, d->ctrlSet) & 0x400)) { |
| 1111 | PRINT(KERN_INFO, ohci->host->id, |
| 1112 | "Waking up iso transmit dma ctx=%d", |
| 1113 | d->ctx); |
| 1114 | put_timestamp(ohci, d, d->last_buffer); |
| 1115 | reg_write(ohci, d->ctrlSet, 0x1000); |
| 1116 | } |
| 1117 | } |
| 1118 | |
| 1119 | if (psizes) |
| 1120 | kfree(psizes); |
| 1121 | |
| 1122 | return 0; |
| 1123 | |
| 1124 | } |
| 1125 | case VIDEO1394_IOC_TALK_WAIT_BUFFER: |
| 1126 | { |
| 1127 | struct video1394_wait v; |
| 1128 | struct dma_iso_ctx *d; |
| 1129 | |
| 1130 | if (copy_from_user(&v, argp, sizeof(v))) |
| 1131 | return -EFAULT; |
| 1132 | |
| 1133 | d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel); |
| 1134 | if (d == NULL) return -EFAULT; |
| 1135 | |
| 1136 | if ((v.buffer<0) || (v.buffer>d->num_desc)) { |
| 1137 | PRINT(KERN_ERR, ohci->host->id, |
| 1138 | "Buffer %d out of range",v.buffer); |
| 1139 | return -EINVAL; |
| 1140 | } |
| 1141 | |
| 1142 | switch(d->buffer_status[v.buffer]) { |
| 1143 | case VIDEO1394_BUFFER_READY: |
| 1144 | d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE; |
| 1145 | return 0; |
| 1146 | case VIDEO1394_BUFFER_QUEUED: |
| 1147 | wait_event_interruptible(d->waitq, |
| 1148 | (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY)); |
| 1149 | if (signal_pending(current)) |
| 1150 | return -EINTR; |
| 1151 | d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE; |
| 1152 | return 0; |
| 1153 | default: |
| 1154 | PRINT(KERN_ERR, ohci->host->id, |
| 1155 | "Buffer %d is not queued",v.buffer); |
| 1156 | return -ESRCH; |
| 1157 | } |
| 1158 | } |
| 1159 | default: |
| 1160 | return -ENOTTY; |
| 1161 | } |
| 1162 | } |
| 1163 | |
| 1164 | static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
| 1165 | { |
| 1166 | int err; |
| 1167 | lock_kernel(); |
| 1168 | err = __video1394_ioctl(file, cmd, arg); |
| 1169 | unlock_kernel(); |
| 1170 | return err; |
| 1171 | } |
| 1172 | |
| 1173 | /* |
| 1174 | * This maps the vmalloced and reserved buffer to user space. |
| 1175 | * |
| 1176 | * FIXME: |
| 1177 | * - PAGE_READONLY should suffice!? |
| 1178 | * - remap_pfn_range is kind of inefficient for page by page remapping. |
| 1179 | * But e.g. pte_alloc() does not work in modules ... :-( |
| 1180 | */ |
| 1181 | |
| 1182 | static int video1394_mmap(struct file *file, struct vm_area_struct *vma) |
| 1183 | { |
| 1184 | struct file_ctx *ctx = (struct file_ctx *)file->private_data; |
| 1185 | int res = -EINVAL; |
| 1186 | |
| 1187 | lock_kernel(); |
| 1188 | if (ctx->current_ctx == NULL) { |
| 1189 | PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set"); |
| 1190 | } else |
| 1191 | res = dma_region_mmap(&ctx->current_ctx->dma, file, vma); |
| 1192 | unlock_kernel(); |
| 1193 | |
| 1194 | return res; |
| 1195 | } |
| 1196 | |
| 1197 | static int video1394_open(struct inode *inode, struct file *file) |
| 1198 | { |
| 1199 | int i = ieee1394_file_to_instance(file); |
| 1200 | struct ti_ohci *ohci; |
| 1201 | struct file_ctx *ctx; |
| 1202 | |
| 1203 | ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i); |
| 1204 | if (ohci == NULL) |
| 1205 | return -EIO; |
| 1206 | |
| 1207 | ctx = kmalloc(sizeof(struct file_ctx), GFP_KERNEL); |
| 1208 | if (ctx == NULL) { |
| 1209 | PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx"); |
| 1210 | return -ENOMEM; |
| 1211 | } |
| 1212 | |
| 1213 | memset(ctx, 0, sizeof(struct file_ctx)); |
| 1214 | ctx->ohci = ohci; |
| 1215 | INIT_LIST_HEAD(&ctx->context_list); |
| 1216 | ctx->current_ctx = NULL; |
| 1217 | file->private_data = ctx; |
| 1218 | |
| 1219 | return 0; |
| 1220 | } |
| 1221 | |
| 1222 | static int video1394_release(struct inode *inode, struct file *file) |
| 1223 | { |
| 1224 | struct file_ctx *ctx = (struct file_ctx *)file->private_data; |
| 1225 | struct ti_ohci *ohci = ctx->ohci; |
| 1226 | struct list_head *lh, *next; |
| 1227 | u64 mask; |
| 1228 | |
| 1229 | lock_kernel(); |
| 1230 | list_for_each_safe(lh, next, &ctx->context_list) { |
| 1231 | struct dma_iso_ctx *d; |
| 1232 | d = list_entry(lh, struct dma_iso_ctx, link); |
| 1233 | mask = (u64) 1 << d->channel; |
| 1234 | |
| 1235 | if (!(ohci->ISO_channel_usage & mask)) |
| 1236 | PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d " |
| 1237 | "is not being used", d->channel); |
| 1238 | else |
| 1239 | ohci->ISO_channel_usage &= ~mask; |
| 1240 | PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context " |
| 1241 | "%d stop listening on channel %d", |
| 1242 | d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit", |
| 1243 | d->ctx, d->channel); |
| 1244 | free_dma_iso_ctx(d); |
| 1245 | } |
| 1246 | |
| 1247 | kfree(ctx); |
| 1248 | file->private_data = NULL; |
| 1249 | |
| 1250 | unlock_kernel(); |
| 1251 | return 0; |
| 1252 | } |
| 1253 | |
| 1254 | #ifdef CONFIG_COMPAT |
| 1255 | static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg); |
| 1256 | #endif |
| 1257 | |
| 1258 | static struct cdev video1394_cdev; |
| 1259 | static struct file_operations video1394_fops= |
| 1260 | { |
| 1261 | .owner = THIS_MODULE, |
| 1262 | .unlocked_ioctl = video1394_ioctl, |
| 1263 | #ifdef CONFIG_COMPAT |
| 1264 | .compat_ioctl = video1394_compat_ioctl, |
| 1265 | #endif |
| 1266 | .mmap = video1394_mmap, |
| 1267 | .open = video1394_open, |
| 1268 | .release = video1394_release |
| 1269 | }; |
| 1270 | |
| 1271 | /*** HOTPLUG STUFF **********************************************************/ |
| 1272 | /* |
| 1273 | * Export information about protocols/devices supported by this driver. |
| 1274 | */ |
| 1275 | static struct ieee1394_device_id video1394_id_table[] = { |
| 1276 | { |
| 1277 | .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION, |
| 1278 | .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff, |
| 1279 | .version = CAMERA_SW_VERSION_ENTRY & 0xffffff |
| 1280 | }, |
| 1281 | { |
| 1282 | .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION, |
| 1283 | .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff, |
| 1284 | .version = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff |
| 1285 | }, |
| 1286 | { |
| 1287 | .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION, |
| 1288 | .specifier_id = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff, |
| 1289 | .version = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff |
| 1290 | }, |
| 1291 | { } |
| 1292 | }; |
| 1293 | |
| 1294 | MODULE_DEVICE_TABLE(ieee1394, video1394_id_table); |
| 1295 | |
| 1296 | static struct hpsb_protocol_driver video1394_driver = { |
| 1297 | .name = "1394 Digital Camera Driver", |
| 1298 | .id_table = video1394_id_table, |
| 1299 | .driver = { |
| 1300 | .name = VIDEO1394_DRIVER_NAME, |
| 1301 | .bus = &ieee1394_bus_type, |
| 1302 | }, |
| 1303 | }; |
| 1304 | |
| 1305 | |
| 1306 | static void video1394_add_host (struct hpsb_host *host) |
| 1307 | { |
| 1308 | struct ti_ohci *ohci; |
| 1309 | int minor; |
| 1310 | |
| 1311 | /* We only work with the OHCI-1394 driver */ |
| 1312 | if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME)) |
| 1313 | return; |
| 1314 | |
| 1315 | ohci = (struct ti_ohci *)host->hostdata; |
| 1316 | |
| 1317 | if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) { |
| 1318 | PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo"); |
| 1319 | return; |
| 1320 | } |
| 1321 | |
| 1322 | hpsb_set_hostinfo(&video1394_highlevel, host, ohci); |
| 1323 | hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id); |
| 1324 | |
| 1325 | minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id; |
| 1326 | class_simple_device_add(hpsb_protocol_class, MKDEV( |
| 1327 | IEEE1394_MAJOR, minor), |
| 1328 | NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id); |
| 1329 | devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor), |
| 1330 | S_IFCHR | S_IRUSR | S_IWUSR, |
| 1331 | "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id); |
| 1332 | } |
| 1333 | |
| 1334 | |
| 1335 | static void video1394_remove_host (struct hpsb_host *host) |
| 1336 | { |
| 1337 | struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host); |
| 1338 | |
| 1339 | if (ohci) { |
| 1340 | class_simple_device_remove(MKDEV(IEEE1394_MAJOR, |
| 1341 | IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id)); |
| 1342 | devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id); |
| 1343 | } |
| 1344 | |
| 1345 | return; |
| 1346 | } |
| 1347 | |
| 1348 | |
| 1349 | static struct hpsb_highlevel video1394_highlevel = { |
| 1350 | .name = VIDEO1394_DRIVER_NAME, |
| 1351 | .add_host = video1394_add_host, |
| 1352 | .remove_host = video1394_remove_host, |
| 1353 | }; |
| 1354 | |
| 1355 | MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>"); |
| 1356 | MODULE_DESCRIPTION("driver for digital video on OHCI board"); |
| 1357 | MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME); |
| 1358 | MODULE_LICENSE("GPL"); |
| 1359 | |
| 1360 | #ifdef CONFIG_COMPAT |
| 1361 | |
| 1362 | #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER \ |
| 1363 | _IOW ('#', 0x12, struct video1394_wait32) |
| 1364 | #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER \ |
| 1365 | _IOWR('#', 0x13, struct video1394_wait32) |
| 1366 | #define VIDEO1394_IOC32_TALK_WAIT_BUFFER \ |
| 1367 | _IOW ('#', 0x17, struct video1394_wait32) |
| 1368 | #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER \ |
| 1369 | _IOWR('#', 0x18, struct video1394_wait32) |
| 1370 | |
| 1371 | struct video1394_wait32 { |
| 1372 | u32 channel; |
| 1373 | u32 buffer; |
| 1374 | struct compat_timeval filltime; |
| 1375 | }; |
| 1376 | |
| 1377 | static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg) |
| 1378 | { |
| 1379 | struct video1394_wait32 __user *argp = (void __user *)arg; |
| 1380 | struct video1394_wait32 wait32; |
| 1381 | struct video1394_wait wait; |
| 1382 | mm_segment_t old_fs; |
| 1383 | int ret; |
| 1384 | |
| 1385 | if (copy_from_user(&wait32, argp, sizeof(wait32))) |
| 1386 | return -EFAULT; |
| 1387 | |
| 1388 | wait.channel = wait32.channel; |
| 1389 | wait.buffer = wait32.buffer; |
| 1390 | wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec; |
| 1391 | wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec; |
| 1392 | |
| 1393 | old_fs = get_fs(); |
| 1394 | set_fs(KERNEL_DS); |
| 1395 | if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER) |
| 1396 | ret = video1394_ioctl(file, |
| 1397 | VIDEO1394_IOC_LISTEN_WAIT_BUFFER, |
| 1398 | (unsigned long) &wait); |
| 1399 | else |
| 1400 | ret = video1394_ioctl(file, |
| 1401 | VIDEO1394_IOC_LISTEN_POLL_BUFFER, |
| 1402 | (unsigned long) &wait); |
| 1403 | set_fs(old_fs); |
| 1404 | |
| 1405 | if (!ret) { |
| 1406 | wait32.channel = wait.channel; |
| 1407 | wait32.buffer = wait.buffer; |
| 1408 | wait32.filltime.tv_sec = (int)wait.filltime.tv_sec; |
| 1409 | wait32.filltime.tv_usec = (int)wait.filltime.tv_usec; |
| 1410 | |
| 1411 | if (copy_to_user(argp, &wait32, sizeof(wait32))) |
| 1412 | ret = -EFAULT; |
| 1413 | } |
| 1414 | |
| 1415 | return ret; |
| 1416 | } |
| 1417 | |
| 1418 | static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg) |
| 1419 | { |
| 1420 | struct video1394_wait32 wait32; |
| 1421 | struct video1394_wait wait; |
| 1422 | mm_segment_t old_fs; |
| 1423 | int ret; |
| 1424 | |
| 1425 | if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32))) |
| 1426 | return -EFAULT; |
| 1427 | |
| 1428 | wait.channel = wait32.channel; |
| 1429 | wait.buffer = wait32.buffer; |
| 1430 | wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec; |
| 1431 | wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec; |
| 1432 | |
| 1433 | old_fs = get_fs(); |
| 1434 | set_fs(KERNEL_DS); |
| 1435 | if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER) |
| 1436 | ret = video1394_ioctl(file, |
| 1437 | VIDEO1394_IOC_LISTEN_QUEUE_BUFFER, |
| 1438 | (unsigned long) &wait); |
| 1439 | else |
| 1440 | ret = video1394_ioctl(file, |
| 1441 | VIDEO1394_IOC_TALK_WAIT_BUFFER, |
| 1442 | (unsigned long) &wait); |
| 1443 | set_fs(old_fs); |
| 1444 | |
| 1445 | return ret; |
| 1446 | } |
| 1447 | |
| 1448 | static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg) |
| 1449 | { |
| 1450 | return -EFAULT; /* ??? was there before. */ |
| 1451 | |
| 1452 | return video1394_ioctl(file, |
| 1453 | VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg); |
| 1454 | } |
| 1455 | |
| 1456 | static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg) |
| 1457 | { |
| 1458 | switch (cmd) { |
| 1459 | case VIDEO1394_IOC_LISTEN_CHANNEL: |
| 1460 | case VIDEO1394_IOC_UNLISTEN_CHANNEL: |
| 1461 | case VIDEO1394_IOC_TALK_CHANNEL: |
| 1462 | case VIDEO1394_IOC_UNTALK_CHANNEL: |
| 1463 | return video1394_ioctl(f, cmd, arg); |
| 1464 | |
| 1465 | case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER: |
| 1466 | return video1394_w_wait32(f, cmd, arg); |
| 1467 | case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER: |
| 1468 | return video1394_wr_wait32(f, cmd, arg); |
| 1469 | case VIDEO1394_IOC_TALK_QUEUE_BUFFER: |
| 1470 | return video1394_queue_buf32(f, cmd, arg); |
| 1471 | case VIDEO1394_IOC32_TALK_WAIT_BUFFER: |
| 1472 | return video1394_w_wait32(f, cmd, arg); |
| 1473 | case VIDEO1394_IOC32_LISTEN_POLL_BUFFER: |
| 1474 | return video1394_wr_wait32(f, cmd, arg); |
| 1475 | default: |
| 1476 | return -ENOIOCTLCMD; |
| 1477 | } |
| 1478 | } |
| 1479 | |
| 1480 | #endif /* CONFIG_COMPAT */ |
| 1481 | |
| 1482 | static void __exit video1394_exit_module (void) |
| 1483 | { |
| 1484 | hpsb_unregister_protocol(&video1394_driver); |
| 1485 | |
| 1486 | hpsb_unregister_highlevel(&video1394_highlevel); |
| 1487 | |
| 1488 | devfs_remove(VIDEO1394_DRIVER_NAME); |
| 1489 | cdev_del(&video1394_cdev); |
| 1490 | |
| 1491 | PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module"); |
| 1492 | } |
| 1493 | |
| 1494 | static int __init video1394_init_module (void) |
| 1495 | { |
| 1496 | int ret; |
| 1497 | |
| 1498 | cdev_init(&video1394_cdev, &video1394_fops); |
| 1499 | video1394_cdev.owner = THIS_MODULE; |
| 1500 | kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME); |
| 1501 | ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16); |
| 1502 | if (ret) { |
| 1503 | PRINT_G(KERN_ERR, "video1394: unable to get minor device block"); |
| 1504 | return ret; |
| 1505 | } |
| 1506 | |
| 1507 | devfs_mk_dir(VIDEO1394_DRIVER_NAME); |
| 1508 | |
| 1509 | hpsb_register_highlevel(&video1394_highlevel); |
| 1510 | |
| 1511 | ret = hpsb_register_protocol(&video1394_driver); |
| 1512 | if (ret) { |
| 1513 | PRINT_G(KERN_ERR, "video1394: failed to register protocol"); |
| 1514 | hpsb_unregister_highlevel(&video1394_highlevel); |
| 1515 | devfs_remove(VIDEO1394_DRIVER_NAME); |
| 1516 | cdev_del(&video1394_cdev); |
| 1517 | return ret; |
| 1518 | } |
| 1519 | |
| 1520 | PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module"); |
| 1521 | return 0; |
| 1522 | } |
| 1523 | |
| 1524 | |
| 1525 | module_init(video1394_init_module); |
| 1526 | module_exit(video1394_exit_module); |
| 1527 | MODULE_ALIAS_CHARDEV(IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_VIDEO1394 * 16); |