| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-arm/arch-camelot/irqs.h |
| 3 | * |
| 4 | * Copyright (C) 2001 Altera Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | /* Use the Excalibur chip definitions */ |
| 22 | #define INT_CTRL00_TYPE |
| 23 | #include "asm/arch/int_ctrl00.h" |
| 24 | |
| 25 | |
| 26 | #define IRQ_PLD0 INT_MS_P0_OFST |
| 27 | #define IRQ_PLD1 INT_MS_P1_OFST |
| 28 | #define IRQ_PLD2 INT_MS_P2_OFST |
| 29 | #define IRQ_PLD3 INT_MS_P3_OFST |
| 30 | #define IRQ_PLD4 INT_MS_P4_OFST |
| 31 | #define IRQ_PLD5 INT_MS_P5_OFST |
| 32 | #define IRQ_EXT INT_MS_IP_OFST |
| 33 | #define IRQ_UART INT_MS_UA_OFST |
| 34 | #define IRQ_TIMER0 INT_MS_T0_OFST |
| 35 | #define IRQ_TIMER1 INT_MS_T1_OFST |
| 36 | #define IRQ_PLL INT_MS_PLL_OFST |
| 37 | #define IRQ_EBI INT_MS_EBI_OFST |
| 38 | #define IRQ_STRIPE_BRIDGE INT_MS_PLL_OFST |
| 39 | #define IRQ_AHB_BRIDGE INT_MS_PLL_OFST |
| 40 | #define IRQ_COMMRX INT_MS_CR_OFST |
| 41 | #define IRQ_COMMTX INT_MS_CT_OFST |
| 42 | #define IRQ_FAST_COMM INT_MS_FC_OFST |
| 43 | |
| 44 | #define NR_IRQS (INT_MS_FC_OFST + 1) |
| 45 | |