| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * This file is subject to the terms and conditions of the GNU General Public | 
|  | 3 | * License.  See the file "COPYING" in the main directory of this archive | 
|  | 4 | * for more details. | 
|  | 5 | * | 
|  | 6 | * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) | 
|  | 7 | */ | 
|  | 8 | #include <linux/init.h> | 
|  | 9 | #include <linux/kernel.h> | 
|  | 10 | #include <linux/types.h> | 
|  | 11 | #include <linux/pci.h> | 
|  | 12 | #include <asm/titan_dep.h> | 
|  | 13 |  | 
|  | 14 | extern struct pci_ops titan_pci_ops; | 
|  | 15 |  | 
|  | 16 | static struct resource py_mem_resource = { | 
|  | 17 | "Titan PCI MEM", 0xe0000000UL, 0xe3ffffffUL, IORESOURCE_MEM | 
|  | 18 | }; | 
|  | 19 |  | 
|  | 20 | /* | 
|  | 21 | * PMON really reserves 16MB of I/O port space but that's stupid, nothing | 
|  | 22 | * needs that much since allocations are limited to 256 bytes per device | 
|  | 23 | * anyway.  So we just claim 64kB here. | 
|  | 24 | */ | 
|  | 25 | #define TITAN_IO_SIZE	0x0000ffffUL | 
|  | 26 | #define TITAN_IO_BASE	0xe8000000UL | 
|  | 27 |  | 
|  | 28 | static struct resource py_io_resource = { | 
|  | 29 | "Titan IO MEM", 0x00001000UL, TITAN_IO_SIZE - 1, IORESOURCE_IO, | 
|  | 30 | }; | 
|  | 31 |  | 
|  | 32 | static struct pci_controller py_controller = { | 
|  | 33 | .pci_ops	= &titan_pci_ops, | 
|  | 34 | .mem_resource	= &py_mem_resource, | 
|  | 35 | .mem_offset	= 0x00000000UL, | 
|  | 36 | .io_resource	= &py_io_resource, | 
|  | 37 | .io_offset	= 0x00000000UL | 
|  | 38 | }; | 
|  | 39 |  | 
|  | 40 | static char ioremap_failed[] __initdata = "Could not ioremap I/O port range"; | 
|  | 41 |  | 
|  | 42 | static int __init pmc_yosemite_setup(void) | 
|  | 43 | { | 
|  | 44 | unsigned long io_v_base; | 
|  | 45 |  | 
|  | 46 | io_v_base = (unsigned long) ioremap(TITAN_IO_BASE, TITAN_IO_SIZE); | 
|  | 47 | if (!io_v_base) | 
|  | 48 | panic(ioremap_failed); | 
|  | 49 |  | 
|  | 50 | set_io_port_base(io_v_base); | 
|  | 51 | TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1); | 
|  | 52 |  | 
|  | 53 | ioport_resource.end = TITAN_IO_SIZE - 1; | 
|  | 54 |  | 
|  | 55 | register_pci_controller(&py_controller); | 
|  | 56 |  | 
|  | 57 | return 0; | 
|  | 58 | } | 
|  | 59 |  | 
|  | 60 | arch_initcall(pmc_yosemite_setup); |