| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-mips/ddb5074.h -- NEC DDB Vrc-5074 definitions |
| 3 | * |
| 4 | * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com> |
| 5 | * Sony Software Development Center Europe (SDCE), Brussels |
| 6 | */ |
| 7 | |
| 8 | #ifndef _ASM_DDB5XXX_DDB5074_H |
| 9 | #define _ASM_DDB5XXX_DDB5074_H |
| 10 | |
| 11 | #include <asm/nile4.h> |
| 12 | |
| 13 | #define DDB_SDRAM_SIZE 0x04000000 /* 64MB */ |
| 14 | |
| 15 | #define DDB_PCI_IO_BASE 0x06000000 |
| 16 | #define DDB_PCI_IO_SIZE 0x02000000 /* 32 MB */ |
| 17 | |
| 18 | #define DDB_PCI_MEM_BASE 0x08000000 |
| 19 | #define DDB_PCI_MEM_SIZE 0x08000000 /* 128 MB */ |
| 20 | |
| 21 | #define DDB_PCI_CONFIG_BASE DDB_PCI_MEM_BASE |
| 22 | #define DDB_PCI_CONFIG_SIZE DDB_PCI_MEM_SIZE |
| 23 | |
| 24 | #define NILE4_PCI_IO_BASE 0xa6000000 |
| 25 | #define NILE4_PCI_MEM_BASE 0xa8000000 |
| 26 | #define NILE4_PCI_CFG_BASE NILE4_PCI_MEM_BASE |
| 27 | #define DDB_PCI_IACK_BASE NILE4_PCI_IO_BASE |
| 28 | |
| 29 | #define NILE4_IRQ_BASE NUM_I8259_INTERRUPTS |
| 30 | #define CPU_IRQ_BASE (NUM_NILE4_INTERRUPTS + NILE4_IRQ_BASE) |
| 31 | #define CPU_NILE4_CASCADE 2 |
| 32 | |
| 33 | extern void ddb5074_led_hex(int hex); |
| 34 | extern void ddb5074_led_d2(int on); |
| 35 | extern void ddb5074_led_d3(int on); |
| 36 | |
| 37 | extern void nile4_irq_setup(u32 base); |
| 38 | #endif |