| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/ppc/platforms/ev64260.h |
| 3 | * |
| 4 | * Definitions for Marvell/Galileo EV-64260-BP Evaluation Board. |
| 5 | * |
| 6 | * Author: Mark A. Greer <mgreer@mvista.com> |
| 7 | * |
| 8 | * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under |
| 9 | * the terms of the GNU General Public License version 2. This program |
| 10 | * is licensed "as is" without any warranty of any kind, whether express |
| 11 | * or implied. |
| 12 | */ |
| 13 | |
| 14 | /* |
| 15 | * The MV64x60 has 2 PCI buses each with 1 window from the CPU bus to |
| 16 | * PCI I/O space and 4 windows from the CPU bus to PCI MEM space. |
| 17 | * We'll only use one PCI MEM window on each PCI bus. |
| 18 | * |
| 19 | * This is the CPU physical memory map (windows must be at least 1MB and start |
| 20 | * on a boundary that is a multiple of the window size): |
| 21 | * |
| 22 | * 0xfc000000-0xffffffff - External FLASH on device module |
| 23 | * 0xfbf00000-0xfbffffff - Embedded (on board) FLASH |
| 24 | * 0xfbe00000-0xfbefffff - GT64260 Registers (preferably) |
| 25 | * but really a config option |
| 26 | * 0xfbd00000-0xfbdfffff - External SRAM on device module |
| 27 | * 0xfbc00000-0xfbcfffff - TODC chip on device module |
| 28 | * 0xfbb00000-0xfbbfffff - External UART on device module |
| 29 | * 0xa2000000-0xfbafffff - <hole> |
| 30 | * 0xa1000000-0xa1ffffff - PCI 1 I/O (defined in gt64260.h) |
| 31 | * 0xa0000000-0xa0ffffff - PCI 0 I/O (defined in gt64260.h) |
| 32 | * 0x90000000-0x9fffffff - PCI 1 MEM (defined in gt64260.h) |
| 33 | * 0x80000000-0x8fffffff - PCI 0 MEM (defined in gt64260.h) |
| 34 | */ |
| 35 | |
| 36 | #ifndef __PPC_PLATFORMS_EV64260_H |
| 37 | #define __PPC_PLATFORMS_EV64260_H |
| 38 | |
| 39 | /* PCI mappings */ |
| 40 | #define EV64260_PCI0_IO_CPU_BASE 0xa0000000 |
| 41 | #define EV64260_PCI0_IO_PCI_BASE 0x00000000 |
| 42 | #define EV64260_PCI0_IO_SIZE 0x01000000 |
| 43 | |
| 44 | #define EV64260_PCI0_MEM_CPU_BASE 0x80000000 |
| 45 | #define EV64260_PCI0_MEM_PCI_BASE 0x80000000 |
| 46 | #define EV64260_PCI0_MEM_SIZE 0x10000000 |
| 47 | |
| 48 | #define EV64260_PCI1_IO_CPU_BASE (EV64260_PCI0_IO_CPU_BASE + \ |
| 49 | EV64260_PCI0_IO_SIZE) |
| 50 | #define EV64260_PCI1_IO_PCI_BASE (EV64260_PCI0_IO_PCI_BASE + \ |
| 51 | EV64260_PCI0_IO_SIZE) |
| 52 | #define EV64260_PCI1_IO_SIZE 0x01000000 |
| 53 | |
| 54 | #define EV64260_PCI1_MEM_CPU_BASE (EV64260_PCI0_MEM_CPU_BASE + \ |
| 55 | EV64260_PCI0_MEM_SIZE) |
| 56 | #define EV64260_PCI1_MEM_PCI_BASE (EV64260_PCI0_MEM_PCI_BASE + \ |
| 57 | EV64260_PCI0_MEM_SIZE) |
| 58 | #define EV64260_PCI1_MEM_SIZE 0x10000000 |
| 59 | |
| 60 | /* CPU Physical Memory Map setup (other than PCI) */ |
| 61 | #define EV64260_EXT_FLASH_BASE 0xfc000000 |
| 62 | #define EV64260_EMB_FLASH_BASE 0xfbf00000 |
| 63 | #define EV64260_EXT_SRAM_BASE 0xfbd00000 |
| 64 | #define EV64260_TODC_BASE 0xfbc00000 |
| 65 | #define EV64260_UART_BASE 0xfbb00000 |
| 66 | |
| 67 | #define EV64260_EXT_FLASH_SIZE_ACTUAL 0x04000000 /* <= 64MB Extern FLASH */ |
| 68 | #define EV64260_EMB_FLASH_SIZE_ACTUAL 0x00080000 /* 512KB of Embed FLASH */ |
| 69 | #define EV64260_EXT_SRAM_SIZE_ACTUAL 0x00100000 /* 1MB SDRAM */ |
| 70 | #define EV64260_TODC_SIZE_ACTUAL 0x00000020 /* 32 bytes for TODC */ |
| 71 | #define EV64260_UART_SIZE_ACTUAL 0x00000040 /* 64 bytes for DUART */ |
| 72 | |
| 73 | #define EV64260_EXT_FLASH_SIZE max(GT64260_WINDOW_SIZE_MIN, \ |
| 74 | EV64260_EXT_FLASH_SIZE_ACTUAL) |
| 75 | #define EV64260_EMB_FLASH_SIZE max(GT64260_WINDOW_SIZE_MIN, \ |
| 76 | EV64260_EMB_FLASH_SIZE_ACTUAL) |
| 77 | #define EV64260_EXT_SRAM_SIZE max(GT64260_WINDOW_SIZE_MIN, \ |
| 78 | EV64260_EXT_SRAM_SIZE_ACTUAL) |
| 79 | #define EV64260_TODC_SIZE max(GT64260_WINDOW_SIZE_MIN, \ |
| 80 | EV64260_TODC_SIZE_ACTUAL) |
| 81 | /* Assembler in bootwrapper blows up if 'max' is used */ |
| 82 | #define EV64260_UART_SIZE GT64260_WINDOW_SIZE_MIN |
| 83 | #define EV64260_UART_END ((EV64260_UART_BASE + \ |
| 84 | EV64260_UART_SIZE - 1) & 0xfff00000) |
| 85 | |
| 86 | /* Board-specific IRQ info */ |
| 87 | #define EV64260_UART_0_IRQ 85 |
| 88 | #define EV64260_UART_1_IRQ 86 |
| 89 | #define EV64260_PCI_0_IRQ 91 |
| 90 | #define EV64260_PCI_1_IRQ 93 |
| 91 | |
| 92 | /* Serial port setup */ |
| 93 | #define EV64260_DEFAULT_BAUD 115200 |
| 94 | |
| 95 | #if defined(CONFIG_SERIAL_MPSC_CONSOLE) |
| 96 | #define SERIAL_PORT_DFNS |
| 97 | |
| 98 | #define EV64260_MPSC_CLK_SRC 8 /* TCLK */ |
| 99 | #define EV64260_MPSC_CLK_FREQ 100000000 /* 100MHz clk */ |
| 100 | #else |
| 101 | #define EV64260_SERIAL_0 (EV64260_UART_BASE + 0x20) |
| 102 | #define EV64260_SERIAL_1 EV64260_UART_BASE |
| 103 | |
| 104 | #define BASE_BAUD (EV64260_DEFAULT_BAUD * 2) |
| 105 | |
| 106 | #ifdef CONFIG_SERIAL_MANY_PORTS |
| 107 | #define RS_TABLE_SIZE 64 |
| 108 | #else |
| 109 | #define RS_TABLE_SIZE 2 |
| 110 | #endif |
| 111 | |
| 112 | #ifdef CONFIG_SERIAL_DETECT_IRQ |
| 113 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ) |
| 114 | #else |
| 115 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST) |
| 116 | #endif |
| 117 | |
| 118 | /* Required for bootloader's ns16550.c code */ |
| 119 | #define STD_SERIAL_PORT_DFNS \ |
| 120 | { 0, BASE_BAUD, EV64260_SERIAL_0, EV64260_UART_0_IRQ, STD_COM_FLAGS, \ |
| 121 | iomem_base: (u8 *)EV64260_SERIAL_0, /* ttyS0 */ \ |
| 122 | iomem_reg_shift: 2, \ |
| 123 | io_type: SERIAL_IO_MEM }, |
| 124 | |
| 125 | #define SERIAL_PORT_DFNS \ |
| 126 | STD_SERIAL_PORT_DFNS |
| 127 | #endif |
| 128 | #endif /* __PPC_PLATFORMS_EV64260_H */ |