Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/ia64/kernel/time.c |
| 3 | * |
| 4 | * Copyright (C) 1998-2003 Hewlett-Packard Co |
| 5 | * Stephane Eranian <eranian@hpl.hp.com> |
| 6 | * David Mosberger <davidm@hpl.hp.com> |
| 7 | * Copyright (C) 1999 Don Dugger <don.dugger@intel.com> |
| 8 | * Copyright (C) 1999-2000 VA Linux Systems |
| 9 | * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com> |
| 10 | */ |
| 11 | #include <linux/config.h> |
| 12 | |
| 13 | #include <linux/cpu.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/profile.h> |
| 18 | #include <linux/sched.h> |
| 19 | #include <linux/time.h> |
| 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/efi.h> |
| 22 | #include <linux/profile.h> |
| 23 | #include <linux/timex.h> |
| 24 | |
| 25 | #include <asm/machvec.h> |
| 26 | #include <asm/delay.h> |
| 27 | #include <asm/hw_irq.h> |
| 28 | #include <asm/ptrace.h> |
| 29 | #include <asm/sal.h> |
| 30 | #include <asm/sections.h> |
| 31 | #include <asm/system.h> |
| 32 | |
| 33 | extern unsigned long wall_jiffies; |
| 34 | |
| 35 | u64 jiffies_64 __cacheline_aligned_in_smp = INITIAL_JIFFIES; |
| 36 | |
| 37 | EXPORT_SYMBOL(jiffies_64); |
| 38 | |
| 39 | #define TIME_KEEPER_ID 0 /* smp_processor_id() of time-keeper */ |
| 40 | |
| 41 | #ifdef CONFIG_IA64_DEBUG_IRQ |
| 42 | |
| 43 | unsigned long last_cli_ip; |
| 44 | EXPORT_SYMBOL(last_cli_ip); |
| 45 | |
| 46 | #endif |
| 47 | |
| 48 | static struct time_interpolator itc_interpolator = { |
| 49 | .shift = 16, |
| 50 | .mask = 0xffffffffffffffffLL, |
| 51 | .source = TIME_SOURCE_CPU |
| 52 | }; |
| 53 | |
| 54 | static irqreturn_t |
| 55 | timer_interrupt (int irq, void *dev_id, struct pt_regs *regs) |
| 56 | { |
| 57 | unsigned long new_itm; |
| 58 | |
| 59 | if (unlikely(cpu_is_offline(smp_processor_id()))) { |
| 60 | return IRQ_HANDLED; |
| 61 | } |
| 62 | |
| 63 | platform_timer_interrupt(irq, dev_id, regs); |
| 64 | |
| 65 | new_itm = local_cpu_data->itm_next; |
| 66 | |
| 67 | if (!time_after(ia64_get_itc(), new_itm)) |
| 68 | printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", |
| 69 | ia64_get_itc(), new_itm); |
| 70 | |
| 71 | profile_tick(CPU_PROFILING, regs); |
| 72 | |
| 73 | while (1) { |
| 74 | update_process_times(user_mode(regs)); |
| 75 | |
| 76 | new_itm += local_cpu_data->itm_delta; |
| 77 | |
| 78 | if (smp_processor_id() == TIME_KEEPER_ID) { |
| 79 | /* |
| 80 | * Here we are in the timer irq handler. We have irqs locally |
| 81 | * disabled, but we don't know if the timer_bh is running on |
| 82 | * another CPU. We need to avoid to SMP race by acquiring the |
| 83 | * xtime_lock. |
| 84 | */ |
| 85 | write_seqlock(&xtime_lock); |
| 86 | do_timer(regs); |
| 87 | local_cpu_data->itm_next = new_itm; |
| 88 | write_sequnlock(&xtime_lock); |
| 89 | } else |
| 90 | local_cpu_data->itm_next = new_itm; |
| 91 | |
| 92 | if (time_after(new_itm, ia64_get_itc())) |
| 93 | break; |
| 94 | } |
| 95 | |
| 96 | do { |
| 97 | /* |
| 98 | * If we're too close to the next clock tick for |
| 99 | * comfort, we increase the safety margin by |
| 100 | * intentionally dropping the next tick(s). We do NOT |
| 101 | * update itm.next because that would force us to call |
| 102 | * do_timer() which in turn would let our clock run |
| 103 | * too fast (with the potentially devastating effect |
| 104 | * of losing monotony of time). |
| 105 | */ |
| 106 | while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2)) |
| 107 | new_itm += local_cpu_data->itm_delta; |
| 108 | ia64_set_itm(new_itm); |
| 109 | /* double check, in case we got hit by a (slow) PMI: */ |
| 110 | } while (time_after_eq(ia64_get_itc(), new_itm)); |
| 111 | return IRQ_HANDLED; |
| 112 | } |
| 113 | |
| 114 | /* |
| 115 | * Encapsulate access to the itm structure for SMP. |
| 116 | */ |
| 117 | void |
| 118 | ia64_cpu_local_tick (void) |
| 119 | { |
| 120 | int cpu = smp_processor_id(); |
| 121 | unsigned long shift = 0, delta; |
| 122 | |
| 123 | /* arrange for the cycle counter to generate a timer interrupt: */ |
| 124 | ia64_set_itv(IA64_TIMER_VECTOR); |
| 125 | |
| 126 | delta = local_cpu_data->itm_delta; |
| 127 | /* |
| 128 | * Stagger the timer tick for each CPU so they don't occur all at (almost) the |
| 129 | * same time: |
| 130 | */ |
| 131 | if (cpu) { |
| 132 | unsigned long hi = 1UL << ia64_fls(cpu); |
| 133 | shift = (2*(cpu - hi) + 1) * delta/hi/2; |
| 134 | } |
| 135 | local_cpu_data->itm_next = ia64_get_itc() + delta + shift; |
| 136 | ia64_set_itm(local_cpu_data->itm_next); |
| 137 | } |
| 138 | |
| 139 | static int nojitter; |
| 140 | |
| 141 | static int __init nojitter_setup(char *str) |
| 142 | { |
| 143 | nojitter = 1; |
| 144 | printk("Jitter checking for ITC timers disabled\n"); |
| 145 | return 1; |
| 146 | } |
| 147 | |
| 148 | __setup("nojitter", nojitter_setup); |
| 149 | |
| 150 | |
| 151 | void __devinit |
| 152 | ia64_init_itm (void) |
| 153 | { |
| 154 | unsigned long platform_base_freq, itc_freq; |
| 155 | struct pal_freq_ratio itc_ratio, proc_ratio; |
| 156 | long status, platform_base_drift, itc_drift; |
| 157 | |
| 158 | /* |
| 159 | * According to SAL v2.6, we need to use a SAL call to determine the platform base |
| 160 | * frequency and then a PAL call to determine the frequency ratio between the ITC |
| 161 | * and the base frequency. |
| 162 | */ |
| 163 | status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM, |
| 164 | &platform_base_freq, &platform_base_drift); |
| 165 | if (status != 0) { |
| 166 | printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status)); |
| 167 | } else { |
| 168 | status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio); |
| 169 | if (status != 0) |
| 170 | printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status); |
| 171 | } |
| 172 | if (status != 0) { |
| 173 | /* invent "random" values */ |
| 174 | printk(KERN_ERR |
| 175 | "SAL/PAL failed to obtain frequency info---inventing reasonable values\n"); |
| 176 | platform_base_freq = 100000000; |
| 177 | platform_base_drift = -1; /* no drift info */ |
| 178 | itc_ratio.num = 3; |
| 179 | itc_ratio.den = 1; |
| 180 | } |
| 181 | if (platform_base_freq < 40000000) { |
| 182 | printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n", |
| 183 | platform_base_freq); |
| 184 | platform_base_freq = 75000000; |
| 185 | platform_base_drift = -1; |
| 186 | } |
| 187 | if (!proc_ratio.den) |
| 188 | proc_ratio.den = 1; /* avoid division by zero */ |
| 189 | if (!itc_ratio.den) |
| 190 | itc_ratio.den = 1; /* avoid division by zero */ |
| 191 | |
| 192 | itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den; |
| 193 | |
| 194 | local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ; |
| 195 | printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%lu/%lu, " |
| 196 | "ITC freq=%lu.%03luMHz", smp_processor_id(), |
| 197 | platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000, |
| 198 | itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000); |
| 199 | |
| 200 | if (platform_base_drift != -1) { |
| 201 | itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den; |
| 202 | printk("+/-%ldppm\n", itc_drift); |
| 203 | } else { |
| 204 | itc_drift = -1; |
| 205 | printk("\n"); |
| 206 | } |
| 207 | |
| 208 | local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den; |
| 209 | local_cpu_data->itc_freq = itc_freq; |
| 210 | local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC; |
| 211 | local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT) |
| 212 | + itc_freq/2)/itc_freq; |
| 213 | |
| 214 | if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { |
| 215 | itc_interpolator.frequency = local_cpu_data->itc_freq; |
| 216 | itc_interpolator.drift = itc_drift; |
| 217 | #ifdef CONFIG_SMP |
| 218 | /* On IA64 in an SMP configuration ITCs are never accurately synchronized. |
| 219 | * Jitter compensation requires a cmpxchg which may limit |
| 220 | * the scalability of the syscalls for retrieving time. |
| 221 | * The ITC synchronization is usually successful to within a few |
| 222 | * ITC ticks but this is not a sure thing. If you need to improve |
| 223 | * timer performance in SMP situations then boot the kernel with the |
| 224 | * "nojitter" option. However, doing so may result in time fluctuating (maybe |
| 225 | * even going backward) if the ITC offsets between the individual CPUs |
| 226 | * are too large. |
| 227 | */ |
| 228 | if (!nojitter) itc_interpolator.jitter = 1; |
| 229 | #endif |
| 230 | register_time_interpolator(&itc_interpolator); |
| 231 | } |
| 232 | |
| 233 | /* Setup the CPU local timer tick */ |
| 234 | ia64_cpu_local_tick(); |
| 235 | } |
| 236 | |
| 237 | static struct irqaction timer_irqaction = { |
| 238 | .handler = timer_interrupt, |
| 239 | .flags = SA_INTERRUPT, |
| 240 | .name = "timer" |
| 241 | }; |
| 242 | |
| 243 | void __init |
| 244 | time_init (void) |
| 245 | { |
| 246 | register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction); |
| 247 | efi_gettimeofday(&xtime); |
| 248 | ia64_init_itm(); |
| 249 | |
| 250 | /* |
| 251 | * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the |
| 252 | * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC). |
| 253 | */ |
| 254 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); |
| 255 | } |