tree 45f364841822ec85b118971f6bea4613b109cc4b
parent cea28f081e157cea00cb83f1c5d4bbd5caffc767
author Ashwin Chaugule <ashwinc@codeaurora.org> 1357678506 -0500
committer Iliyan Malchev <malchev@google.com> 1363392549 -0700

Perf: Restore counter after powercollapse for generic ARM PMU's

The MSM SoC's which have ARM's CPU's can power collapse. Ensure
the CPU side PMU's correctly restore the counters after coming
out of power collapse.

Change-Id: I544a1dd8ced26f726ba115d14867d9e34c2a7944
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>