m68k: ColdFire V4e MMU paging init code and miss handler
The different ColdFire V4e MMU requires its own dedicated paging init
code, and a TLB miss handler for its software driven TLB.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
diff --git a/arch/m68k/include/asm/mcfmmu.h b/arch/m68k/include/asm/mcfmmu.h
index 8fdcfed..26cc3d5 100644
--- a/arch/m68k/include/asm/mcfmmu.h
+++ b/arch/m68k/include/asm/mcfmmu.h
@@ -105,6 +105,8 @@
__asm__ __volatile__ ("nop");
}
+int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word);
+
#endif
#endif /* MCFMMU_H */