sparc64: Abstract away PIC register accesses.
And, like for the PCR, allow indexing of different PIC register
numbers.
This also removes all of the non-__KERNEL__ bits from asm/perfctr.h,
nothing kernel side should include it any more.
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index 95df720..ef22b9b 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -22,7 +22,6 @@
#include <asm/perf_event.h>
#include <asm/ptrace.h>
#include <asm/pcr.h>
-#include <asm/perfctr.h>
#include "kstack.h"
@@ -109,7 +108,7 @@
pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
touched = 1;
else
- pcr_ops->write(0, PCR_PIC_PRIV);
+ pcr_ops->write_pcr(0, PCR_PIC_PRIV);
sum = local_cpu_data().irq0_irqs;
if (__get_cpu_var(nmi_touch)) {
@@ -126,8 +125,8 @@
__this_cpu_write(alert_counter, 0);
}
if (__get_cpu_var(wd_enabled)) {
- write_pic(picl_value(nmi_hz));
- pcr_ops->write(0, pcr_enable);
+ pcr_ops->write_pic(0, picl_value(nmi_hz));
+ pcr_ops->write_pcr(0, pcr_enable);
}
restore_hardirq_stack(orig_sp);
@@ -166,7 +165,7 @@
void stop_nmi_watchdog(void *unused)
{
- pcr_ops->write(0, PCR_PIC_PRIV);
+ pcr_ops->write_pcr(0, PCR_PIC_PRIV);
__get_cpu_var(wd_enabled) = 0;
atomic_dec(&nmi_active);
}
@@ -223,10 +222,10 @@
__get_cpu_var(wd_enabled) = 1;
atomic_inc(&nmi_active);
- pcr_ops->write(0, PCR_PIC_PRIV);
- write_pic(picl_value(nmi_hz));
+ pcr_ops->write_pcr(0, PCR_PIC_PRIV);
+ pcr_ops->write_pic(0, picl_value(nmi_hz));
- pcr_ops->write(0, pcr_enable);
+ pcr_ops->write_pcr(0, pcr_enable);
}
static void nmi_adjust_hz_one(void *unused)
@@ -234,10 +233,10 @@
if (!__get_cpu_var(wd_enabled))
return;
- pcr_ops->write(0, PCR_PIC_PRIV);
- write_pic(picl_value(nmi_hz));
+ pcr_ops->write_pcr(0, PCR_PIC_PRIV);
+ pcr_ops->write_pic(0, picl_value(nmi_hz));
- pcr_ops->write(0, pcr_enable);
+ pcr_ops->write_pcr(0, pcr_enable);
}
void nmi_adjust_hz(unsigned int new_hz)