drivers: bus: Move the OMAP interconnect driver to drivers/bus/
OMAP interconnect drivers are used for the interconnect error handling.
Since they are bus driver, lets move it to newly created drivers/bus.
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index dd2db02..7d3c8ab 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -44,6 +44,7 @@
select ARM_CPU_SUSPEND if PM
select MULTI_IRQ_HANDLER
select SOC_HAS_OMAP2_SDRC
+ select OMAP_INTERCONNECT
config ARCH_OMAP4
bool "TI OMAP4"
@@ -63,6 +64,7 @@
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM
select ARCH_NEEDS_CPU_IDLE_COUPLED
+ select OMAP_INTERCONNECT
config SOC_OMAP5
bool "TI OMAP5"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f6a24b3..7fed980 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -199,11 +199,6 @@
# EMU peripherals
obj-$(CONFIG_OMAP3_EMU) += emu.o
-# L3 interconnect
-obj-$(CONFIG_ARCH_OMAP3) += omap_l3_smx.o
-obj-$(CONFIG_ARCH_OMAP4) += omap_l3_noc.o
-obj-$(CONFIG_SOC_OMAP5) += omap_l3_noc.o
-
obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
mailbox_mach-objs := mailbox.o
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
deleted file mode 100644
index d15225f..0000000
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * OMAP4XXX L3 Interconnect error handling driver
- *
- * Copyright (C) 2011 Texas Corporation
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * Sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-
-#include "omap_l3_noc.h"
-
-/*
- * Interrupt Handler for L3 error detection.
- * 1) Identify the L3 clockdomain partition to which the error belongs to.
- * 2) Identify the slave where the error information is logged
- * 3) Print the logged information.
- * 4) Add dump stack to provide kernel trace.
- *
- * Two Types of errors :
- * 1) Custom errors in L3 :
- * Target like DMM/FW/EMIF generates SRESP=ERR error
- * 2) Standard L3 error:
- * - Unsupported CMD.
- * L3 tries to access target while it is idle
- * - OCP disconnect.
- * - Address hole error:
- * If DSS/ISS/FDIF/USBHOSTFS access a target where they
- * do not have connectivity, the error is logged in
- * their default target which is DMM2.
- *
- * On High Secure devices, firewall errors are possible and those
- * can be trapped as well. But the trapping is implemented as part
- * secure software and hence need not be implemented here.
- */
-static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
-{
-
- struct omap4_l3 *l3 = _l3;
- int inttype, i, k;
- int err_src = 0;
- u32 std_err_main, err_reg, clear, masterid;
- void __iomem *base, *l3_targ_base;
- char *target_name, *master_name = "UN IDENTIFIED";
-
- /* Get the Type of interrupt */
- inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
-
- for (i = 0; i < L3_MODULES; i++) {
- /*
- * Read the regerr register of the clock domain
- * to determine the source
- */
- base = l3->l3_base[i];
- err_reg = __raw_readl(base + l3_flagmux[i] +
- + L3_FLAGMUX_REGERR0 + (inttype << 3));
-
- /* Get the corresponding error and analyse */
- if (err_reg) {
- /* Identify the source from control status register */
- err_src = __ffs(err_reg);
-
- /* Read the stderrlog_main_source from clk domain */
- l3_targ_base = base + *(l3_targ[i] + err_src);
- std_err_main = __raw_readl(l3_targ_base +
- L3_TARG_STDERRLOG_MAIN);
- masterid = __raw_readl(l3_targ_base +
- L3_TARG_STDERRLOG_MSTADDR);
-
- switch (std_err_main & CUSTOM_ERROR) {
- case STANDARD_ERROR:
- target_name =
- l3_targ_inst_name[i][err_src];
- WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
- target_name,
- __raw_readl(l3_targ_base +
- L3_TARG_STDERRLOG_SLVOFSLSB));
- /* clear the std error log*/
- clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, l3_targ_base +
- L3_TARG_STDERRLOG_MAIN);
- break;
-
- case CUSTOM_ERROR:
- target_name =
- l3_targ_inst_name[i][err_src];
- for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
- if (masterid == l3_masters[k].id)
- master_name =
- l3_masters[k].name;
- }
- WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
- master_name, target_name);
- /* clear the std error log*/
- clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, l3_targ_base +
- L3_TARG_STDERRLOG_MAIN);
- break;
-
- default:
- /* Nothing to be handled here as of now */
- break;
- }
- /* Error found so break the for loop */
- break;
- }
- }
- return IRQ_HANDLED;
-}
-
-static int __devinit omap4_l3_probe(struct platform_device *pdev)
-{
- static struct omap4_l3 *l3;
- struct resource *res;
- int ret;
-
- l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
- if (!l3)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, l3);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&pdev->dev, "couldn't find resource 0\n");
- ret = -ENODEV;
- goto err0;
- }
-
- l3->l3_base[0] = ioremap(res->start, resource_size(res));
- if (!l3->l3_base[0]) {
- dev_err(&pdev->dev, "ioremap failed\n");
- ret = -ENOMEM;
- goto err0;
- }
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- if (!res) {
- dev_err(&pdev->dev, "couldn't find resource 1\n");
- ret = -ENODEV;
- goto err1;
- }
-
- l3->l3_base[1] = ioremap(res->start, resource_size(res));
- if (!l3->l3_base[1]) {
- dev_err(&pdev->dev, "ioremap failed\n");
- ret = -ENOMEM;
- goto err1;
- }
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
- if (!res) {
- dev_err(&pdev->dev, "couldn't find resource 2\n");
- ret = -ENODEV;
- goto err2;
- }
-
- l3->l3_base[2] = ioremap(res->start, resource_size(res));
- if (!l3->l3_base[2]) {
- dev_err(&pdev->dev, "ioremap failed\n");
- ret = -ENOMEM;
- goto err2;
- }
-
- /*
- * Setup interrupt Handlers
- */
- l3->debug_irq = platform_get_irq(pdev, 0);
- ret = request_irq(l3->debug_irq,
- l3_interrupt_handler,
- IRQF_DISABLED, "l3-dbg-irq", l3);
- if (ret) {
- pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_DBG);
- goto err3;
- }
-
- l3->app_irq = platform_get_irq(pdev, 1);
- ret = request_irq(l3->app_irq,
- l3_interrupt_handler,
- IRQF_DISABLED, "l3-app-irq", l3);
- if (ret) {
- pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_APP);
- goto err4;
- }
-
- return 0;
-
-err4:
- free_irq(l3->debug_irq, l3);
-err3:
- iounmap(l3->l3_base[2]);
-err2:
- iounmap(l3->l3_base[1]);
-err1:
- iounmap(l3->l3_base[0]);
-err0:
- kfree(l3);
- return ret;
-}
-
-static int __devexit omap4_l3_remove(struct platform_device *pdev)
-{
- struct omap4_l3 *l3 = platform_get_drvdata(pdev);
-
- free_irq(l3->app_irq, l3);
- free_irq(l3->debug_irq, l3);
- iounmap(l3->l3_base[0]);
- iounmap(l3->l3_base[1]);
- iounmap(l3->l3_base[2]);
- kfree(l3);
-
- return 0;
-}
-
-#if defined(CONFIG_OF)
-static const struct of_device_id l3_noc_match[] = {
- {.compatible = "ti,omap4-l3-noc", },
- {},
-};
-MODULE_DEVICE_TABLE(of, l3_noc_match);
-#else
-#define l3_noc_match NULL
-#endif
-
-static struct platform_driver omap4_l3_driver = {
- .probe = omap4_l3_probe,
- .remove = __devexit_p(omap4_l3_remove),
- .driver = {
- .name = "omap_l3_noc",
- .owner = THIS_MODULE,
- .of_match_table = l3_noc_match,
- },
-};
-
-static int __init omap4_l3_init(void)
-{
- return platform_driver_register(&omap4_l3_driver);
-}
-postcore_initcall_sync(omap4_l3_init);
-
-static void __exit omap4_l3_exit(void)
-{
- platform_driver_unregister(&omap4_l3_driver);
-}
-module_exit(omap4_l3_exit);
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
deleted file mode 100644
index a6ce34d..0000000
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * OMAP4XXX L3 Interconnect error handling driver header
- *
- * Copyright (C) 2011 Texas Corporation
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
-#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
-#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
-
-#define L3_MODULES 3
-#define CLEAR_STDERR_LOG (1 << 31)
-#define CUSTOM_ERROR 0x2
-#define STANDARD_ERROR 0x0
-#define INBAND_ERROR 0x0
-#define L3_APPLICATION_ERROR 0x0
-#define L3_DEBUG_ERROR 0x1
-
-/* L3 TARG register offsets */
-#define L3_TARG_STDERRLOG_MAIN 0x48
-#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
-#define L3_TARG_STDERRLOG_MSTADDR 0x68
-#define L3_FLAGMUX_REGERR0 0xc
-
-#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
-
-static u32 l3_flagmux[L3_MODULES] = {
- 0x500,
- 0x1000,
- 0X0200
-};
-
-/* L3 Target standard Error register offsets */
-static u32 l3_targ_inst_clk1[] = {
- 0x100, /* DMM1 */
- 0x200, /* DMM2 */
- 0x300, /* ABE */
- 0x400, /* L4CFG */
- 0x600, /* CLK2 PWR DISC */
- 0x0, /* Host CLK1 */
- 0x900 /* L4 Wakeup */
-};
-
-static u32 l3_targ_inst_clk2[] = {
- 0x500, /* CORTEX M3 */
- 0x300, /* DSS */
- 0x100, /* GPMC */
- 0x400, /* ISS */
- 0x700, /* IVAHD */
- 0xD00, /* missing in TRM corresponds to AES1*/
- 0x900, /* L4 PER0*/
- 0x200, /* OCMRAM */
- 0x100, /* missing in TRM corresponds to GPMC sERROR*/
- 0x600, /* SGX */
- 0x800, /* SL2 */
- 0x1600, /* C2C */
- 0x1100, /* missing in TRM corresponds PWR DISC CLK1*/
- 0xF00, /* missing in TRM corrsponds to SHA1*/
- 0xE00, /* missing in TRM corresponds to AES2*/
- 0xC00, /* L4 PER3 */
- 0xA00, /* L4 PER1*/
- 0xB00, /* L4 PER2*/
- 0x0, /* HOST CLK2 */
- 0x1800, /* CAL */
- 0x1700 /* LLI */
-};
-
-static u32 l3_targ_inst_clk3[] = {
- 0x0100 /* EMUSS */,
- 0x0300, /* DEBUGSS_CT_TBR */
- 0x0 /* HOST CLK3 */
-};
-
-static struct l3_masters_data {
- u32 id;
- char name[10];
-} l3_masters[] = {
- { 0x0 , "MPU"},
- { 0x10, "CS_ADP"},
- { 0x14, "xxx"},
- { 0x20, "DSP"},
- { 0x30, "IVAHD"},
- { 0x40, "ISS"},
- { 0x44, "DucatiM3"},
- { 0x48, "FaceDetect"},
- { 0x50, "SDMA_Rd"},
- { 0x54, "SDMA_Wr"},
- { 0x58, "xxx"},
- { 0x5C, "xxx"},
- { 0x60, "SGX"},
- { 0x70, "DSS"},
- { 0x80, "C2C"},
- { 0x88, "xxx"},
- { 0x8C, "xxx"},
- { 0x90, "HSI"},
- { 0xA0, "MMC1"},
- { 0xA4, "MMC2"},
- { 0xA8, "MMC6"},
- { 0xB0, "UNIPRO1"},
- { 0xC0, "USBHOSTHS"},
- { 0xC4, "USBOTGHS"},
- { 0xC8, "USBHOSTFS"}
-};
-
-static char *l3_targ_inst_name[L3_MODULES][21] = {
- {
- "DMM1",
- "DMM2",
- "ABE",
- "L4CFG",
- "CLK2 PWR DISC",
- "HOST CLK1",
- "L4 WAKEUP"
- },
- {
- "CORTEX M3" ,
- "DSS ",
- "GPMC ",
- "ISS ",
- "IVAHD ",
- "AES1",
- "L4 PER0",
- "OCMRAM ",
- "GPMC sERROR",
- "SGX ",
- "SL2 ",
- "C2C ",
- "PWR DISC CLK1",
- "SHA1",
- "AES2",
- "L4 PER3",
- "L4 PER1",
- "L4 PER2",
- "HOST CLK2",
- "CAL",
- "LLI"
- },
- {
- "EMUSS",
- "DEBUG SOURCE",
- "HOST CLK3"
- },
-};
-
-static u32 *l3_targ[L3_MODULES] = {
- l3_targ_inst_clk1,
- l3_targ_inst_clk2,
- l3_targ_inst_clk3,
-};
-
-struct omap4_l3 {
- struct device *dev;
- struct clk *ick;
-
- /* memory base */
- void __iomem *l3_base[L3_MODULES];
-
- int debug_irq;
- int app_irq;
-};
-#endif
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
deleted file mode 100644
index acc2164..0000000
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ /dev/null
@@ -1,297 +0,0 @@
-/*
- * OMAP3XXX L3 Interconnect Driver
- *
- * Copyright (C) 2011 Texas Corporation
- * Felipe Balbi <balbi@ti.com>
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * Sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
-
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include "omap_l3_smx.h"
-
-static inline u64 omap3_l3_readll(void __iomem *base, u16 reg)
-{
- return __raw_readll(base + reg);
-}
-
-static inline void omap3_l3_writell(void __iomem *base, u16 reg, u64 value)
-{
- __raw_writell(value, base + reg);
-}
-
-static inline enum omap3_l3_code omap3_l3_decode_error_code(u64 error)
-{
- return (error & 0x0f000000) >> L3_ERROR_LOG_CODE;
-}
-
-static inline u32 omap3_l3_decode_addr(u64 error_addr)
-{
- return error_addr & 0xffffffff;
-}
-
-static inline unsigned omap3_l3_decode_cmd(u64 error)
-{
- return (error & 0x07) >> L3_ERROR_LOG_CMD;
-}
-
-static inline enum omap3_l3_initiator_id omap3_l3_decode_initid(u64 error)
-{
- return (error & 0xff00) >> L3_ERROR_LOG_INITID;
-}
-
-static inline unsigned omap3_l3_decode_req_info(u64 error)
-{
- return (error >> 32) & 0xffff;
-}
-
-static char *omap3_l3_code_string(u8 code)
-{
- switch (code) {
- case OMAP_L3_CODE_NOERROR:
- return "No Error";
- case OMAP_L3_CODE_UNSUP_CMD:
- return "Unsupported Command";
- case OMAP_L3_CODE_ADDR_HOLE:
- return "Address Hole";
- case OMAP_L3_CODE_PROTECT_VIOLATION:
- return "Protection Violation";
- case OMAP_L3_CODE_IN_BAND_ERR:
- return "In-band Error";
- case OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT:
- return "Request Timeout Not Accepted";
- case OMAP_L3_CODE_REQ_TOUT_NO_RESP:
- return "Request Timeout, no response";
- default:
- return "UNKNOWN error";
- }
-}
-
-static char *omap3_l3_initiator_string(u8 initid)
-{
- switch (initid) {
- case OMAP_L3_LCD:
- return "LCD";
- case OMAP_L3_SAD2D:
- return "SAD2D";
- case OMAP_L3_IA_MPU_SS_1:
- case OMAP_L3_IA_MPU_SS_2:
- case OMAP_L3_IA_MPU_SS_3:
- case OMAP_L3_IA_MPU_SS_4:
- case OMAP_L3_IA_MPU_SS_5:
- return "MPU";
- case OMAP_L3_IA_IVA_SS_1:
- case OMAP_L3_IA_IVA_SS_2:
- case OMAP_L3_IA_IVA_SS_3:
- return "IVA_SS";
- case OMAP_L3_IA_IVA_SS_DMA_1:
- case OMAP_L3_IA_IVA_SS_DMA_2:
- case OMAP_L3_IA_IVA_SS_DMA_3:
- case OMAP_L3_IA_IVA_SS_DMA_4:
- case OMAP_L3_IA_IVA_SS_DMA_5:
- case OMAP_L3_IA_IVA_SS_DMA_6:
- return "IVA_SS_DMA";
- case OMAP_L3_IA_SGX:
- return "SGX";
- case OMAP_L3_IA_CAM_1:
- case OMAP_L3_IA_CAM_2:
- case OMAP_L3_IA_CAM_3:
- return "CAM";
- case OMAP_L3_IA_DAP:
- return "DAP";
- case OMAP_L3_SDMA_WR_1:
- case OMAP_L3_SDMA_WR_2:
- return "SDMA_WR";
- case OMAP_L3_SDMA_RD_1:
- case OMAP_L3_SDMA_RD_2:
- case OMAP_L3_SDMA_RD_3:
- case OMAP_L3_SDMA_RD_4:
- return "SDMA_RD";
- case OMAP_L3_USBOTG:
- return "USB_OTG";
- case OMAP_L3_USBHOST:
- return "USB_HOST";
- default:
- return "UNKNOWN Initiator";
- }
-}
-
-/*
- * omap3_l3_block_irq - handles a register block's irq
- * @l3: struct omap3_l3 *
- * @base: register block base address
- * @error: L3_ERROR_LOG register of our block
- *
- * Called in hard-irq context. Caller should take care of locking
- *
- * OMAP36xx TRM gives, on page 2001, Figure 9-10, the Typical Error
- * Analysis Sequence, we are following that sequence here, please
- * refer to that Figure for more information on the subject.
- */
-static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
- u64 error, int error_addr)
-{
- u8 code = omap3_l3_decode_error_code(error);
- u8 initid = omap3_l3_decode_initid(error);
- u8 multi = error & L3_ERROR_LOG_MULTI;
- u32 address = omap3_l3_decode_addr(error_addr);
-
- pr_err("%s seen by %s %s at address %x\n",
- omap3_l3_code_string(code),
- omap3_l3_initiator_string(initid),
- multi ? "Multiple Errors" : "", address);
- WARN_ON(1);
-
- return IRQ_HANDLED;
-}
-
-static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
-{
- struct omap3_l3 *l3 = _l3;
- u64 status, clear;
- u64 error;
- u64 error_addr;
- u64 err_source = 0;
- void __iomem *base;
- int int_type;
- irqreturn_t ret = IRQ_NONE;
-
- int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
- if (!int_type) {
- status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0);
- /*
- * if we have a timeout error, there's nothing we can
- * do besides rebooting the board. So let's BUG on any
- * of such errors and handle the others. timeout error
- * is severe and not expected to occur.
- */
- BUG_ON(status & L3_STATUS_0_TIMEOUT_MASK);
- } else {
- status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_1);
- /* No timeout error for debug sources */
- }
-
- /* identify the error source */
- err_source = __ffs(status);
-
- base = l3->rt + omap3_l3_bases[int_type][err_source];
- error = omap3_l3_readll(base, L3_ERROR_LOG);
- if (error) {
- error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
- ret |= omap3_l3_block_irq(l3, error, error_addr);
- }
-
- /* Clear the status register */
- clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) |
- L3_AGENT_STATUS_CLEAR_TA;
- omap3_l3_writell(base, L3_AGENT_STATUS, clear);
-
- /* clear the error log register */
- omap3_l3_writell(base, L3_ERROR_LOG, error);
-
- return ret;
-}
-
-static int __init omap3_l3_probe(struct platform_device *pdev)
-{
- struct omap3_l3 *l3;
- struct resource *res;
- int ret;
-
- l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
- if (!l3)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, l3);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&pdev->dev, "couldn't find resource\n");
- ret = -ENODEV;
- goto err0;
- }
- l3->rt = ioremap(res->start, resource_size(res));
- if (!l3->rt) {
- dev_err(&pdev->dev, "ioremap failed\n");
- ret = -ENOMEM;
- goto err0;
- }
-
- l3->debug_irq = platform_get_irq(pdev, 0);
- ret = request_irq(l3->debug_irq, omap3_l3_app_irq,
- IRQF_DISABLED | IRQF_TRIGGER_RISING,
- "l3-debug-irq", l3);
- if (ret) {
- dev_err(&pdev->dev, "couldn't request debug irq\n");
- goto err1;
- }
-
- l3->app_irq = platform_get_irq(pdev, 1);
- ret = request_irq(l3->app_irq, omap3_l3_app_irq,
- IRQF_DISABLED | IRQF_TRIGGER_RISING,
- "l3-app-irq", l3);
- if (ret) {
- dev_err(&pdev->dev, "couldn't request app irq\n");
- goto err2;
- }
-
- return 0;
-
-err2:
- free_irq(l3->debug_irq, l3);
-err1:
- iounmap(l3->rt);
-err0:
- kfree(l3);
- return ret;
-}
-
-static int __exit omap3_l3_remove(struct platform_device *pdev)
-{
- struct omap3_l3 *l3 = platform_get_drvdata(pdev);
-
- free_irq(l3->app_irq, l3);
- free_irq(l3->debug_irq, l3);
- iounmap(l3->rt);
- kfree(l3);
-
- return 0;
-}
-
-static struct platform_driver omap3_l3_driver = {
- .remove = __exit_p(omap3_l3_remove),
- .driver = {
- .name = "omap_l3_smx",
- },
-};
-
-static int __init omap3_l3_init(void)
-{
- return platform_driver_probe(&omap3_l3_driver, omap3_l3_probe);
-}
-postcore_initcall_sync(omap3_l3_init);
-
-static void __exit omap3_l3_exit(void)
-{
- platform_driver_unregister(&omap3_l3_driver);
-}
-module_exit(omap3_l3_exit);
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
deleted file mode 100644
index 4f3cebc..0000000
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ /dev/null
@@ -1,338 +0,0 @@
-/*
- * OMAP3XXX L3 Interconnect Driver header
- *
- * Copyright (C) 2011 Texas Corporation
- * Felipe Balbi <balbi@ti.com>
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
-#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
-#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
-
-/* Register definitions. All 64-bit wide */
-#define L3_COMPONENT 0x000
-#define L3_CORE 0x018
-#define L3_AGENT_CONTROL 0x020
-#define L3_AGENT_STATUS 0x028
-#define L3_ERROR_LOG 0x058
-
-#define L3_ERROR_LOG_MULTI (1 << 31)
-#define L3_ERROR_LOG_SECONDARY (1 << 30)
-
-#define L3_ERROR_LOG_ADDR 0x060
-
-/* Register definitions for Sideband Interconnect */
-#define L3_SI_CONTROL 0x020
-#define L3_SI_FLAG_STATUS_0 0x510
-
-static const u64 shift = 1;
-
-#define L3_STATUS_0_MPUIA_BRST (shift << 0)
-#define L3_STATUS_0_MPUIA_RSP (shift << 1)
-#define L3_STATUS_0_MPUIA_INBAND (shift << 2)
-#define L3_STATUS_0_IVAIA_BRST (shift << 6)
-#define L3_STATUS_0_IVAIA_RSP (shift << 7)
-#define L3_STATUS_0_IVAIA_INBAND (shift << 8)
-#define L3_STATUS_0_SGXIA_BRST (shift << 9)
-#define L3_STATUS_0_SGXIA_RSP (shift << 10)
-#define L3_STATUS_0_SGXIA_MERROR (shift << 11)
-#define L3_STATUS_0_CAMIA_BRST (shift << 12)
-#define L3_STATUS_0_CAMIA_RSP (shift << 13)
-#define L3_STATUS_0_CAMIA_INBAND (shift << 14)
-#define L3_STATUS_0_DISPIA_BRST (shift << 15)
-#define L3_STATUS_0_DISPIA_RSP (shift << 16)
-#define L3_STATUS_0_DMARDIA_BRST (shift << 18)
-#define L3_STATUS_0_DMARDIA_RSP (shift << 19)
-#define L3_STATUS_0_DMAWRIA_BRST (shift << 21)
-#define L3_STATUS_0_DMAWRIA_RSP (shift << 22)
-#define L3_STATUS_0_USBOTGIA_BRST (shift << 24)
-#define L3_STATUS_0_USBOTGIA_RSP (shift << 25)
-#define L3_STATUS_0_USBOTGIA_INBAND (shift << 26)
-#define L3_STATUS_0_USBHOSTIA_BRST (shift << 27)
-#define L3_STATUS_0_USBHOSTIA_INBAND (shift << 28)
-#define L3_STATUS_0_SMSTA_REQ (shift << 48)
-#define L3_STATUS_0_GPMCTA_REQ (shift << 49)
-#define L3_STATUS_0_OCMRAMTA_REQ (shift << 50)
-#define L3_STATUS_0_OCMROMTA_REQ (shift << 51)
-#define L3_STATUS_0_IVATA_REQ (shift << 54)
-#define L3_STATUS_0_SGXTA_REQ (shift << 55)
-#define L3_STATUS_0_SGXTA_SERROR (shift << 56)
-#define L3_STATUS_0_GPMCTA_SERROR (shift << 57)
-#define L3_STATUS_0_L4CORETA_REQ (shift << 58)
-#define L3_STATUS_0_L4PERTA_REQ (shift << 59)
-#define L3_STATUS_0_L4EMUTA_REQ (shift << 60)
-#define L3_STATUS_0_MAD2DTA_REQ (shift << 61)
-
-#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
- | L3_STATUS_0_MPUIA_RSP \
- | L3_STATUS_0_IVAIA_BRST \
- | L3_STATUS_0_IVAIA_RSP \
- | L3_STATUS_0_SGXIA_BRST \
- | L3_STATUS_0_SGXIA_RSP \
- | L3_STATUS_0_CAMIA_BRST \
- | L3_STATUS_0_CAMIA_RSP \
- | L3_STATUS_0_DISPIA_BRST \
- | L3_STATUS_0_DISPIA_RSP \
- | L3_STATUS_0_DMARDIA_BRST \
- | L3_STATUS_0_DMARDIA_RSP \
- | L3_STATUS_0_DMAWRIA_BRST \
- | L3_STATUS_0_DMAWRIA_RSP \
- | L3_STATUS_0_USBOTGIA_BRST \
- | L3_STATUS_0_USBOTGIA_RSP \
- | L3_STATUS_0_USBHOSTIA_BRST \
- | L3_STATUS_0_SMSTA_REQ \
- | L3_STATUS_0_GPMCTA_REQ \
- | L3_STATUS_0_OCMRAMTA_REQ \
- | L3_STATUS_0_OCMROMTA_REQ \
- | L3_STATUS_0_IVATA_REQ \
- | L3_STATUS_0_SGXTA_REQ \
- | L3_STATUS_0_L4CORETA_REQ \
- | L3_STATUS_0_L4PERTA_REQ \
- | L3_STATUS_0_L4EMUTA_REQ \
- | L3_STATUS_0_MAD2DTA_REQ)
-
-#define L3_SI_FLAG_STATUS_1 0x530
-
-#define L3_STATUS_1_MPU_DATAIA (1 << 0)
-#define L3_STATUS_1_DAPIA0 (1 << 3)
-#define L3_STATUS_1_DAPIA1 (1 << 4)
-#define L3_STATUS_1_IVAIA (1 << 6)
-
-#define L3_PM_ERROR_LOG 0x020
-#define L3_PM_CONTROL 0x028
-#define L3_PM_ERROR_CLEAR_SINGLE 0x030
-#define L3_PM_ERROR_CLEAR_MULTI 0x038
-#define L3_PM_REQ_INFO_PERMISSION(n) (0x048 + (0x020 * n))
-#define L3_PM_READ_PERMISSION(n) (0x050 + (0x020 * n))
-#define L3_PM_WRITE_PERMISSION(n) (0x058 + (0x020 * n))
-#define L3_PM_ADDR_MATCH(n) (0x060 + (0x020 * n))
-
-/* L3 error log bit fields. Common for IA and TA */
-#define L3_ERROR_LOG_CODE 24
-#define L3_ERROR_LOG_INITID 8
-#define L3_ERROR_LOG_CMD 0
-
-/* L3 agent status bit fields. */
-#define L3_AGENT_STATUS_CLEAR_IA 0x10000000
-#define L3_AGENT_STATUS_CLEAR_TA 0x01000000
-
-#define OMAP34xx_IRQ_L3_APP 10
-#define L3_APPLICATION_ERROR 0x0
-#define L3_DEBUG_ERROR 0x1
-
-enum omap3_l3_initiator_id {
- /* LCD has 1 ID */
- OMAP_L3_LCD = 29,
- /* SAD2D has 1 ID */
- OMAP_L3_SAD2D = 28,
- /* MPU has 5 IDs */
- OMAP_L3_IA_MPU_SS_1 = 27,
- OMAP_L3_IA_MPU_SS_2 = 26,
- OMAP_L3_IA_MPU_SS_3 = 25,
- OMAP_L3_IA_MPU_SS_4 = 24,
- OMAP_L3_IA_MPU_SS_5 = 23,
- /* IVA2.2 SS has 3 IDs*/
- OMAP_L3_IA_IVA_SS_1 = 22,
- OMAP_L3_IA_IVA_SS_2 = 21,
- OMAP_L3_IA_IVA_SS_3 = 20,
- /* IVA 2.2 SS DMA has 6 IDS */
- OMAP_L3_IA_IVA_SS_DMA_1 = 19,
- OMAP_L3_IA_IVA_SS_DMA_2 = 18,
- OMAP_L3_IA_IVA_SS_DMA_3 = 17,
- OMAP_L3_IA_IVA_SS_DMA_4 = 16,
- OMAP_L3_IA_IVA_SS_DMA_5 = 15,
- OMAP_L3_IA_IVA_SS_DMA_6 = 14,
- /* SGX has 1 ID */
- OMAP_L3_IA_SGX = 13,
- /* CAM has 3 ID */
- OMAP_L3_IA_CAM_1 = 12,
- OMAP_L3_IA_CAM_2 = 11,
- OMAP_L3_IA_CAM_3 = 10,
- /* DAP has 1 ID */
- OMAP_L3_IA_DAP = 9,
- /* SDMA WR has 2 IDs */
- OMAP_L3_SDMA_WR_1 = 8,
- OMAP_L3_SDMA_WR_2 = 7,
- /* SDMA RD has 4 IDs */
- OMAP_L3_SDMA_RD_1 = 6,
- OMAP_L3_SDMA_RD_2 = 5,
- OMAP_L3_SDMA_RD_3 = 4,
- OMAP_L3_SDMA_RD_4 = 3,
- /* HSUSB OTG has 1 ID */
- OMAP_L3_USBOTG = 2,
- /* HSUSB HOST has 1 ID */
- OMAP_L3_USBHOST = 1,
-};
-
-enum omap3_l3_code {
- OMAP_L3_CODE_NOERROR = 0,
- OMAP_L3_CODE_UNSUP_CMD = 1,
- OMAP_L3_CODE_ADDR_HOLE = 2,
- OMAP_L3_CODE_PROTECT_VIOLATION = 3,
- OMAP_L3_CODE_IN_BAND_ERR = 4,
- /* codes 5 and 6 are reserved */
- OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT = 7,
- OMAP_L3_CODE_REQ_TOUT_NO_RESP = 8,
- /* codes 9 - 15 are also reserved */
-};
-
-struct omap3_l3 {
- struct device *dev;
- struct clk *ick;
-
- /* memory base*/
- void __iomem *rt;
-
- int debug_irq;
- int app_irq;
-
- /* true when and inband functional error occurs */
- unsigned inband:1;
-};
-
-/* offsets for l3 agents in order with the Flag status register */
-static unsigned int omap3_l3_app_bases[] = {
- /* MPU IA */
- 0x1400,
- 0x1400,
- 0x1400,
- /* RESERVED */
- 0,
- 0,
- 0,
- /* IVA 2.2 IA */
- 0x1800,
- 0x1800,
- 0x1800,
- /* SGX IA */
- 0x1c00,
- 0x1c00,
- /* RESERVED */
- 0,
- /* CAMERA IA */
- 0x5800,
- 0x5800,
- 0x5800,
- /* DISPLAY IA */
- 0x5400,
- 0x5400,
- /* RESERVED */
- 0,
- /*SDMA RD IA */
- 0x4c00,
- 0x4c00,
- /* RESERVED */
- 0,
- /* SDMA WR IA */
- 0x5000,
- 0x5000,
- /* RESERVED */
- 0,
- /* USB OTG IA */
- 0x4400,
- 0x4400,
- 0x4400,
- /* USB HOST IA */
- 0x4000,
- 0x4000,
- /* RESERVED */
- 0,
- 0,
- 0,
- 0,
- /* SAD2D IA */
- 0x3000,
- 0x3000,
- 0x3000,
- /* RESERVED */
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- /* SMA TA */
- 0x2000,
- /* GPMC TA */
- 0x2400,
- /* OCM RAM TA */
- 0x2800,
- /* OCM ROM TA */
- 0x2C00,
- /* L4 CORE TA */
- 0x6800,
- /* L4 PER TA */
- 0x6c00,
- /* IVA 2.2 TA */
- 0x6000,
- /* SGX TA */
- 0x6400,
- /* L4 EMU TA */
- 0x7000,
- /* GPMC TA */
- 0x2400,
- /* L4 CORE TA */
- 0x6800,
- /* L4 PER TA */
- 0x6c00,
- /* L4 EMU TA */
- 0x7000,
- /* MAD2D TA */
- 0x3400,
- /* RESERVED */
- 0,
- 0,
-};
-
-static unsigned int omap3_l3_debug_bases[] = {
- /* MPU DATA IA */
- 0x1400,
- /* RESERVED */
- 0,
- 0,
- /* DAP IA */
- 0x5c00,
- 0x5c00,
- /* RESERVED */
- 0,
- /* IVA 2.2 IA */
- 0x1800,
- /* REST RESERVED */
-};
-
-static u32 *omap3_l3_bases[] = {
- omap3_l3_app_bases,
- omap3_l3_debug_bases,
-};
-
-/*
- * REVISIT define __raw_readll/__raw_writell here, but move them to
- * <asm/io.h> at some point
- */
-#define __raw_writell(v, a) (__chk_io_ptr(a), \
- *(volatile u64 __force *)(a) = (v))
-#define __raw_readll(a) (__chk_io_ptr(a), \
- *(volatile u64 __force *)(a))
-
-#endif