arch/tile: tilegx PCI root complex support
This change implements PCIe root complex support for tilegx using
the kernel support layer for accessing the TRIO hardware shim.
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3]
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index dd87f34..6d179df 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -1344,6 +1344,7 @@
#ifdef CONFIG_PCI
+#if !defined (__tilegx__)
/*
* Initialize the PCI structures. This is done before memory
* setup so that we know whether or not a pci_reserve region
@@ -1351,6 +1352,7 @@
*/
if (tile_pci_init() == 0)
pci_reserve_mb = 0;
+#endif
/* PCI systems reserve a region just below 4GB for mapping iomem. */
pci_reserve_end_pfn = (1 << (32 - PAGE_SHIFT));
@@ -1379,6 +1381,10 @@
setup_cpu(1);
setup_clock();
load_hv_initrd();
+
+#if defined(CONFIG_PCI) && defined (__tilegx__)
+ tile_pci_init();
+#endif
}