clk: si5351: Allow user to define disabled state for every clock output
This patch adds platform data and DT bindings to allow to overwrite
the stored disabled state for each clock output.
Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 8927284..efc6d5e 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -851,6 +851,41 @@
return 0;
}
+static int _si5351_clkout_set_disable_state(
+ struct si5351_driver_data *drvdata, int num,
+ enum si5351_disable_state state)
+{
+ u8 reg = (num < 4) ? SI5351_CLK3_0_DISABLE_STATE :
+ SI5351_CLK7_4_DISABLE_STATE;
+ u8 shift = (num < 4) ? (2 * num) : (2 * (num-4));
+ u8 mask = SI5351_CLK_DISABLE_STATE_MASK << shift;
+ u8 val;
+
+ if (num > 8)
+ return -EINVAL;
+
+ switch (state) {
+ case SI5351_DISABLE_LOW:
+ val = SI5351_CLK_DISABLE_STATE_LOW;
+ break;
+ case SI5351_DISABLE_HIGH:
+ val = SI5351_CLK_DISABLE_STATE_HIGH;
+ break;
+ case SI5351_DISABLE_FLOATING:
+ val = SI5351_CLK_DISABLE_STATE_FLOAT;
+ break;
+ case SI5351_DISABLE_NEVER:
+ val = SI5351_CLK_DISABLE_STATE_NEVER;
+ break;
+ default:
+ return 0;
+ }
+
+ si5351_set_bits(drvdata, reg, mask, val << shift);
+
+ return 0;
+}
+
static int si5351_clkout_prepare(struct clk_hw *hw)
{
struct si5351_hw_data *hwdata =
@@ -1225,6 +1260,33 @@
}
}
+ if (!of_property_read_u32(child, "silabs,disable-state",
+ &val)) {
+ switch (val) {
+ case 0:
+ pdata->clkout[num].disable_state =
+ SI5351_DISABLE_LOW;
+ break;
+ case 1:
+ pdata->clkout[num].disable_state =
+ SI5351_DISABLE_HIGH;
+ break;
+ case 2:
+ pdata->clkout[num].disable_state =
+ SI5351_DISABLE_FLOATING;
+ break;
+ case 3:
+ pdata->clkout[num].disable_state =
+ SI5351_DISABLE_NEVER;
+ break;
+ default:
+ dev_err(&client->dev,
+ "invalid disable state %d for clkout %d\n",
+ val, num);
+ return -EINVAL;
+ }
+ }
+
if (!of_property_read_u32(child, "clock-frequency", &val))
pdata->clkout[num].rate = val;
@@ -1281,9 +1343,6 @@
/* Disable interrupts */
si5351_reg_write(drvdata, SI5351_INTERRUPT_MASK, 0xf0);
- /* Set disabled output drivers to drive low */
- si5351_reg_write(drvdata, SI5351_CLK3_0_DISABLE_STATE, 0x00);
- si5351_reg_write(drvdata, SI5351_CLK7_4_DISABLE_STATE, 0x00);
/* Ensure pll select is on XTAL for Si5351A/B */
if (drvdata->variant != SI5351_VARIANT_C)
si5351_set_bits(drvdata, SI5351_PLL_INPUT_SOURCE,
@@ -1327,6 +1386,15 @@
n, pdata->clkout[n].drive);
return ret;
}
+
+ ret = _si5351_clkout_set_disable_state(drvdata, n,
+ pdata->clkout[n].disable_state);
+ if (ret) {
+ dev_err(&client->dev,
+ "failed set disable state of clkout%d to %d\n",
+ n, pdata->clkout[n].disable_state);
+ return ret;
+ }
}
/* register xtal input clock gate */
diff --git a/drivers/clk/clk-si5351.h b/drivers/clk/clk-si5351.h
index af41b50..c0dbf26 100644
--- a/drivers/clk/clk-si5351.h
+++ b/drivers/clk/clk-si5351.h
@@ -81,6 +81,7 @@
#define SI5351_CLK3_0_DISABLE_STATE 24
#define SI5351_CLK7_4_DISABLE_STATE 25
+#define SI5351_CLK_DISABLE_STATE_MASK 3
#define SI5351_CLK_DISABLE_STATE_LOW 0
#define SI5351_CLK_DISABLE_STATE_HIGH 1
#define SI5351_CLK_DISABLE_STATE_FLOAT 2