drm/radeon: don't reset the MC on IGPs/APUs
The MC isn't part of the GPU per se.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index b6e8055..170bd03 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1474,8 +1474,10 @@
if (reset_mask & RADEON_RESET_VMC)
srbm_soft_reset |= SOFT_RESET_VMC;
- if (reset_mask & RADEON_RESET_MC)
- srbm_soft_reset |= SOFT_RESET_MC;
+ if (!(rdev->flags & RADEON_IS_IGP)) {
+ if (reset_mask & RADEON_RESET_MC)
+ srbm_soft_reset |= SOFT_RESET_MC;
+ }
if (grbm_soft_reset) {
tmp = RREG32(GRBM_SOFT_RESET);