commit 25985edcedea6396277003854657b5f3cb31a628
author Lucas De Marchi <lucas.demarchi@profusion.mobi> Wed Mar 30 22:57:33 2011 -0300
committer Lucas De Marchi <lucas.demarchi@profusion.mobi> Thu Mar 31 11:26:23 2011 -0300
tree f026e810210a2ee7290caeb737c23cb6472b7c38
parent 6aba74f2791287ec407e0f92487a725a25908067

Fix common misspellings

Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>

arch/arm/mm/cache-v7.S

diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 6136e68..dc18d81 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -96,7 +96,7 @@
  *	Flush the entire cache system.
  *  The data cache flush is now achieved using atomic clean / invalidates
  *  working outwards from L1 cache. This is done using Set/Way based cache
- *  maintainance instructions.
+ *  maintenance instructions.
  *  The instruction cache can still be invalidated back to the point of
  *  unification in a single instruction.
  *