)]}'
{
  "commit": "288dde9f23b6726c1e8147bf635721372bf77b16",
  "tree": "93867e6ea58c82b182c073b1b17e1e4a12b65762",
  "parents": [
    "582c016e68dc5dfea4d3582512157f165a428149"
  ],
  "author": {
    "name": "Moshe Lazer",
    "email": "moshel@mellanox.com",
    "time": "Wed Jul 10 14:31:03 2013 +0300"
  },
  "committer": {
    "name": "Roland Dreier",
    "email": "roland@purestorage.com",
    "time": "Thu Jul 11 16:45:08 2013 -0700"
  },
  "message": "mlx5_core: Adjust hca_cap.uar_page_sz to conform to Connect-IB spec\n\nSparse reported an endianness bug in the assignment to hca_cap.uar_page_sz.\n\nFix the declaration of this field to be __be16 (which is what is in\nthe firmware spec), renaming the field to log_uar_pg_size to conform\nto the spec, which fixes the endianness bug reported by sparse.\n\nReported-by: Fengguang Wu \u003cfengguang.wu@intel.com\u003e\nSigned-off-by: Moshe Lazer \u003cmoshel@mellanox.com\u003e\nSigned-off-by: Or Gerlitz \u003cogerlitz@mellanox.com\u003e\nSigned-off-by: Roland Dreier \u003croland@purestorage.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f21cc397d1bc33a27097b14fc635db2898c85cbd",
      "old_mode": 33188,
      "old_path": "drivers/net/ethernet/mellanox/mlx5/core/main.c",
      "new_id": "12242de2b0e3ec7950a01f966def239e4b1ce74f",
      "new_mode": 33188,
      "new_path": "drivers/net/ethernet/mellanox/mlx5/core/main.c"
    },
    {
      "type": "modify",
      "old_id": "51390915e538db199c1845976446163d6a07241e",
      "old_mode": 33188,
      "old_path": "include/linux/mlx5/device.h",
      "new_id": "8de8d8f22384b9abcd83ce0f76898c7afdf7ded9",
      "new_mode": 33188,
      "new_path": "include/linux/mlx5/device.h"
    }
  ]
}