[MIPS] Fixup secure computing stuff.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h
index 1ad60ba..bf55a5b 100644
--- a/include/asm-mips/a.out.h
+++ b/include/asm-mips/a.out.h
@@ -38,7 +38,8 @@
#define STACK_TOP TASK_SIZE
#endif
#ifdef CONFIG_64BIT
-#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE)
+#define STACK_TOP \
+ (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
#endif
#define STACK_TOP_MAX TASK_SIZE
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index ebd6bfb..e7d95d4 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -265,7 +265,7 @@
#ifdef CONFIG_MIPS32_N32
#define __SET_PERSONALITY32_N32() \
do { \
- current->thread.mflags |= MF_N32; \
+ set_thread_flag(TIF_32BIT_ADDR); \
current->thread.abi = &mips_abi_n32; \
} while (0)
#else
@@ -276,7 +276,8 @@
#ifdef CONFIG_MIPS32_O32
#define __SET_PERSONALITY32_O32() \
do { \
- current->thread.mflags |= MF_O32; \
+ set_thread_flag(TIF_32BIT_REGS); \
+ set_thread_flag(TIF_32BIT_ADDR); \
current->thread.abi = &mips_abi_32; \
} while (0)
#else
@@ -299,13 +300,13 @@
#define SET_PERSONALITY(ex, ibcs2) \
do { \
- current->thread.mflags &= ~MF_ABI_MASK; \
+ clear_thread_flag(TIF_32BIT_REGS); \
+ clear_thread_flag(TIF_32BIT_ADDR); \
+ \
if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
__SET_PERSONALITY32(ex); \
- else { \
- current->thread.mflags |= MF_N64; \
+ else \
current->thread.abi = &mips_abi; \
- } \
\
if (ibcs2) \
set_personality(PER_SVR4); \
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 1d8b9a8..83bc945 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -62,8 +62,9 @@
* This decides where the kernel will search for a free chunk of vm
* space during mmap's.
*/
-#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
- PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
+#define TASK_UNMAPPED_BASE \
+ (test_thread_flag(TIF_32BIT_ADDR) ? \
+ PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
#endif
#define NUM_FPU_REGS 32
@@ -132,22 +133,11 @@
unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
unsigned long error_code;
unsigned long trap_no;
-#define MF_FIXADE 1 /* Fix address errors in software */
-#define MF_LOGADE 2 /* Log address errors to syslog */
-#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
-#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
-#define MF_FPUBOUND 0x10 /* thread bound to FPU-full CPU set */
- unsigned long mflags;
unsigned long irix_trampoline; /* Wheee... */
unsigned long irix_oldctx;
struct mips_abi *abi;
};
-#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
-#define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR)
-#define MF_N32 MF_32BIT_ADDR
-#define MF_N64 0
-
#ifdef CONFIG_MIPS_MT_FPAFF
#define FPAFF_INIT \
.emulated_fp = 0, \
@@ -200,10 +190,6 @@
.cp0_baduaddr = 0, \
.error_code = 0, \
.trap_no = 0, \
- /* \
- * For now the default is to fix address errors \
- */ \
- .mflags = MF_FIXADE, \
.irix_trampoline = 0, \
.irix_oldctx = 0, \
}
diff --git a/include/asm-mips/seccomp.h b/include/asm-mips/seccomp.h
new file mode 100644
index 0000000..36ed440
--- /dev/null
+++ b/include/asm-mips/seccomp.h
@@ -0,0 +1,37 @@
+#ifndef __ASM_SECCOMP_H
+
+#include <linux/thread_info.h>
+#include <linux/unistd.h>
+
+#define __NR_seccomp_read __NR_read
+#define __NR_seccomp_write __NR_write
+#define __NR_seccomp_exit __NR_exit
+#define __NR_seccomp_sigreturn __NR_rt_sigreturn
+
+/*
+ * Kludge alert:
+ *
+ * The generic seccomp code currently allows only a single compat ABI. Until
+ * this is fixed we priorize O32 as the compat ABI over N32.
+ */
+#ifdef CONFIG_MIPS32_O32
+
+#define TIF_32BIT TIF_32BIT_REGS
+
+#define __NR_seccomp_read_32 4003
+#define __NR_seccomp_write_32 4004
+#define __NR_seccomp_exit_32 4001
+#define __NR_seccomp_sigreturn_32 4193 /* rt_sigreturn */
+
+#elif defined(CONFIG_MIPS32_N32)
+
+#define TIF_32BIT _TIF_32BIT_ADDR
+
+#define __NR_seccomp_read_32 6000
+#define __NR_seccomp_write_32 6001
+#define __NR_seccomp_exit_32 6058
+#define __NR_seccomp_sigreturn_32 6211 /* rt_sigreturn */
+
+#endif /* CONFIG_MIPS32_O32 */
+
+#endif /* __ASM_SECCOMP_H */
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 8d0b1cd..357251f 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -46,10 +46,12 @@
#define __mips_mt_fpaff_switch_to(prev) \
do { \
+ struct thread_info *__prev_ti = task_thread_info(prev); \
+ \
if (cpu_has_fpu && \
- (prev->thread.mflags & MF_FPUBOUND) && \
- (!(KSTK_STATUS(prev) & ST0_CU1))) { \
- prev->thread.mflags &= ~MF_FPUBOUND; \
+ test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \
+ (!(KSTK_STATUS(prev) & ST0_CU1))) { \
+ clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \
prev->cpus_allowed = prev->thread.user_cpus_allowed; \
} \
next->thread.emulated_fp = 0; \
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index fbcda82..9676e7d 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -46,7 +46,7 @@
{ \
.task = &tsk, \
.exec_domain = &default_exec_domain, \
- .flags = 0, \
+ .flags = _TIF_FIXADE, \
.cpu = 0, \
.preempt_count = 1, \
.addr_limit = KERNEL_DS, \
@@ -119,6 +119,11 @@
#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
#define TIF_MEMDIE 18
#define TIF_FREEZE 19
+#define TIF_FIXADE 20 /* Fix address errors in software */
+#define TIF_LOGADE 21 /* Log address errors to syslog */
+#define TIF_32BIT_REGS 22 /* also implies 16/32 fprs */
+#define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
+#define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -131,6 +136,11 @@
#define _TIF_USEDFPU (1<<TIF_USEDFPU)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_FREEZE (1<<TIF_FREEZE)
+#define _TIF_FIXADE (1<<TIF_FIXADE)
+#define _TIF_LOGADE (1<<TIF_LOGADE)
+#define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS)
+#define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR)
+#define _TIF_FPUBOUND (1<<TIF_FPUBOUND)
/* work to do on interrupt/exception return */
#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)