ARM: entry: data abort: arrange for CPU abort helpers to take pc/psr in r4/r5
Re-jig the CPU abort helpers to take the PC/PSR in r4/r5 rather
than r2/r3.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index af2fba7..85298c0 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -56,14 +56,12 @@
.endm
.macro dabt_helper
- mov r2, r4
- mov r3, r5
@
@ Call the processor-specific abort handler:
@
- @ r2 - aborted context pc
- @ r3 - aborted context cpsr
+ @ r4 - aborted context pc
+ @ r5 - aborted context psr
@
@ The abort handler must return the aborted address in r0, and
@ the fault status register in r1. r9 must be preserved.