arm64: Execute DSB during thread switching for TLB/cache maintenance
The DSB following TLB or cache maintenance ops must be run on the same
CPU. With kernel preemption enabled or for user-space cache maintenance
this may not be the case. This patch adds an explicit DSB in the
__switch_to() function.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index c2cc249..116a60a 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -313,6 +313,12 @@
hw_breakpoint_thread_switch(next);
contextidr_thread_switch(next);
+ /*
+ * Complete any pending TLB or cache maintenance on this CPU in case
+ * the thread migrates to a different CPU.
+ */
+ dsb();
+
/* the actual thread switch */
last = cpu_switch_to(prev, next);