drm/radeon: make ring rptr and wptr register offsets variable
Every ring seems to have the concept of read and
write pointers. Make the register offset variable
so we can use the functions for different types of rings.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 636b8c5..cc9aaeb 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1273,7 +1273,7 @@
radeon_ring_unlock_commit(rdev, cp);
}
/* XXX deal with CP0,1,2 */
- cp->rptr = RREG32(CP_RB0_RPTR);
+ cp->rptr = RREG32(cp->rptr_reg);
return r100_gpu_cp_is_lockup(rdev, lockup, cp);
}
@@ -1393,7 +1393,8 @@
}
evergreen_irq_set(rdev);
- r = radeon_ring_init(rdev, cp, cp->ring_size);
+ r = radeon_ring_init(rdev, cp, cp->ring_size, RADEON_WB_CP_RPTR_OFFSET,
+ CP_RB0_RPTR, CP_RB0_WPTR);
if (r)
return r;
r = cayman_cp_load_microcode(rdev);