drm/radeon: make ring rptr and wptr register offsets variable
Every ring seems to have the concept of read and
write pointers. Make the register offset variable
so we can use the functions for different types of rings.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 271cee7..6c32811 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1074,7 +1074,8 @@
rb_bufsz = drm_order(ring_size / 8);
ring_size = (1 << (rb_bufsz + 1)) * 4;
r100_cp_load_microcode(rdev);
- r = radeon_ring_init(rdev, cp, ring_size);
+ r = radeon_ring_init(rdev, cp, ring_size, RADEON_WB_CP_RPTR_OFFSET,
+ RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR);
if (r) {
return r;
}
@@ -1179,13 +1180,6 @@
}
}
-void r100_cp_commit(struct radeon_device *rdev, struct radeon_cp *cp)
-{
- WREG32(RADEON_CP_RB_WPTR, cp->wptr);
- (void)RREG32(RADEON_CP_RB_WPTR);
-}
-
-
/*
* CS functions
*/
@@ -2184,7 +2178,7 @@
radeon_ring_write(cp, 0x80000000);
radeon_ring_unlock_commit(rdev, cp);
}
- cp->rptr = RREG32(RADEON_CP_RB_RPTR);
+ cp->rptr = RREG32(cp->rptr_reg);
return r100_gpu_cp_is_lockup(rdev, &rdev->config.r100.lockup, cp);
}