ASoC: omap-mcbsp: Correct clock muxing for CLKR/FSR signals
Remove the no longer valid check for McBSP1 regarding to signal mux
selection (on OMAP4 McBSP4 has 6 pin setup).
Only clear the srgr2, pcr0 register configuration if the requested clock
configuration will actually going to touch it. In this way we can avoid
issues if the CLKR/FSR mux has been configured after the clock selection.
We are going to check for the valid McBSP port in the
omap_mcbsp_6pin_src_mux() function based on the validity of the mux_signal
callback (which is only valid for ports having 6 pin setup).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@ti.com>
diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c
index 95413a1..e5f4444 100644
--- a/sound/soc/omap/mcbsp.c
+++ b/sound/soc/omap/mcbsp.c
@@ -690,7 +690,9 @@
int omap_mcbsp_6pin_src_mux(struct omap_mcbsp *mcbsp, u8 mux)
{
const char *signal, *src;
- int ret = 0;
+
+ if (mcbsp->pdata->mux_signal)
+ return -EINVAL;
switch (mux) {
case CLKR_SRC_CLKR:
@@ -713,10 +715,7 @@
return -EINVAL;
}
- if (mcbsp->pdata->mux_signal)
- ret = mcbsp->pdata->mux_signal(mcbsp->dev, signal, src);
-
- return ret;
+ return mcbsp->pdata->mux_signal(mcbsp->dev, signal, src);
}
#define max_thres(m) (mcbsp->pdata->buffer_size)