)]}'
{
  "commit": "60a6c3777ec607c5b19df9eac35088db4e142a6b",
  "tree": "8f4a680f4667ac4698dfd80bd4ccd79a34f10b19",
  "parents": [
    "7fdeb048141b363a23b8cf6f6a226d74aca4d724"
  ],
  "author": {
    "name": "Atsushi Nemoto",
    "email": "anemo@mba.ocn.ne.jp",
    "time": "Thu Jun 08 01:09:01 2006 +0900"
  },
  "committer": {
    "name": "Ralf Baechle",
    "email": "ralf@linux-mips.org",
    "time": "Wed Sep 27 13:37:40 2006 +0100"
  },
  "message": "[MIPS] Reduce race between cpu_wait() and need_resched() checking\n\nIf a thread became runnable between need_resched() and the WAIT\ninstruction, switching to the thread will delay until a next interrupt.\nSome CPUs can execute the WAIT instruction with interrupt disabled, so\nwe can get rid of this race on them (at least UP case).\n\nOriginal Patch by Atsushi with fixing up for MIPS Technology\u0027s cores by\nRalf based on feedback from the RTL designers.\n\nSigned-off-by: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "aa2caa67299a45ec4b5d8950b82bf695d611855c",
      "old_mode": 33188,
      "old_path": "arch/mips/kernel/cpu-probe.c",
      "new_id": "9fbf8430c8499972ab80047026c803e64306a253",
      "new_mode": 33188,
      "new_path": "arch/mips/kernel/cpu-probe.c"
    }
  ]
}