uml: fix page table data sizes
Get the sizes of various pieces of data right when using three-level
page tables. pgd and pmd entries remain at 32 bits in a 32-bit
compilation because page tables will remain in low memory. So,
PGDIR_SHIFT, the PTRS_PER_* values, set_pud, set_pmd are conditional
on 64BIT.
More use of phys_t is made when there are physical memory addresses
floating around.
ObCheckpatchViolationJustification - the new typedef is an alternate
definition of pmd_t, which I can't really live without.
Signed-off-by: Jeff Dike <jdike@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
diff --git a/include/asm-um/pgtable.h b/include/asm-um/pgtable.h
index bec4840..62ab94a 100644
--- a/include/asm-um/pgtable.h
+++ b/include/asm-um/pgtable.h
@@ -262,7 +262,7 @@
#define phys_to_page(phys) pfn_to_page(phys_to_pfn(phys))
#define __virt_to_page(virt) phys_to_page(__pa(virt))
-#define page_to_phys(page) pfn_to_phys(page_to_pfn(page))
+#define page_to_phys(page) pfn_to_phys((pfn_t) page_to_pfn(page))
#define virt_to_page(addr) __virt_to_page((const unsigned long) addr)
#define mk_pte(page, pgprot) \