commit 6f2f48a9a061a94d059f89c69472f467839cc616
author Alex Deucher <alexdeucher@gmail.com> Wed Dec 15 11:01:56 2010 -0500
committer Dave Airlie <airlied@redhat.com> Thu Dec 16 10:08:26 2010 +1000
tree 980b2ea58eb2fe24bd52125da8d512c58dd54b79
parent a1a8213392b29c2b427567b86e2ccfe88ded58cc

drm/radeon/kms/evergreen: flush hdp cache when flushing gart tlb

Make sure vram changes hit memory.  This mirrors the
6xx/7xx behavior.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drivers/gpu/drm/radeon/evergreend.h

diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 113c70c..a73b53c 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -174,6 +174,7 @@
 #define	HDP_NONSURFACE_BASE				0x2C04
 #define	HDP_NONSURFACE_INFO				0x2C08
 #define	HDP_NONSURFACE_SIZE				0x2C0C
+#define HDP_MEM_COHERENCY_FLUSH_CNTL			0x5480
 #define HDP_REG_COHERENCY_FLUSH_CNTL			0x54A0
 #define	HDP_TILING_CONFIG				0x2F3C