perfcounters/powerpc: Add support for POWER5 processors
This adds the back-end for the PMU on the POWER5 processor. This knows
how to use the fixed-function PMC5 and PMC6 (instructions completed and
run cycles). Unlike POWER6, PMC5/6 obey the freeze conditions and can
generate interrupts, so their use doesn't impose any extra restrictions.
POWER5+ is different and is not supported by this patch.
Signed-off-by: Paul Mackerras <paulus@samba.org>
diff --git a/arch/powerpc/kernel/perf_counter.c b/arch/powerpc/kernel/perf_counter.c
index 6e27913..112332d 100644
--- a/arch/powerpc/kernel/perf_counter.c
+++ b/arch/powerpc/kernel/perf_counter.c
@@ -824,6 +824,7 @@
}
extern struct power_pmu ppc970_pmu;
+extern struct power_pmu power5_pmu;
extern struct power_pmu power6_pmu;
static int init_perf_counters(void)
@@ -843,6 +844,9 @@
case PV_970MP:
ppmu = &ppc970_pmu;
break;
+ case PV_POWER5:
+ ppmu = &power5_pmu;
+ break;
case 0x3e:
ppmu = &power6_pmu;
break;