MIPS: Alchemy: update core interrupt code.
This patch attempts to modernize core Alchemy interrupt handling code.
- add irq_chips for irq controllers instead of irq type,
- add a set_type() hook to change irq trigger type during runtime,
- add a set_wake() hook to control GPIO0..7 based wakeup,
- use linux' IRQF_TRIGGER_ constants instead of homebrew ones,
- enable GENERIC_HARDIRQS_NO__DO_IRQ.
- simplify plat_irq_dispatch
- merge au1xxx_irqmap into irq.c file, the only place where its
contents are referenced.
- board_init_irq() is now mandatory for every board; use it to register
the remaining (gpio-based) interrupt sources; update all boards
accordingly.
Run-tested on Db1200 and other Au1200 based platforms.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index bd854a6..33a3cdb 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -51,7 +51,6 @@
extern unsigned long save_local_and_disable(int controller);
extern void restore_local_and_enable(int controller, unsigned long mask);
-extern void local_enable_irq(unsigned int irq_nr);
static DEFINE_SPINLOCK(pm_lock);
@@ -364,7 +363,10 @@
*/
intc0_mask = save_local_and_disable(0);
intc1_mask = save_local_and_disable(1);
- local_enable_irq(AU1000_TOY_MATCH2_INT);
+ val = 1 << (AU1000_TOY_MATCH2_INT - AU1000_INTC0_INT_BASE);
+ au_writel(val, IC0_MASKSET); /* unmask */
+ au_writel(val, IC0_WAKESET); /* enable wake-from-sleep */
+ au_sync();
spin_unlock_irqrestore(&pm_lock, flags);
au1000_calibrate_delay();
restore_local_and_enable(0, intc0_mask);