|  | /* | 
|  | * OMAP4 specific common source file. | 
|  | * | 
|  | * Copyright (C) 2010 Texas Instruments, Inc. | 
|  | * Author: | 
|  | *	Santosh Shilimkar <santosh.shilimkar@ti.com> | 
|  | * | 
|  | * | 
|  | * This program is free software,you can redistribute it and/or modify | 
|  | * it under the terms of the GNU General Public License version 2 as | 
|  | * published by the Free Software Foundation. | 
|  | */ | 
|  |  | 
|  | #include <linux/kernel.h> | 
|  | #include <linux/init.h> | 
|  | #include <linux/io.h> | 
|  | #include <linux/platform_device.h> | 
|  |  | 
|  | #include <asm/hardware/gic.h> | 
|  | #include <asm/hardware/cache-l2x0.h> | 
|  |  | 
|  | #include <mach/hardware.h> | 
|  | #include <mach/omap4-common.h> | 
|  |  | 
|  | #ifdef CONFIG_CACHE_L2X0 | 
|  | void __iomem *l2cache_base; | 
|  | #endif | 
|  |  | 
|  | void __iomem *gic_dist_base_addr; | 
|  |  | 
|  |  | 
|  | void __init gic_init_irq(void) | 
|  | { | 
|  | void __iomem *gic_cpu_base; | 
|  |  | 
|  | /* Static mapping, never released */ | 
|  | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | 
|  | BUG_ON(!gic_dist_base_addr); | 
|  |  | 
|  | /* Static mapping, never released */ | 
|  | gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | 
|  | BUG_ON(!gic_cpu_base); | 
|  |  | 
|  | gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); | 
|  | } | 
|  |  | 
|  | #ifdef CONFIG_CACHE_L2X0 | 
|  |  | 
|  | static void omap4_l2x0_disable(void) | 
|  | { | 
|  | /* Disable PL310 L2 Cache controller */ | 
|  | omap_smc1(0x102, 0x0); | 
|  | } | 
|  |  | 
|  | static int __init omap_l2_cache_init(void) | 
|  | { | 
|  | u32 aux_ctrl = 0; | 
|  |  | 
|  | /* | 
|  | * To avoid code running on other OMAPs in | 
|  | * multi-omap builds | 
|  | */ | 
|  | if (!cpu_is_omap44xx()) | 
|  | return -ENODEV; | 
|  |  | 
|  | /* Static mapping, never released */ | 
|  | l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); | 
|  | BUG_ON(!l2cache_base); | 
|  |  | 
|  | /* | 
|  | * 16-way associativity, parity disabled | 
|  | * Way size - 32KB (es1.0) | 
|  | * Way size - 64KB (es2.0 +) | 
|  | */ | 
|  | aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) | | 
|  | (0x1 << 25) | | 
|  | (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) | | 
|  | (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT)); | 
|  |  | 
|  | if (omap_rev() == OMAP4430_REV_ES1_0) { | 
|  | aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT; | 
|  | } else { | 
|  | aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | | 
|  | (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | | 
|  | (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) | | 
|  | (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) | | 
|  | (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT)); | 
|  | } | 
|  | if (omap_rev() != OMAP4430_REV_ES1_0) | 
|  | omap_smc1(0x109, aux_ctrl); | 
|  |  | 
|  | /* Enable PL310 L2 Cache controller */ | 
|  | omap_smc1(0x102, 0x1); | 
|  |  | 
|  | l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK); | 
|  |  | 
|  | /* | 
|  | * Override default outer_cache.disable with a OMAP4 | 
|  | * specific one | 
|  | */ | 
|  | outer_cache.disable = omap4_l2x0_disable; | 
|  |  | 
|  | return 0; | 
|  | } | 
|  | early_initcall(omap_l2_cache_init); | 
|  | #endif |