DM9000: Fix endian-ness of data accesses.
Patch from: Laurent Pinchart <laurentp@cse-semaphore.com>
This patch splits the receive status in 8bit wide fields and convert the
packet length from little endian to CPU byte order.
Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
index 6a20a54..e4390d9 100644
--- a/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
@@ -867,7 +867,8 @@
}
struct dm9000_rxhdr {
- u16 RxStatus;
+ u8 RxPktReady;
+ u8 RxStatus;
u16 RxLen;
} __attribute__((__packed__));
@@ -908,7 +909,7 @@
(db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
- RxLen = rxhdr.RxLen;
+ RxLen = le16_to_cpu(rxhdr.RxLen);
/* Packet Status check */
if (RxLen < 0x40) {
@@ -920,17 +921,17 @@
PRINTK1("RST: RX Len:%x\n", RxLen);
}
- if (rxhdr.RxStatus & 0xbf00) {
+ if (rxhdr.RxStatus & 0xbf) {
GoodPacket = false;
- if (rxhdr.RxStatus & 0x100) {
+ if (rxhdr.RxStatus & 0x01) {
PRINTK1("fifo error\n");
dev->stats.rx_fifo_errors++;
}
- if (rxhdr.RxStatus & 0x200) {
+ if (rxhdr.RxStatus & 0x02) {
PRINTK1("crc error\n");
dev->stats.rx_crc_errors++;
}
- if (rxhdr.RxStatus & 0x8000) {
+ if (rxhdr.RxStatus & 0x80) {
PRINTK1("length error\n");
dev->stats.rx_length_errors++;
}