)]}'
{
  "commit": "a3df6f7d3090e611bcc774cd2cba45ae016d37e1",
  "tree": "fd7239293b33e2d60ad6e5d7f2f2df9ef985a056",
  "parents": [
    "eced1dfcfcf6b0a35e925d73916a9d8e36ab5457"
  ],
  "author": {
    "name": "Paul Mackerras",
    "email": "paulus@samba.org",
    "time": "Thu Sep 03 11:52:02 2009 +1000"
  },
  "committer": {
    "name": "Ingo Molnar",
    "email": "mingo@elte.hu",
    "time": "Thu Sep 03 08:41:53 2009 +0200"
  },
  "message": "perf_counter/powerpc: Fix cache event codes for POWER7\n\nI had the codes for L1 D-cache load accesses and misses swapped\naround, and the wrong codes for LL-cache accesses and misses.\nThis corrects them.\n\nReported-by: Corey Ashford \u003ccjashfor@linux.vnet.ibm.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: \u003cstable@kernel.org\u003e\nLKML-Reference: \u003c19103.8514.709300.585484@cargo.ozlabs.ibm.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "388cf57ad827b8d187c49dc34eb0ec8deaf48db5",
      "old_mode": 33188,
      "old_path": "arch/powerpc/kernel/power7-pmu.c",
      "new_id": "018d094d92f91d2af529f0eff119f3b3f27983ef",
      "new_mode": 33188,
      "new_path": "arch/powerpc/kernel/power7-pmu.c"
    }
  ]
}