commit a714ffff36a581756ec3b001f47e8e5e96a9fa0e
author Chris Metcalf <cmetcalf@tilera.com> Thu Mar 29 15:23:54 2012 -0400
committer Chris Metcalf <cmetcalf@tilera.com> Mon Apr 02 12:12:52 2012 -0400
tree 73f84f87b09b30f9621f50748b897303bb1d3b6a
parent e17235382dbb05f70146e141e4b780fd069050dc

arch/tile: fix up some minor trap handling issues

We now respond to MEM_ERROR traps (e.g. an atomic instruction to
non-cacheable memory) with a SIGBUS.

We also no longer generate a console crash message if a user
process die due to a SIGTRAP.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>

arch/tile/kernel/intvec_64.S

diff --git a/arch/tile/kernel/intvec_64.S b/arch/tile/kernel/intvec_64.S
index 2c181c8..005535d 100644
--- a/arch/tile/kernel/intvec_64.S
+++ b/arch/tile/kernel/intvec_64.S
@@ -1178,7 +1178,7 @@
 #define do_hardwall_trap bad_intr
 #endif
 
-	int_hand     INT_MEM_ERROR, MEM_ERROR, bad_intr
+	int_hand     INT_MEM_ERROR, MEM_ERROR, do_trap
 	int_hand     INT_SINGLE_STEP_3, SINGLE_STEP_3, bad_intr
 #if CONFIG_KERNEL_PL == 2
 	int_hand     INT_SINGLE_STEP_2, SINGLE_STEP_2, gx_singlestep_handle