[PATCH] ppc32: 85xx PHY Platform Update
This patch updates the 85xx platform code to support the new PHY Layer.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <Kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 516984e..d98db98 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -67,6 +67,8 @@
#define MPC85xx_DMA3_SIZE (0x00080)
#define MPC85xx_ENET1_OFFSET (0x24000)
#define MPC85xx_ENET1_SIZE (0x01000)
+#define MPC85xx_MIIM_OFFSET (0x24520)
+#define MPC85xx_MIIM_SIZE (0x00018)
#define MPC85xx_ENET2_OFFSET (0x25000)
#define MPC85xx_ENET2_SIZE (0x01000)
#define MPC85xx_ENET3_OFFSET (0x26000)
@@ -132,6 +134,7 @@
MPC85xx_eTSEC3,
MPC85xx_eTSEC4,
MPC85xx_IIC2,
+ MPC85xx_MDIO,
};
/* Internal interrupts are all Level Sensitive, and Positive Polarity */
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 70f54af..114d5d5 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -47,16 +47,21 @@
struct gianfar_platform_data {
/* device specific information */
u32 device_flags;
- u32 phy_reg_addr;
/* board specific information */
u32 board_flags;
- u32 phy_flags;
- u32 phyid;
- u32 interruptPHY;
+ const char *bus_id;
u8 mac_addr[6];
};
+struct gianfar_mdio_data {
+ /* device specific information */
+ u32 paddr;
+
+ /* board specific information */
+ int irq[32];
+};
+
/* Flags related to gianfar device features */
#define FSL_GIANFAR_DEV_HAS_GIGABIT 0x00000001
#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002