sparc64: Make %pil level 15 a pseudo-NMI.
So that we can profile code even in a local_irq_disable() section,
only write 14 (instead of 15) into the %pil register to disable IRQs.
This allows PIL level 15 to serve as a pseudo NMI.
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/arch/sparc64/kernel/cherrs.S b/arch/sparc64/kernel/cherrs.S
index 89afebd..4ee1ad4 100644
--- a/arch/sparc64/kernel/cherrs.S
+++ b/arch/sparc64/kernel/cherrs.S
@@ -102,7 +102,7 @@
.type do_cheetah_plus_data_parity,#function
do_cheetah_plus_data_parity:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -144,7 +144,7 @@
.type do_cheetah_plus_insn_parity,#function
do_cheetah_plus_insn_parity:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -492,7 +492,7 @@
.type c_fast_ecc,#function
c_fast_ecc:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -528,7 +528,7 @@
.type c_cee,#function
c_cee:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS
@@ -564,7 +564,7 @@
.type c_deferred,#function
c_deferred:
rdpr %pil, %g2
- wrpr %g0, 15, %pil
+ wrpr %g0, PIL_NORMAL_MAX, %pil
ba,pt %xcc, etrap_irq
rd %pc, %g7
#ifdef CONFIG_TRACE_IRQFLAGS