)]}'
{
  "commit": "c44e3ed539e4fc17d6bcb5eaecb894a94de4cc5f",
  "tree": "dbc31370fbc5196e090708341f3ca4c4dca7f41e",
  "parents": [
    "7dc3ca39cb1e22eedbf1207ff9ac7bf682fc0f6d",
    "5095f59bda6793a7b8f0856096d6893fe98e0e51"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Wed Jun 10 15:51:15 2009 -0700"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Wed Jun 10 15:51:15 2009 -0700"
  },
  "message": "Merge branch \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86: cpu_debug: Remove model information to reduce encoding-decoding\n  x86: fixup numa_node information for AMD CPU northbridge functions\n  x86: k8 convert node_to_k8_nb_misc() from a macro to an inline function\n  x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions\n  x86/docs: add description for cache_disable sysfs interface\n  x86: cacheinfo: disable L3 ECC scrubbing when L3 cache index is disabled\n  x86: cacheinfo: replace sysfs interface for cache_disable feature\n  x86: cacheinfo: use cached K8 NB_MISC devices instead of scanning for it\n  x86: cacheinfo: correct return value when cache_disable feature is not active\n  x86: cacheinfo: use L3 cache index disable feature only for CPUs that support it\n",
  "tree_diff": []
}