xtensa: add support for TLS
The Xtensa architecture provides a global register called THREADPTR
for the purpose of Thread Local Storage (TLS) support. This allows us
to use a fairly simple implementation, keeping the thread pointer in
the regset and simply saving and restoring it upon entering/exiting
the from user space.
Signed-off-by: Chris Zankel <chris@zankel.net>
diff --git a/arch/xtensa/include/asm/elf.h b/arch/xtensa/include/asm/elf.h
index 264d5fa..eacb25a 100644
--- a/arch/xtensa/include/asm/elf.h
+++ b/arch/xtensa/include/asm/elf.h
@@ -84,7 +84,8 @@
elf_greg_t sar;
elf_greg_t windowstart;
elf_greg_t windowbase;
- elf_greg_t reserved[8+48];
+ elf_greg_t threadptr;
+ elf_greg_t reserved[7+48];
elf_greg_t a[64];
} xtensa_gregset_t;
diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h
index 682b1de..81f31bc 100644
--- a/arch/xtensa/include/asm/ptrace.h
+++ b/arch/xtensa/include/asm/ptrace.h
@@ -38,6 +38,7 @@
unsigned long syscall; /* 56 */
unsigned long icountlevel; /* 60 */
unsigned long scompare1; /* 64 */
+ unsigned long threadptr; /* 68 */
/* Additional configurable registers that are used by the compiler. */
xtregs_opt_t xtregs_opt;
@@ -48,7 +49,7 @@
/* current register frame.
* Note: The ESF for kernel exceptions ends after 16 registers!
*/
- unsigned long areg[16]; /* 128 (64) */
+ unsigned long areg[16];
};
#include <variant/core.h>