)]}'
{
  "commit": "c8ebae37034c0ead62eb4df8ef88e999ddb8d5cf",
  "tree": "c9925f03a9c627d7408ef483d7920e25a927e633",
  "parents": [
    "51d4375dd72f352594f1a4f1d7598bf9a75b8dfe"
  ],
  "author": {
    "name": "Russell King",
    "email": "rmk+kernel@arm.linux.org.uk",
    "time": "Tue Jan 11 19:35:53 2011 +0000"
  },
  "committer": {
    "name": "Russell King",
    "email": "rmk+kernel@arm.linux.org.uk",
    "time": "Fri Feb 04 13:25:49 2011 +0000"
  },
  "message": "ARM: mmci: add dmaengine-based DMA support\n\nBased on a patch from Linus Walleij.\n\nAdd dmaengine based support for DMA to the MMCI driver, using the\nPrimecell DMA engine interface.  The changes over Linus\u0027 driver are:\n\n- rename txsize_threshold to dmasize_threshold, as this reflects the\n  purpose more.\n- use \u0027mmci_dma_\u0027 as the function prefix rather than \u0027dma_mmci_\u0027.\n- clean up requesting of dma channels.\n- don\u0027t release a single channel twice when it\u0027s shared between tx and rx.\n- get rid of \u0027dma_enable\u0027 bool - instead check whether the channel is NULL.\n- detect incomplete DMA at the end of a transfer.  Some DMA controllers\n  (eg, PL08x) are unable to be configured for scatter DMA and also listen\n  to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI.\n  They can do one or other but not both.  As MMCI uses LBREQ/LSREQ for the\n  final burst/words, PL08x does not transfer the last few words.\n- map and unmap DMA buffers using the DMA engine struct device, not the\n  MMCI struct device - the DMA engine is doing the DMA transfer, not us.\n- avoid double-unmapping of the DMA buffers on MMCI data errors.\n- don\u0027t check for negative values from the dmaengine tx submission\n  function - Dan says this must never fail.\n- use new dmaengine helper functions rather than using the ugly function\n  pointers directly.\n- allow DMA code to be fully optimized away using dma_inprogress() which\n  is defined to constant 0 if DMA engine support is disabled.\n- request maximum segment size from the DMA engine struct device and\n  set this appropriately.\n- removed checking of buffer alignment - the DMA engine should deal with\n  its own restrictions on buffer alignment, not the individual DMA engine\n  users.\n- removed setting DMAREQCTL - this confuses some DMA controllers as it\n  causes LBREQ to be asserted for the last seven transfers, rather than\n  six SREQ and one LSREQ.\n- removed burst setting - the DMA controller should not burst past the\n  transfer size required to complete the DMA operation.\n\nTested-by: Linus Walleij \u003clinus.walleij@linaro.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "db2a358143d63a8f16782cbef4c40505e474ab2d",
      "old_mode": 33188,
      "old_path": "drivers/mmc/host/mmci.c",
      "new_id": "8a29c9f4a812f754fdb03189eae2c27f346af61b",
      "new_mode": 33188,
      "new_path": "drivers/mmc/host/mmci.c"
    },
    {
      "type": "modify",
      "old_id": "164ce060fc1fc71f6a4ab89f0235830908510726",
      "old_mode": 33188,
      "old_path": "drivers/mmc/host/mmci.h",
      "new_id": "ec9a7bc6d0df2a6096a2a500643dc0e3535a4a70",
      "new_mode": 33188,
      "new_path": "drivers/mmc/host/mmci.h"
    },
    {
      "type": "modify",
      "old_id": "f4ee9acc97213b72f36f984ce31b57fd4ba1a784",
      "old_mode": 33188,
      "old_path": "include/linux/amba/mmci.h",
      "new_id": "f60227088b7b88f273a9f84a25c06e0e303a4a15",
      "new_mode": 33188,
      "new_path": "include/linux/amba/mmci.h"
    }
  ]
}