)]}'
{
  "commit": "caa20d974c86af496b419eef70010e63b7fab7ac",
  "tree": "a38165bd839a398528a4ef4c7fa8481fb0fefed3",
  "parents": [
    "c86e1401c9f2ba8d989fa1c4b33d0f0ec3ba8aaf"
  ],
  "author": {
    "name": "Dan Williams",
    "email": "dan.j.williams@intel.com",
    "time": "Mon May 17 16:24:16 2010 -0700"
  },
  "committer": {
    "name": "Dan Williams",
    "email": "dan.j.williams@intel.com",
    "time": "Mon May 17 16:24:16 2010 -0700"
  },
  "message": "async_tx: trim dma_async_tx_descriptor in \u0027no channel switch\u0027 case\n\nSaves 24 bytes per descriptor (64-bit) when the channel-switching\ncapabilities of async_tx are not required.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f9cdf04fe7c0a370908c8f6f5f3c04c9fb3d35f7",
      "old_mode": 33188,
      "old_path": "crypto/async_tx/async_tx.c",
      "new_id": "7f2c00a452053a2aeba0365b873f9ed27b3a5063",
      "new_mode": 33188,
      "new_path": "crypto/async_tx/async_tx.c"
    },
    {
      "type": "modify",
      "old_id": "d18b5d069d7eb768789a7f99b783b7c632bb2660",
      "old_mode": 33188,
      "old_path": "drivers/dma/dmaengine.c",
      "new_id": "fcfe1a62ffa543a2f225e40e923e005269eb0823",
      "new_mode": 33188,
      "new_path": "drivers/dma/dmaengine.c"
    },
    {
      "type": "modify",
      "old_id": "20ea12c86fd007ce9cd66d084399621b4b323f3a",
      "old_mode": 33188,
      "old_path": "include/linux/dmaengine.h",
      "new_id": "cb234979fc6bd4dc14a48398e7cc5d7f01311554",
      "new_mode": 33188,
      "new_path": "include/linux/dmaengine.h"
    }
  ]
}
