ASoC: Allow configuration of WM8904 GPIO pin functions
Provide platform data allowing the configuration of the GPIO pins
on the WM8904 to be selected, allowing alternate functions to be
enabled.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index 593e47d..ce3f004 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -2425,6 +2425,7 @@
static int wm8904_register(struct wm8904_priv *wm8904,
enum snd_soc_control_type control)
{
+ struct wm8904_pdata *pdata = wm8904->pdata;
int ret;
struct snd_soc_codec *codec = &wm8904->codec;
int i;
@@ -2530,6 +2531,17 @@
WM8904_LINEOUTRZC;
wm8904->reg_cache[WM8904_CLOCK_RATES_0] &= ~WM8904_SR_MODE;
+ /* Apply configuration from the platform data. */
+ if (wm8904->pdata) {
+ for (i = 0; i < WM8904_GPIO_REGS; i++) {
+ if (!pdata->gpio_cfg[i])
+ continue;
+
+ wm8904->reg_cache[WM8904_GPIO_CONTROL_1 + i]
+ = pdata->gpio_cfg[i] & 0xffff;
+ }
+ }
+
/* Set Class W by default - this will be managed by the Class
* G widget at runtime where bypass paths are available.
*/
diff --git a/sound/soc/codecs/wm8904.h b/sound/soc/codecs/wm8904.h
index b68886d..10603a7 100644
--- a/sound/soc/codecs/wm8904.h
+++ b/sound/soc/codecs/wm8904.h
@@ -1200,70 +1200,6 @@
#define WM8904_FLL_CLK_REF_SRC_WIDTH 2 /* FLL_CLK_REF_SRC - [1:0] */
/*
- * R121 (0x79) - GPIO Control 1
- */
-#define WM8904_GPIO1_PU 0x0020 /* GPIO1_PU */
-#define WM8904_GPIO1_PU_MASK 0x0020 /* GPIO1_PU */
-#define WM8904_GPIO1_PU_SHIFT 5 /* GPIO1_PU */
-#define WM8904_GPIO1_PU_WIDTH 1 /* GPIO1_PU */
-#define WM8904_GPIO1_PD 0x0010 /* GPIO1_PD */
-#define WM8904_GPIO1_PD_MASK 0x0010 /* GPIO1_PD */
-#define WM8904_GPIO1_PD_SHIFT 4 /* GPIO1_PD */
-#define WM8904_GPIO1_PD_WIDTH 1 /* GPIO1_PD */
-#define WM8904_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */
-#define WM8904_GPIO1_SEL_SHIFT 0 /* GPIO1_SEL - [3:0] */
-#define WM8904_GPIO1_SEL_WIDTH 4 /* GPIO1_SEL - [3:0] */
-
-/*
- * R122 (0x7A) - GPIO Control 2
- */
-#define WM8904_GPIO2_PU 0x0020 /* GPIO2_PU */
-#define WM8904_GPIO2_PU_MASK 0x0020 /* GPIO2_PU */
-#define WM8904_GPIO2_PU_SHIFT 5 /* GPIO2_PU */
-#define WM8904_GPIO2_PU_WIDTH 1 /* GPIO2_PU */
-#define WM8904_GPIO2_PD 0x0010 /* GPIO2_PD */
-#define WM8904_GPIO2_PD_MASK 0x0010 /* GPIO2_PD */
-#define WM8904_GPIO2_PD_SHIFT 4 /* GPIO2_PD */
-#define WM8904_GPIO2_PD_WIDTH 1 /* GPIO2_PD */
-#define WM8904_GPIO2_SEL_MASK 0x000F /* GPIO2_SEL - [3:0] */
-#define WM8904_GPIO2_SEL_SHIFT 0 /* GPIO2_SEL - [3:0] */
-#define WM8904_GPIO2_SEL_WIDTH 4 /* GPIO2_SEL - [3:0] */
-
-/*
- * R123 (0x7B) - GPIO Control 3
- */
-#define WM8904_GPIO3_PU 0x0020 /* GPIO3_PU */
-#define WM8904_GPIO3_PU_MASK 0x0020 /* GPIO3_PU */
-#define WM8904_GPIO3_PU_SHIFT 5 /* GPIO3_PU */
-#define WM8904_GPIO3_PU_WIDTH 1 /* GPIO3_PU */
-#define WM8904_GPIO3_PD 0x0010 /* GPIO3_PD */
-#define WM8904_GPIO3_PD_MASK 0x0010 /* GPIO3_PD */
-#define WM8904_GPIO3_PD_SHIFT 4 /* GPIO3_PD */
-#define WM8904_GPIO3_PD_WIDTH 1 /* GPIO3_PD */
-#define WM8904_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */
-#define WM8904_GPIO3_SEL_SHIFT 0 /* GPIO3_SEL - [3:0] */
-#define WM8904_GPIO3_SEL_WIDTH 4 /* GPIO3_SEL - [3:0] */
-
-/*
- * R124 (0x7C) - GPIO Control 4
- */
-#define WM8904_GPI7_ENA 0x0200 /* GPI7_ENA */
-#define WM8904_GPI7_ENA_MASK 0x0200 /* GPI7_ENA */
-#define WM8904_GPI7_ENA_SHIFT 9 /* GPI7_ENA */
-#define WM8904_GPI7_ENA_WIDTH 1 /* GPI7_ENA */
-#define WM8904_GPI8_ENA 0x0100 /* GPI8_ENA */
-#define WM8904_GPI8_ENA_MASK 0x0100 /* GPI8_ENA */
-#define WM8904_GPI8_ENA_SHIFT 8 /* GPI8_ENA */
-#define WM8904_GPI8_ENA_WIDTH 1 /* GPI8_ENA */
-#define WM8904_GPIO_BCLK_MODE_ENA 0x0080 /* GPIO_BCLK_MODE_ENA */
-#define WM8904_GPIO_BCLK_MODE_ENA_MASK 0x0080 /* GPIO_BCLK_MODE_ENA */
-#define WM8904_GPIO_BCLK_MODE_ENA_SHIFT 7 /* GPIO_BCLK_MODE_ENA */
-#define WM8904_GPIO_BCLK_MODE_ENA_WIDTH 1 /* GPIO_BCLK_MODE_ENA */
-#define WM8904_GPIO_BCLK_SEL_MASK 0x000F /* GPIO_BCLK_SEL - [3:0] */
-#define WM8904_GPIO_BCLK_SEL_SHIFT 0 /* GPIO_BCLK_SEL - [3:0] */
-#define WM8904_GPIO_BCLK_SEL_WIDTH 4 /* GPIO_BCLK_SEL - [3:0] */
-
-/*
* R126 (0x7E) - Digital Pulls
*/
#define WM8904_MCLK_PU 0x0080 /* MCLK_PU */