ACPICA: Resource manager: Add support for ACPI 5 wake bit in IRQ descriptor.
Add support to both get and set the extended share flags for the
IRQ() resource descriptor. Reported by Aaron Lu.
Signed-off-by: Aaron Lu <aaron.lu@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
diff --git a/drivers/acpi/acpica/rsirq.c b/drivers/acpi/acpica/rsirq.c
index a718eca..14cb76e 100644
--- a/drivers/acpi/acpica/rsirq.c
+++ b/drivers/acpi/acpica/rsirq.c
@@ -80,7 +80,7 @@
{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3},
- /* Get flags: Triggering[0], Polarity[3], Sharing[4] */
+ /* Get flags: Triggering[0], Polarity[3], sharing_and_wake[4:5] */
{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
AML_OFFSET(irq.flags),
@@ -90,7 +90,7 @@
AML_OFFSET(irq.flags),
3},
- {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
+ {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
AML_OFFSET(irq.flags),
4}
};
@@ -114,7 +114,7 @@
AML_OFFSET(irq.irq_mask),
ACPI_RS_OFFSET(data.irq.interrupt_count)},
- /* Set the flags byte */
+ /* Set flags: Triggering[0], Polarity[3], sharing_and_wake[4:5] */
{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
AML_OFFSET(irq.flags),
@@ -124,7 +124,7 @@
AML_OFFSET(irq.flags),
3},
- {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
+ {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
AML_OFFSET(irq.flags),
4},