x86: x2apic, IR: Clean up X86_X2APIC and INTR_REMAP config checks
Add x2apic_supported() to clean up CONFIG_X86_X2APIC checks.
Fix CONFIG_INTR_REMAP checks.
[ Impact: cleanup ]
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: dwmw2@infradead.org
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Weidong Han <weidong.han@intel.com>
LKML-Reference: <20090420200450.128993000@linux-os.sc.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 7b41a32..2b30e52 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -134,8 +134,8 @@
__setup("apicpmtimer", setup_apicpmtimer);
#endif
+int x2apic_mode;
#ifdef CONFIG_X86_X2APIC
-int x2apic;
/* x2apic enabled before OS handover */
static int x2apic_preenabled;
static int disable_x2apic;
@@ -858,7 +858,7 @@
u32 v;
/* APIC hasn't been mapped yet */
- if (!x2apic && !apic_phys)
+ if (!x2apic_mode && !apic_phys)
return;
maxlvt = lapic_get_maxlvt();
@@ -1330,7 +1330,7 @@
{
if (x2apic_enabled()) {
pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
- x2apic_preenabled = x2apic = 1;
+ x2apic_preenabled = x2apic_mode = 1;
}
}
@@ -1338,7 +1338,7 @@
{
int msr, msr2;
- if (!x2apic)
+ if (!x2apic_mode)
return;
rdmsr(MSR_IA32_APICBASE, msr, msr2);
@@ -1390,25 +1390,17 @@
mask_IO_APIC_setup(ioapic_entries);
mask_8259A();
-#ifdef CONFIG_X86_X2APIC
- if (cpu_has_x2apic)
- ret = enable_intr_remapping(EIM_32BIT_APIC_ID);
- else
-#endif
- ret = enable_intr_remapping(EIM_8BIT_APIC_ID);
-
+ ret = enable_intr_remapping(x2apic_supported());
if (ret)
goto end_restore;
pr_info("Enabled Interrupt-remapping\n");
-#ifdef CONFIG_X86_X2APIC
- if (cpu_has_x2apic && !x2apic) {
- x2apic = 1;
+ if (x2apic_supported() && !x2apic_mode) {
+ x2apic_mode = 1;
enable_x2apic();
pr_info("Enabled x2apic\n");
}
-#endif
end_restore:
if (ret)
@@ -1576,7 +1568,7 @@
*/
void __init init_apic_mappings(void)
{
- if (x2apic) {
+ if (x2apic_mode) {
boot_cpu_physical_apicid = read_apic_id();
return;
}
@@ -2010,10 +2002,10 @@
local_irq_save(flags);
disable_local_APIC();
-#ifdef CONFIG_INTR_REMAP
+
if (intr_remapping_enabled)
disable_intr_remapping();
-#endif
+
local_irq_restore(flags);
return 0;
}
@@ -2023,8 +2015,6 @@
unsigned int l, h;
unsigned long flags;
int maxlvt;
-
-#ifdef CONFIG_INTR_REMAP
int ret;
struct IO_APIC_route_entry **ioapic_entries = NULL;
@@ -2050,17 +2040,8 @@
mask_8259A();
}
- if (x2apic)
+ if (x2apic_mode)
enable_x2apic();
-#else
- if (!apic_pm_state.active)
- return 0;
-
- local_irq_save(flags);
- if (x2apic)
- enable_x2apic();
-#endif
-
else {
/*
* Make sure the APICBASE points to the right address
@@ -2098,18 +2079,12 @@
apic_write(APIC_ESR, 0);
apic_read(APIC_ESR);
-#ifdef CONFIG_INTR_REMAP
if (intr_remapping_enabled) {
- if (x2apic)
- reenable_intr_remapping(EIM_32BIT_APIC_ID);
- else
- reenable_intr_remapping(EIM_8BIT_APIC_ID);
-
+ reenable_intr_remapping(x2apic_mode);
unmask_8259A();
restore_IO_APIC_setup(ioapic_entries);
free_ioapic_entries(ioapic_entries);
}
-#endif
local_irq_restore(flags);