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review.evervolv.com / android_kernel_oneplus_msm8996 / 0013a85454c281faaf064ccb576e373a2881aac8 / . / arch / s390 / kernel / head.S
blob: 55654b6e16dce24c38e6642b6ddd48724124f5b0 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * arch/s390/kernel/head.S
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Rob van der Heij (rvdhei@iae.nl)
9 *
10 * There are 5 different IPL methods
11 * 1) load the image directly into ram at address 0 and do an PSW restart
12 * 2) linload will load the image from address 0x10000 to memory 0x10000
13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
14 * 3) generate the tape ipl header, store the generated image on a tape
15 * and ipl from it
16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc
17 * 4) generate the vm reader ipl header, move the generated image to the
18 * VM reader (use option NOH!) and do a ipl from reader (VM only)
19 * 5) direct call of start by the SALIPL loader
20 * We use the cpuid to distinguish between VM and native ipl
21 * params for kernel are pushed to 0x10400 (see setup.h)
22
23 Changes:
24 Okt 25 2000 <rvdheij@iae.nl>
25 added code to skip HDR and EOF to allow SL tape IPL (5 retries)
26 changed first CCW from rewind to backspace block
27
28 */
29
30#include <linux/config.h>
31#include <asm/setup.h>
32#include <asm/lowcore.h>
Sam Ravnborg0013a852005-09-09 20:57:26 +0200[diff] [blame^]33#include <asm/asm-offsets.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]34#include <asm/thread_info.h>
35#include <asm/page.h>
36
37#ifndef CONFIG_IPL
38 .org 0
39 .long 0x00080000,0x80000000+startup # Just a restart PSW
40#else
41#ifdef CONFIG_IPL_TAPE
42#define IPL_BS 1024
43 .org 0
44 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
45 .long 0x27000000,0x60000001 # by ipl to addresses 0-23.
46 .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
47 .long 0x00000000,0x00000000 # external old psw
48 .long 0x00000000,0x00000000 # svc old psw
49 .long 0x00000000,0x00000000 # program check old psw
50 .long 0x00000000,0x00000000 # machine check old psw
51 .long 0x00000000,0x00000000 # io old psw
52 .long 0x00000000,0x00000000
53 .long 0x00000000,0x00000000
54 .long 0x00000000,0x00000000
55 .long 0x000a0000,0x00000058 # external new psw
56 .long 0x000a0000,0x00000060 # svc new psw
57 .long 0x000a0000,0x00000068 # program check new psw
58 .long 0x000a0000,0x00000070 # machine check new psw
59 .long 0x00080000,0x80000000+.Lioint # io new psw
60
61 .org 0x100
62#
63# subroutine for loading from tape
64# Paramters:
65# R1 = device number
66# R2 = load address
67.Lloader:
68 st %r14,.Lldret
69 la %r3,.Lorbread # r3 = address of orb
70 la %r5,.Lirb # r5 = address of irb
71 st %r2,.Lccwread+4 # initialize CCW data addresses
72 lctl %c6,%c6,.Lcr6
73 slr %r2,%r2
74.Lldlp:
75 la %r6,3 # 3 retries
76.Lssch:
77 ssch 0(%r3) # load chunk of IPL_BS bytes
78 bnz .Llderr
79.Lw4end:
80 bas %r14,.Lwait4io
81 tm 8(%r5),0x82 # do we have a problem ?
82 bnz .Lrecov
83 slr %r7,%r7
84 icm %r7,3,10(%r5) # get residual count
85 lcr %r7,%r7
86 la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read
87 ar %r2,%r7 # add to total size
88 tm 8(%r5),0x01 # found a tape mark ?
89 bnz .Ldone
90 l %r0,.Lccwread+4 # update CCW data addresses
91 ar %r0,%r7
92 st %r0,.Lccwread+4
93 b .Lldlp
94.Ldone:
95 l %r14,.Lldret
96 br %r14 # r2 contains the total size
97.Lrecov:
98 bas %r14,.Lsense # do the sensing
99 bct %r6,.Lssch # dec. retry count & branch
100 b .Llderr
101#
102# Sense subroutine
103#
104.Lsense:
105 st %r14,.Lsnsret
106 la %r7,.Lorbsense
107 ssch 0(%r7) # start sense command
108 bnz .Llderr
109 bas %r14,.Lwait4io
110 l %r14,.Lsnsret
111 tm 8(%r5),0x82 # do we have a problem ?
112 bnz .Llderr
113 br %r14
114#
115# Wait for interrupt subroutine
116#
117.Lwait4io:
118 lpsw .Lwaitpsw
119.Lioint:
120 c %r1,0xb8 # compare subchannel number
121 bne .Lwait4io
122 tsch 0(%r5)
123 slr %r0,%r0
124 tm 8(%r5),0x82 # do we have a problem ?
125 bnz .Lwtexit
126 tm 8(%r5),0x04 # got device end ?
127 bz .Lwait4io
128.Lwtexit:
129 br %r14
130.Llderr:
131 lpsw .Lcrash
132
133 .align 8
134.Lorbread:
135 .long 0x00000000,0x0080ff00,.Lccwread
136 .align 8
137.Lorbsense:
138 .long 0x00000000,0x0080ff00,.Lccwsense
139 .align 8
140.Lccwread:
141 .long 0x02200000+IPL_BS,0x00000000
142.Lccwsense:
143 .long 0x04200001,0x00000000
144.Lwaitpsw:
145 .long 0x020a0000,0x80000000+.Lioint
146
147.Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
148.Lcr6: .long 0xff000000
149 .align 8
150.Lcrash:.long 0x000a0000,0x00000000
151.Lldret:.long 0
152.Lsnsret: .long 0
153#endif /* CONFIG_IPL_TAPE */
154
155#ifdef CONFIG_IPL_VM
156#define IPL_BS 0x730
157 .org 0
158 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
159 .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
160 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
161 .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
162 .long 0x020000f0,0x60000050 # The next 160 byte are loaded
163 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
164 .long 0x02000190,0x60000050 # They form the continuation
165 .long 0x020001e0,0x60000050 # of the CCW program started
166 .long 0x02000230,0x60000050 # by ipl and load the range
167 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
168 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
169 .long 0x02000320,0x60000050 # in memory. At the end of
170 .long 0x02000370,0x60000050 # the channel program the PSW
171 .long 0x020003c0,0x60000050 # at location 0 is loaded.
172 .long 0x02000410,0x60000050 # Initial processing starts
173 .long 0x02000460,0x60000050 # at 0xf0 = iplstart.
174 .long 0x020004b0,0x60000050
175 .long 0x02000500,0x60000050
176 .long 0x02000550,0x60000050
177 .long 0x020005a0,0x60000050
178 .long 0x020005f0,0x60000050
179 .long 0x02000640,0x60000050
180 .long 0x02000690,0x60000050
181 .long 0x020006e0,0x20000050
182
183 .org 0xf0
184#
185# subroutine for loading cards from the reader
186#
187.Lloader:
188 la %r3,.Lorb # r2 = address of orb into r2
189 la %r5,.Lirb # r4 = address of irb
190 la %r6,.Lccws
191 la %r7,20
192.Linit:
193 st %r2,4(%r6) # initialize CCW data addresses
194 la %r2,0x50(%r2)
195 la %r6,8(%r6)
196 bct 7,.Linit
197
198 lctl %c6,%c6,.Lcr6 # set IO subclass mask
199 slr %r2,%r2
200.Lldlp:
201 ssch 0(%r3) # load chunk of 1600 bytes
202 bnz .Llderr
203.Lwait4irq:
204 mvc __LC_IO_NEW_PSW(8),.Lnewpsw # set up IO interrupt psw
205 lpsw .Lwaitpsw
206.Lioint:
207 c %r1,0xb8 # compare subchannel number
208 bne .Lwait4irq
209 tsch 0(%r5)
210
211 slr %r0,%r0
212 ic %r0,8(%r5) # get device status
213 chi %r0,8 # channel end ?
214 be .Lcont
215 chi %r0,12 # channel end + device end ?
216 be .Lcont
217
218 l %r0,4(%r5)
219 s %r0,8(%r3) # r0/8 = number of ccws executed
220 mhi %r0,10 # *10 = number of bytes in ccws
221 lh %r3,10(%r5) # get residual count
222 sr %r0,%r3 # #ccws*80-residual=#bytes read
223 ar %r2,%r0
224
225 br %r14 # r2 contains the total size
226
227.Lcont:
228 ahi %r2,0x640 # add 0x640 to total size
229 la %r6,.Lccws
230 la %r7,20
231.Lincr:
232 l %r0,4(%r6) # update CCW data addresses
233 ahi %r0,0x640
234 st %r0,4(%r6)
235 ahi %r6,8
236 bct 7,.Lincr
237
238 b .Lldlp
239.Llderr:
240 lpsw .Lcrash
241
242 .align 8
243.Lorb: .long 0x00000000,0x0080ff00,.Lccws
244.Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
245.Lcr6: .long 0xff000000
246.Lloadp:.long 0,0
247 .align 8
248.Lcrash:.long 0x000a0000,0x00000000
249.Lnewpsw:
250 .long 0x00080000,0x80000000+.Lioint
251.Lwaitpsw:
252 .long 0x020a0000,0x80000000+.Lioint
253
254 .align 8
255.Lccws: .rept 19
256 .long 0x02600050,0x00000000
257 .endr
258 .long 0x02200050,0x00000000
259#endif /* CONFIG_IPL_VM */
260
261iplstart:
262 lh %r1,0xb8 # test if subchannel number
263 bct %r1,.Lnoload # is valid
264 l %r1,0xb8 # load ipl subchannel number
265 la %r2,IPL_BS # load start address
266 bas %r14,.Lloader # load rest of ipl image
267 l %r12,.Lparm # pointer to parameter area
268 st %r1,IPL_DEVICE-PARMAREA(%r12) # store ipl device number
269
270#
271# load parameter file from ipl device
272#
273.Lagain1:
274 l %r2,INITRD_START-PARMAREA(%r12) # use ramdisk location as temp
275 bas %r14,.Lloader # load parameter file
276 ltr %r2,%r2 # got anything ?
277 bz .Lnopf
278 chi %r2,895
279 bnh .Lnotrunc
280 la %r2,895
281.Lnotrunc:
282 l %r4,INITRD_START-PARMAREA(%r12)
283 clc 0(3,%r4),.L_hdr # if it is HDRx
284 bz .Lagain1 # skip dataset header
285 clc 0(3,%r4),.L_eof # if it is EOFx
286 bz .Lagain1 # skip dateset trailer
287 la %r5,0(%r4,%r2)
288 lr %r3,%r2
289.Lidebc:
290 tm 0(%r5),0x80 # high order bit set ?
291 bo .Ldocv # yes -> convert from EBCDIC
292 ahi %r5,-1
293 bct %r3,.Lidebc
294 b .Lnocv
295.Ldocv:
296 l %r3,.Lcvtab
297 tr 0(256,%r4),0(%r3) # convert parameters to ascii
298 tr 256(256,%r4),0(%r3)
299 tr 512(256,%r4),0(%r3)
300 tr 768(122,%r4),0(%r3)
301.Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
302 mvc 0(256,%r3),0(%r4)
303 mvc 256(256,%r3),256(%r4)
304 mvc 512(256,%r3),512(%r4)
305 mvc 768(122,%r3),768(%r4)
306 slr %r0,%r0
307 b .Lcntlp
308.Ldelspc:
309 ic %r0,0(%r2,%r3)
310 chi %r0,0x20 # is it a space ?
311 be .Lcntlp
312 ahi %r2,1
313 b .Leolp
314.Lcntlp:
315 brct %r2,.Ldelspc
316.Leolp:
317 slr %r0,%r0
318 stc %r0,0(%r2,%r3) # terminate buffer
319.Lnopf:
320
321#
322# load ramdisk from ipl device
323#
324.Lagain2:
325 l %r2,INITRD_START-PARMAREA(%r12) # load adr. of ramdisk
326 bas %r14,.Lloader # load ramdisk
327 st %r2,INITRD_SIZE-PARMAREA(%r12) # store size of ramdisk
328 ltr %r2,%r2
329 bnz .Lrdcont
330 st %r2,INITRD_START-PARMAREA(%r12) # no ramdisk found, null it
331.Lrdcont:
332 l %r2,INITRD_START-PARMAREA(%r12)
333
334 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
335 bz .Lagain2
336 clc 0(3,%r2),.L_eof
337 bz .Lagain2
338
339#ifdef CONFIG_IPL_VM
340#
341# reset files in VM reader
342#
343 stidp __LC_CPUID # store cpuid
344 tm __LC_CPUID,0xff # running VM ?
345 bno .Lnoreset
346 la %r2,.Lreset
347 lhi %r3,26
Heiko Carstens2b071882005-06-21 17:16:31 -0700[diff] [blame]348 diag %r2,%r3,8
Heiko Carstens350e3ad2005-07-29 14:03:36 -0700[diff] [blame]349 la %r5,.Lirb
350 stsch 0(%r5) # check if irq is pending
351 tm 30(%r5),0x0f # by verifying if any of the
352 bnz .Lwaitforirq # activity or status control
353 tm 31(%r5),0xff # bits is set in the schib
354 bz .Lnoreset
355.Lwaitforirq:
Heiko Carstens2b071882005-06-21 17:16:31 -0700[diff] [blame]356 mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw
357.Lwaitrdrirq:
358 lpsw .Lrdrwaitpsw
359.Lrdrint:
360 c %r1,0xb8 # compare subchannel number
361 bne .Lwaitrdrirq
362 la %r5,.Lirb
363 tsch 0(%r5)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]364.Lnoreset:
Heiko Carstens2b071882005-06-21 17:16:31 -0700[diff] [blame]365 b .Lnoload
366
367 .align 8
368.Lrdrnewpsw:
369 .long 0x00080000,0x80000000+.Lrdrint
370.Lrdrwaitpsw:
371 .long 0x020a0000,0x80000000+.Lrdrint
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]372#endif
Heiko Carstens2b071882005-06-21 17:16:31 -0700[diff] [blame]373
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]374#
375# everything loaded, go for it
376#
377.Lnoload:
378 l %r1,.Lstartup
379 br %r1
380
381.Lparm: .long PARMAREA
382.Lstartup: .long startup
383.Lcvtab:.long _ebcasc # ebcdic to ascii table
384.Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
385 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
386 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
387.L_eof: .long 0xc5d6c600 /* C'EOF' */
388.L_hdr: .long 0xc8c4d900 /* C'HDR' */
389
390#endif /* CONFIG_IPL */
391
392#
393# SALIPL loader support. Based on a patch by Rob van der Heij.
394# This entry point is called directly from the SALIPL loader and
395# doesn't need a builtin ipl record.
396#
397 .org 0x800
398 .globl start
399start:
400 stm %r0,%r15,0x07b0 # store registers
401 basr %r12,%r0
402.base:
403 l %r11,.parm
404 l %r8,.cmd # pointer to command buffer
405
406 ltr %r9,%r9 # do we have SALIPL parameters?
407 bp .sk8x8
408
409 mvc 0(64,%r8),0x00b0 # copy saved registers
410 xc 64(240-64,%r8),0(%r8) # remainder of buffer
411 tr 0(64,%r8),.lowcase
412 b .gotr
413.sk8x8:
414 mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
415.gotr:
416 l %r10,.tbl # EBCDIC to ASCII table
417 tr 0(240,%r8),0(%r10)
418 stidp __LC_CPUID # Are we running on VM maybe
419 cli __LC_CPUID,0xff
420 bnz .test
421 .long 0x83300060 # diag 3,0,x'0060' - storage size
422 b .done
423.test:
424 mvc 0x68(8),.pgmnw # set up pgm check handler
425 l %r2,.fourmeg
426 lr %r3,%r2
427 bctr %r3,%r0 # 4M-1
428.loop: iske %r0,%r3
429 ar %r3,%r2
430.pgmx:
431 sr %r3,%r2
432 la %r3,1(%r3)
433.done:
434 l %r1,.memsize
435 st %r3,0(%r1)
436 slr %r0,%r0
437 st %r0,INITRD_SIZE-PARMAREA(%r11)
438 st %r0,INITRD_START-PARMAREA(%r11)
439 j startup # continue with startup
440.tbl: .long _ebcasc # translate table
441.cmd: .long COMMAND_LINE # address of command line buffer
442.parm: .long PARMAREA
443.memsize: .long memory_size
444.fourmeg: .long 0x00400000 # 4M
445.pgmnw: .long 0x00080000,.pgmx
446.lowcase:
447 .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
448 .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
449 .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
450 .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
451 .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
452 .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
453 .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
454 .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
455 .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
456 .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
457 .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
458 .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
459 .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
460 .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
461 .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
462 .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
463
464 .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
465 .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
466 .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
467 .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
468 .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
469 .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
470 .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
471 .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
472 .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
473 .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
474 .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
475 .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
476 .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
477 .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
478 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
479 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
480
481#
482# startup-code at 0x10000, running in real mode
483# this is called either by the ipl loader or directly by PSW restart
484# or linload or SALIPL
485#
486 .org 0x10000
487startup:basr %r13,0 # get base
488.LPG1: lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
489 la %r12,_pstart-.LPG1(%r13) # pointer to parameter area
490 # move IPL device to lowcore
491 mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
492
493#
494# clear bss memory
495#
496 l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
497 l %r3,.Lbss_end-.LPG1(%r13) # end of bss
498 sr %r3,%r2 # length of bss
499 sr %r4,%r4 #
500 sr %r5,%r5 # set src,length and pad to zero
501 sr %r0,%r0 #
502 mvcle %r2,%r4,0 # clear mem
503 jo .-4 # branch back, if not finish
504
505 l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
506.Lservicecall:
507 stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
508
509 stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
510 la %r1,0x200 # set bit 22
511 o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
512 st %r1,.Lcr-.LPG1(%r13)
513 lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
514
515 mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
516 la %r1, .Lsclph-.LPG1(%r13)
517 a %r1,__LC_EXT_NEW_PSW+4 # set handler
518 st %r1,__LC_EXT_NEW_PSW+4
519
520 la %r4,_pstart-.LPG1(%r13) # %r4 is our index for sccb stuff
521 la %r1, .Lsccb-PARMAREA(%r4) # our sccb
522 .insn rre,0xb2200000,%r2,%r1 # service call
523 ipm %r1
524 srl %r1,28 # get cc code
525 xr %r3, %r3
526 chi %r1,3
527 be .Lfchunk-.LPG1(%r13) # leave
528 chi %r1,2
529 be .Lservicecall-.LPG1(%r13)
530 lpsw .Lwaitsclp-.LPG1(%r13)
531.Lsclph:
532 lh %r1,.Lsccbr-PARMAREA(%r4)
533 chi %r1,0x10 # 0x0010 is the sucess code
534 je .Lprocsccb # let's process the sccb
535 chi %r1,0x1f0
536 bne .Lfchunk-.LPG1(%r13) # unhandled error code
537 c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
538 bne .Lfchunk-.LPG1(%r13) # if no, give up
539 l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
540 b .Lservicecall-.LPG1(%r13)
541.Lprocsccb:
Heiko Carstense9b9a042005-06-21 17:16:30 -0700[diff] [blame]542 lhi %r1,0
543 icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
544 jnz .Lscnd
Heiko Carstensf878e432005-07-27 11:45:05 -0700[diff] [blame]545 lhi %r1,0x800 # otherwise report 2GB
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]546.Lscnd:
Heiko Carstensf878e432005-07-27 11:45:05 -0700[diff] [blame]547 lhi %r3,0x800 # limit reported memory size to 2GB
548 cr %r1,%r3
549 jl .Lno2gb
550 lr %r1,%r3
551.Lno2gb:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]552 xr %r3,%r3 # same logic
553 ic %r3,.Lscpa1-PARMAREA(%r4)
554 chi %r3,0x00
555 jne .Lcompmem
556 l %r3,.Lscpa2-PARMAREA(%r13)
557.Lcompmem:
558 mr %r2,%r1 # mem in MB on 128-bit
559 l %r1,.Lonemb-.LPG1(%r13)
560 mr %r2,%r1 # mem size in bytes in %r3
561 b .Lfchunk-.LPG1(%r13)
562
563.Lpmask:
564 .byte 0
565.align 8
566.Lpcext:.long 0x00080000,0x80000000
567.Lcr:
568 .long 0x00 # place holder for cr0
569.Lwaitsclp:
570 .long 0x020A0000
571 .long .Lsclph
572.Lrcp:
573 .int 0x00120001 # Read SCP forced code
574.Lrcp2:
575 .int 0x00020001 # Read SCP code
576.Lonemb:
577 .int 0x100000
578.Lfchunk:
579
580#
581# find memory chunks.
582#
583 lr %r9,%r3 # end of mem
584 mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
585 la %r1,1 # test in increments of 128KB
586 sll %r1,17
587 l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
588 slr %r4,%r4 # set start of chunk to zero
589 slr %r5,%r5 # set end of chunk to zero
590 slr %r6,%r6 # set access code to zero
591 la %r10, MEMORY_CHUNKS # number of chunks
592.Lloop:
593 tprot 0(%r5),0 # test protection of first byte
594 ipm %r7
595 srl %r7,28
596 clr %r6,%r7 # compare cc with last access code
597 be .Lsame-.LPG1(%r13)
598 b .Lchkmem-.LPG1(%r13)
599.Lsame:
600 ar %r5,%r1 # add 128KB to end of chunk
601 bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
602.Lchkmem: # > 2GB or tprot got a program check
603 clr %r4,%r5 # chunk size > 0?
604 be .Lchkloop-.LPG1(%r13)
605 st %r4,0(%r3) # store start address of chunk
606 lr %r0,%r5
607 slr %r0,%r4
608 st %r0,4(%r3) # store size of chunk
609 st %r6,8(%r3) # store type of chunk
610 la %r3,12(%r3)
611 l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
612 st %r5,0(%r4) # store last end to memory size
613 ahi %r10,-1 # update chunk number
614.Lchkloop:
615 lr %r6,%r7 # set access code to last cc
616 # we got an exception or we're starting a new
617 # chunk , we must check if we should
618 # still try to find valid memory (if we detected
619 # the amount of available storage), and if we
620 # have chunks left
621 xr %r0,%r0
622 clr %r0,%r9 # did we detect memory?
623 je .Ldonemem # if not, leave
624 chi %r10,0 # do we have chunks left?
625 je .Ldonemem
626 alr %r5,%r1 # add 128KB to end of chunk
627 lr %r4,%r5 # potential new chunk
628 clr %r5,%r9 # should we go on?
629 jl .Lloop
630.Ldonemem:
631 l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
632#
633# find out if we are running under VM
634#
635 stidp __LC_CPUID # store cpuid
636 tm __LC_CPUID,0xff # running under VM ?
637 bno .Lnovm-.LPG1(%r13)
638 oi 3(%r12),1 # set VM flag
639.Lnovm:
640 lh %r0,__LC_CPUID+4 # get cpu version
641 chi %r0,0x7490 # running on a P/390 ?
642 bne .Lnop390-.LPG1(%r13)
643 oi 3(%r12),4 # set P/390 flag
644.Lnop390:
645
646#
647# find out if we have an IEEE fpu
648#
649 mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
650 efpc %r0,0 # test IEEE extract fpc instruction
651 oi 3(%r12),2 # set IEEE fpu flag
652.Lchkfpu:
653
654#
655# find out if we have the CSP instruction
656#
657 mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
658 la %r0,0
659 lr %r1,%r0
660 la %r2,4
661 csp %r0,%r2 # Test CSP instruction
662 oi 3(%r12),8 # set CSP flag
663.Lchkcsp:
664
665#
666# find out if we have the MVPG instruction
667#
668 mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
669 sr %r0,%r0
670 la %r1,0
671 la %r2,0
672 mvpg %r1,%r2 # Test CSP instruction
673 oi 3(%r12),16 # set MVPG flag
674.Lchkmvpg:
675
676#
677# find out if we have the IDTE instruction
678#
679 mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
680 .long 0xb2b10000 # store facility list
681 tm 0xc8,0x08 # check bit for clearing-by-ASCE
682 bno .Lchkidte-.LPG1(%r13)
683 lhi %r1,2094
684 lhi %r2,0
685 .long 0xb98e2001
686 oi 3(%r12),0x80 # set IDTE flag
687.Lchkidte:
688
689 lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
690 # virtual and never return ...
691 .align 8
692.Lentry:.long 0x00080000,0x80000000 + _stext
693.Lctl: .long 0x04b50002 # cr0: various things
694 .long 0 # cr1: primary space segment table
695 .long .Lduct # cr2: dispatchable unit control table
696 .long 0 # cr3: instruction authorization
697 .long 0 # cr4: instruction authorization
698 .long 0xffffffff # cr5: primary-aste origin
699 .long 0 # cr6: I/O interrupts
700 .long 0 # cr7: secondary space segment table
701 .long 0 # cr8: access registers translation
702 .long 0 # cr9: tracing off
703 .long 0 # cr10: tracing off
704 .long 0 # cr11: tracing off
705 .long 0 # cr12: tracing off
706 .long 0 # cr13: home space segment table
707 .long 0xc0000000 # cr14: machine check handling off
708 .long 0 # cr15: linkage stack operations
709.Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
710.Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
711.Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
712.Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
713.Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
714.Lmemsize:.long memory_size
715.Lmchunk:.long memory_chunk
716.Lmflags:.long machine_flags
717.Lbss_bgn: .long __bss_start
718.Lbss_end: .long _end
719
720 .org PARMAREA-64
721.Lduct: .long 0,0,0,0,0,0,0,0
722 .long 0,0,0,0,0,0,0,0
723
724#
725# params at 10400 (setup.h)
726#
727 .org PARMAREA
728 .global _pstart
729_pstart:
730 .long 0,0 # IPL_DEVICE
731 .long 0,RAMDISK_ORIGIN # INITRD_START
732 .long 0,RAMDISK_SIZE # INITRD_SIZE
733
734 .org COMMAND_LINE
735 .byte "root=/dev/ram0 ro"
736 .byte 0
737 .org 0x11000
738.Lsccb:
739 .hword 0x1000 # length, one page
740 .byte 0x00,0x00,0x00
741 .byte 0x80 # variable response bit set
742.Lsccbr:
743 .hword 0x00 # response code
744.Lscpincr1:
745 .hword 0x00
746.Lscpa1:
747 .byte 0x00
748 .fill 89,1,0
749.Lscpa2:
750 .int 0x00
751.Lscpincr2:
752 .quad 0x00
753 .fill 3984,1,0
754 .org 0x12000
755 .global _pend
756_pend:
757
758#ifdef CONFIG_SHARED_KERNEL
759 .org 0x100000
760#endif
761
762#
763# startup-code, running in virtual mode
764#
765 .globl _stext
766_stext: basr %r13,0 # get base
767.LPG2:
768#
769# Setup stack
770#
771 l %r15,.Linittu-.LPG2(%r13)
772 mvc __LC_CURRENT(4),__TI_task(%r15)
773 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
774 st %r15,__LC_KERNEL_STACK # set end of kernel stack
775 ahi %r15,-96
776 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
777
778# check control registers
779 stctl %c0,%c15,0(%r15)
Heiko Carstens99b2d8d2005-07-27 11:45:00 -0700[diff] [blame]780 oi 2(%r15),0x40 # enable sigp emergency signal
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]781 oi 0(%r15),0x10 # switch on low address protection
782 lctl %c0,%c15,0(%r15)
783
784#
785 lam 0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
786 l %r14,.Lstart-.LPG2(%r13)
787 basr %r14,%r14 # call start_kernel
788#
789# We returned from start_kernel ?!? PANIK
790#
791 basr %r13,0
792 lpsw .Ldw-.(%r13) # load disabled wait psw
793#
794 .align 8
795.Ldw: .long 0x000a0000,0x00000000
796.Linittu: .long init_thread_union
797.Lstart: .long start_kernel
798.Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
799