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Sean MacLennan99192af2008-01-13 07:32:38 +11001/*
2 * Device Tree Source for PIKA Warp
3 *
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
David Gibson71f34972008-05-15 16:46:39 +100012/dts-v1/;
13
Sean MacLennan99192af2008-01-13 07:32:38 +110014/ {
15 #address-cells = <2>;
16 #size-cells = <1>;
17 model = "pika,warp";
18 compatible = "pika,warp";
David Gibson71f34972008-05-15 16:46:39 +100019 dcr-parent = <&{/cpus/cpu@0}>;
Sean MacLennan99192af2008-01-13 07:32:38 +110020
21 aliases {
22 ethernet0 = &EMAC0;
23 serial0 = &UART0;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 cpu@0 {
31 device_type = "cpu";
32 model = "PowerPC,440EP";
David Gibson71f34972008-05-15 16:46:39 +100033 reg = <0x00000000>;
Sean MacLennan99192af2008-01-13 07:32:38 +110034 clock-frequency = <0>; /* Filled in by zImage */
35 timebase-frequency = <0>; /* Filled in by zImage */
David Gibson71f34972008-05-15 16:46:39 +100036 i-cache-line-size = <32>;
37 d-cache-line-size = <32>;
38 i-cache-size = <32768>;
39 d-cache-size = <32768>;
Sean MacLennan99192af2008-01-13 07:32:38 +110040 dcr-controller;
41 dcr-access-method = "native";
42 };
43 };
44
45 memory {
46 device_type = "memory";
David Gibson71f34972008-05-15 16:46:39 +100047 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
Sean MacLennan99192af2008-01-13 07:32:38 +110048 };
49
50 UIC0: interrupt-controller0 {
51 compatible = "ibm,uic-440ep","ibm,uic";
52 interrupt-controller;
53 cell-index = <0>;
David Gibson71f34972008-05-15 16:46:39 +100054 dcr-reg = <0x0c0 0x009>;
Sean MacLennan99192af2008-01-13 07:32:38 +110055 #address-cells = <0>;
56 #size-cells = <0>;
57 #interrupt-cells = <2>;
58 };
59
60 UIC1: interrupt-controller1 {
61 compatible = "ibm,uic-440ep","ibm,uic";
62 interrupt-controller;
63 cell-index = <1>;
David Gibson71f34972008-05-15 16:46:39 +100064 dcr-reg = <0x0d0 0x009>;
Sean MacLennan99192af2008-01-13 07:32:38 +110065 #address-cells = <0>;
66 #size-cells = <0>;
67 #interrupt-cells = <2>;
David Gibson71f34972008-05-15 16:46:39 +100068 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
Sean MacLennan99192af2008-01-13 07:32:38 +110069 interrupt-parent = <&UIC0>;
70 };
71
72 SDR0: sdr {
73 compatible = "ibm,sdr-440ep";
David Gibson71f34972008-05-15 16:46:39 +100074 dcr-reg = <0x00e 0x002>;
Sean MacLennan99192af2008-01-13 07:32:38 +110075 };
76
77 CPR0: cpr {
78 compatible = "ibm,cpr-440ep";
David Gibson71f34972008-05-15 16:46:39 +100079 dcr-reg = <0x00c 0x002>;
Sean MacLennan99192af2008-01-13 07:32:38 +110080 };
81
82 plb {
83 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
84 #address-cells = <2>;
85 #size-cells = <1>;
86 ranges;
87 clock-frequency = <0>; /* Filled in by zImage */
88
89 SDRAM0: sdram {
90 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
David Gibson71f34972008-05-15 16:46:39 +100091 dcr-reg = <0x010 0x002>;
Sean MacLennan99192af2008-01-13 07:32:38 +110092 };
93
94 DMA0: dma {
95 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
David Gibson71f34972008-05-15 16:46:39 +100096 dcr-reg = <0x100 0x027>;
Sean MacLennan99192af2008-01-13 07:32:38 +110097 };
98
99 MAL0: mcmal {
100 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
David Gibson71f34972008-05-15 16:46:39 +1000101 dcr-reg = <0x180 0x062>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100102 num-tx-chans = <4>;
103 num-rx-chans = <2>;
104 interrupt-parent = <&MAL0>;
David Gibson71f34972008-05-15 16:46:39 +1000105 interrupts = <0x0 0x1 0x2 0x3 0x4>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100106 #interrupt-cells = <1>;
107 #address-cells = <0>;
108 #size-cells = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000109 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
110 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
111 /*SERR*/ 0x2 &UIC1 0x0 0x4
112 /*TXDE*/ 0x3 &UIC1 0x1 0x4
113 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100114 };
115
116 POB0: opb {
117 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
118 #address-cells = <1>;
119 #size-cells = <1>;
David Gibson71f34972008-05-15 16:46:39 +1000120 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
121 0x80000000 0x00000000 0x80000000 0x80000000>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100122 interrupt-parent = <&UIC1>;
David Gibson71f34972008-05-15 16:46:39 +1000123 interrupts = <0x7 0x4>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100124 clock-frequency = <0>; /* Filled in by zImage */
125
126 EBC0: ebc {
127 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
David Gibson71f34972008-05-15 16:46:39 +1000128 dcr-reg = <0x012 0x002>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100129 #address-cells = <2>;
130 #size-cells = <1>;
131 clock-frequency = <0>; /* Filled in by zImage */
David Gibson71f34972008-05-15 16:46:39 +1000132 interrupts = <0x5 0x1>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100133 interrupt-parent = <&UIC1>;
134
135 fpga@2,0 {
136 compatible = "pika,fpga";
Sean MacLennan0393cb62008-04-29 13:27:46 +1000137 reg = <0x00000002 0x00000000 0x00001000>;
David Gibson71f34972008-05-15 16:46:39 +1000138 interrupts = <0x18 0x8>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100139 interrupt-parent = <&UIC0>;
140 };
141
Sean MacLennan0393cb62008-04-29 13:27:46 +1000142 fpga@2,4000 {
143 compatible = "pika,fpga-sd";
144 reg = <0x00000002 0x00004000 0x00000A00>;
145 };
146
Sean MacLennan99192af2008-01-13 07:32:38 +1100147 nor_flash@0,0 {
Sean MacLennan0393cb62008-04-29 13:27:46 +1000148 compatible = "amd,s29gl032a", "cfi-flash";
Sean MacLennan99192af2008-01-13 07:32:38 +1100149 bank-width = <2>;
Sean MacLennan0393cb62008-04-29 13:27:46 +1000150 reg = <0x00000000 0x00000000 0x00400000>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100151 #address-cells = <1>;
152 #size-cells = <1>;
Sean MacLennan0393cb62008-04-29 13:27:46 +1000153 partition@300000 {
Sean MacLennan99192af2008-01-13 07:32:38 +1100154 label = "fpga";
Sean MacLennan0393cb62008-04-29 13:27:46 +1000155 reg = <0x0030000 0x00040000>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100156 };
Sean MacLennan0393cb62008-04-29 13:27:46 +1000157 partition@340000 {
Sean MacLennan99192af2008-01-13 07:32:38 +1100158 label = "env";
Sean MacLennan0393cb62008-04-29 13:27:46 +1000159 reg = <0x0340000 0x00040000>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100160 };
Sean MacLennan0393cb62008-04-29 13:27:46 +1000161 partition@380000 {
Sean MacLennan99192af2008-01-13 07:32:38 +1100162 label = "u-boot";
Sean MacLennan0393cb62008-04-29 13:27:46 +1000163 reg = <0x0380000 0x00080000>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100164 };
165 };
166 };
167
168 UART0: serial@ef600300 {
169 device_type = "serial";
170 compatible = "ns16550";
David Gibson71f34972008-05-15 16:46:39 +1000171 reg = <0xef600300 0x00000008>;
172 virtual-reg = <0xef600300>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100173 clock-frequency = <0>; /* Filled in by zImage */
David Gibson71f34972008-05-15 16:46:39 +1000174 current-speed = <115200>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100175 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000176 interrupts = <0x0 0x4>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100177 };
178
179 IIC0: i2c@ef600700 {
180 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
David Gibson71f34972008-05-15 16:46:39 +1000181 reg = <0xef600700 0x00000014>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100182 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000183 interrupts = <0x2 0x4>;
Sean MacLennan0393cb62008-04-29 13:27:46 +1000184 index = <0x0>;
185 #address-cells = <1>;
186 #size-cells = <0>;
187
188 ad7414@4a {
189 compatible = "adi,ad7414";
190 reg = <0x4a>;
191 interrupts = <0x19 0x8>;
192 interrupt-parent = <&UIC0>;
193 };
Sean MacLennan99192af2008-01-13 07:32:38 +1100194 };
195
196 GPIO0: gpio@ef600b00 {
197 compatible = "ibm,gpio-440ep";
David Gibson71f34972008-05-15 16:46:39 +1000198 reg = <0xef600b00 0x00000048>;
Sean MacLennan0393cb62008-04-29 13:27:46 +1000199 #gpio-cells = <2>;
200 gpio-controller;
Sean MacLennan99192af2008-01-13 07:32:38 +1100201 };
202
203 GPIO1: gpio@ef600c00 {
204 compatible = "ibm,gpio-440ep";
David Gibson71f34972008-05-15 16:46:39 +1000205 reg = <0xef600c00 0x00000048>;
Sean MacLennan0393cb62008-04-29 13:27:46 +1000206 #gpio-cells = <2>;
207 gpio-controller;
208
209 led@31 {
210 compatible = "linux,gpio-led";
211 linux,name = ":green:";
212 gpios = <&GPIO1 0x30 0>;
213 };
Sean MacLennan99192af2008-01-13 07:32:38 +1100214 };
215
216 ZMII0: emac-zmii@ef600d00 {
217 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
David Gibson71f34972008-05-15 16:46:39 +1000218 reg = <0xef600d00 0x0000000c>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100219 };
220
221 EMAC0: ethernet@ef600e00 {
Sean MacLennan99192af2008-01-13 07:32:38 +1100222 device_type = "network";
223 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
224 interrupt-parent = <&UIC1>;
David Gibson71f34972008-05-15 16:46:39 +1000225 interrupts = <0x1c 0x4 0x1d 0x4>;
226 reg = <0xef600e00 0x00000070>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100227 local-mac-address = [000000000000];
228 mal-device = <&MAL0>;
229 mal-tx-channel = <0 1>;
230 mal-rx-channel = <0>;
231 cell-index = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000232 max-frame-size = <1500>;
233 rx-fifo-size = <4096>;
234 tx-fifo-size = <2048>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100235 phy-mode = "rmii";
David Gibson71f34972008-05-15 16:46:39 +1000236 phy-map = <0x00000000>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100237 zmii-device = <&ZMII0>;
238 zmii-channel = <0>;
239 };
240
241 usb@ef601000 {
242 compatible = "ohci-be";
David Gibson71f34972008-05-15 16:46:39 +1000243 reg = <0xef601000 0x00000080>;
244 interrupts = <0x8 0x1 0x9 0x1>;
Sean MacLennan99192af2008-01-13 07:32:38 +1100245 interrupt-parent = < &UIC1 >;
246 };
247 };
248 };
249
250 chosen {
251 linux,stdout-path = "/plb/opb/serial@ef600300";
252 };
253};