| Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Freescale PowerQUICC MDIO Driver -- MII Management Bus Implementation |
| 3 | * Driver for the MDIO bus controller on Freescale PowerQUICC processors |
| 4 | * |
| 5 | * Author: Andy Fleming |
| 6 | * |
| 7 | * Copyright (c) 2002-2004,2008 Freescale Semiconductor, Inc. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | * |
| 14 | */ |
| 15 | #ifndef __FSL_PQ_MDIO_H |
| 16 | #define __FSL_PQ_MDIO_H |
| 17 | |
| 18 | #define MIIMIND_BUSY 0x00000001 |
| 19 | #define MIIMIND_NOTVALID 0x00000004 |
| 20 | #define MIIMCFG_INIT_VALUE 0x00000007 |
| 21 | #define MIIMCFG_RESET 0x80000000 |
| 22 | |
| 23 | #define MII_READ_COMMAND 0x00000001 |
| 24 | |
| 25 | struct fsl_pq_mdio { |
| 26 | u32 miimcfg; /* MII management configuration reg */ |
| 27 | u32 miimcom; /* MII management command reg */ |
| 28 | u32 miimadd; /* MII management address reg */ |
| 29 | u32 miimcon; /* MII management control reg */ |
| 30 | u32 miimstat; /* MII management status reg */ |
| 31 | u32 miimind; /* MII management indication reg */ |
| 32 | u8 reserved[28]; /* Space holder */ |
| 33 | u32 utbipar; /* TBI phy address reg (only on UCC) */ |
| 34 | } __attribute__ ((packed)); |
| 35 | |
| 36 | |
| 37 | int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum); |
| 38 | int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value); |
| 39 | int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id, |
| 40 | int regnum, u16 value); |
| 41 | int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs, int mii_id, int regnum); |
| 42 | int __init fsl_pq_mdio_init(void); |
| 43 | void fsl_pq_mdio_exit(void); |
| 44 | void fsl_pq_mdio_bus_name(char *name, struct device_node *np); |
| 45 | #endif /* FSL_PQ_MDIO_H */ |