blob: 52a197db71e6d1cf84592c152bf7bf9e49efbd6f [file] [log] [blame]
James Smartda0436e2009-05-22 14:51:39 -04001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
20
21/* Macros to deal with bit fields. Each bit field must have 3 #defines
22 * associated with it (_SHIFT, _MASK, and _WORD).
23 * EG. For a bit field that is in the 7th bit of the "field4" field of a
24 * structure and is 2 bits in size the following #defines must exist:
25 * struct temp {
26 * uint32_t field1;
27 * uint32_t field2;
28 * uint32_t field3;
29 * uint32_t field4;
30 * #define example_bit_field_SHIFT 7
31 * #define example_bit_field_MASK 0x03
32 * #define example_bit_field_WORD field4
33 * uint32_t field5;
34 * };
35 * Then the macros below may be used to get or set the value of that field.
36 * EG. To get the value of the bit field from the above example:
37 * struct temp t1;
38 * value = bf_get(example_bit_field, &t1);
39 * And then to set that bit field:
40 * bf_set(example_bit_field, &t1, 2);
41 * Or clear that bit field:
42 * bf_set(example_bit_field, &t1, 0);
43 */
James Smart079b5c92011-08-21 21:48:49 -040044#define bf_get_be32(name, ptr) \
45 ((be32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
James Smartcb5172e2010-03-15 11:25:07 -040046#define bf_get_le32(name, ptr) \
47 ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
James Smartda0436e2009-05-22 14:51:39 -040048#define bf_get(name, ptr) \
49 (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
James Smartcb5172e2010-03-15 11:25:07 -040050#define bf_set_le32(name, ptr, value) \
51 ((ptr)->name##_WORD = cpu_to_le32(((((value) & \
52 name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
53 ~(name##_MASK << name##_SHIFT)))))
James Smartda0436e2009-05-22 14:51:39 -040054#define bf_set(name, ptr, value) \
55 ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
56 ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
57
58struct dma_address {
59 uint32_t addr_lo;
60 uint32_t addr_hi;
61};
62
James Smart8fa38512009-07-19 10:01:03 -040063struct lpfc_sli_intf {
64 uint32_t word0;
James Smart28baac72010-02-12 14:42:03 -050065#define lpfc_sli_intf_valid_SHIFT 29
66#define lpfc_sli_intf_valid_MASK 0x00000007
67#define lpfc_sli_intf_valid_WORD word0
James Smart8fa38512009-07-19 10:01:03 -040068#define LPFC_SLI_INTF_VALID 6
James Smart085c6472010-11-20 23:11:37 -050069#define lpfc_sli_intf_sli_hint2_SHIFT 24
70#define lpfc_sli_intf_sli_hint2_MASK 0x0000001F
71#define lpfc_sli_intf_sli_hint2_WORD word0
72#define LPFC_SLI_INTF_SLI_HINT2_NONE 0
73#define lpfc_sli_intf_sli_hint1_SHIFT 16
74#define lpfc_sli_intf_sli_hint1_MASK 0x000000FF
75#define lpfc_sli_intf_sli_hint1_WORD word0
76#define LPFC_SLI_INTF_SLI_HINT1_NONE 0
77#define LPFC_SLI_INTF_SLI_HINT1_1 1
78#define LPFC_SLI_INTF_SLI_HINT1_2 2
79#define lpfc_sli_intf_if_type_SHIFT 12
80#define lpfc_sli_intf_if_type_MASK 0x0000000F
81#define lpfc_sli_intf_if_type_WORD word0
82#define LPFC_SLI_INTF_IF_TYPE_0 0
83#define LPFC_SLI_INTF_IF_TYPE_1 1
84#define LPFC_SLI_INTF_IF_TYPE_2 2
James Smart28baac72010-02-12 14:42:03 -050085#define lpfc_sli_intf_sli_family_SHIFT 8
James Smart085c6472010-11-20 23:11:37 -050086#define lpfc_sli_intf_sli_family_MASK 0x0000000F
James Smart28baac72010-02-12 14:42:03 -050087#define lpfc_sli_intf_sli_family_WORD word0
James Smart085c6472010-11-20 23:11:37 -050088#define LPFC_SLI_INTF_FAMILY_BE2 0x0
89#define LPFC_SLI_INTF_FAMILY_BE3 0x1
90#define LPFC_SLI_INTF_FAMILY_LNCR_A0 0xa
91#define LPFC_SLI_INTF_FAMILY_LNCR_B0 0xb
James Smart28baac72010-02-12 14:42:03 -050092#define lpfc_sli_intf_slirev_SHIFT 4
93#define lpfc_sli_intf_slirev_MASK 0x0000000F
94#define lpfc_sli_intf_slirev_WORD word0
95#define LPFC_SLI_INTF_REV_SLI3 3
96#define LPFC_SLI_INTF_REV_SLI4 4
James Smart085c6472010-11-20 23:11:37 -050097#define lpfc_sli_intf_func_type_SHIFT 0
98#define lpfc_sli_intf_func_type_MASK 0x00000001
99#define lpfc_sli_intf_func_type_WORD word0
100#define LPFC_SLI_INTF_IF_TYPE_PHYS 0
101#define LPFC_SLI_INTF_IF_TYPE_VIRT 1
James Smart8fa38512009-07-19 10:01:03 -0400102};
103
James Smartda0436e2009-05-22 14:51:39 -0400104#define LPFC_SLI4_MBX_EMBED true
105#define LPFC_SLI4_MBX_NEMBED false
106
107#define LPFC_SLI4_MB_WORD_COUNT 64
108#define LPFC_MAX_MQ_PAGE 8
109#define LPFC_MAX_WQ_PAGE 8
110#define LPFC_MAX_CQ_PAGE 4
111#define LPFC_MAX_EQ_PAGE 8
112
113#define LPFC_VIR_FUNC_MAX 32 /* Maximum number of virtual functions */
114#define LPFC_PCI_FUNC_MAX 5 /* Maximum number of PCI functions */
115#define LPFC_VFR_PAGE_SIZE 0x1000 /* 4KB BAR2 per-VF register page size */
116
117/* Define SLI4 Alignment requirements. */
118#define LPFC_ALIGN_16_BYTE 16
119#define LPFC_ALIGN_64_BYTE 64
120
121/* Define SLI4 specific definitions. */
122#define LPFC_MQ_CQE_BYTE_OFFSET 256
123#define LPFC_MBX_CMD_HDR_LENGTH 16
124#define LPFC_MBX_ERROR_RANGE 0x4000
125#define LPFC_BMBX_BIT1_ADDR_HI 0x2
126#define LPFC_BMBX_BIT1_ADDR_LO 0
127#define LPFC_RPI_HDR_COUNT 64
128#define LPFC_HDR_TEMPLATE_SIZE 4096
129#define LPFC_RPI_ALLOC_ERROR 0xFFFF
130#define LPFC_FCF_RECORD_WD_CNT 132
131#define LPFC_ENTIRE_FCF_DATABASE 0
132#define LPFC_DFLT_FCF_INDEX 0
133
134/* Virtual function numbers */
135#define LPFC_VF0 0
136#define LPFC_VF1 1
137#define LPFC_VF2 2
138#define LPFC_VF3 3
139#define LPFC_VF4 4
140#define LPFC_VF5 5
141#define LPFC_VF6 6
142#define LPFC_VF7 7
143#define LPFC_VF8 8
144#define LPFC_VF9 9
145#define LPFC_VF10 10
146#define LPFC_VF11 11
147#define LPFC_VF12 12
148#define LPFC_VF13 13
149#define LPFC_VF14 14
150#define LPFC_VF15 15
151#define LPFC_VF16 16
152#define LPFC_VF17 17
153#define LPFC_VF18 18
154#define LPFC_VF19 19
155#define LPFC_VF20 20
156#define LPFC_VF21 21
157#define LPFC_VF22 22
158#define LPFC_VF23 23
159#define LPFC_VF24 24
160#define LPFC_VF25 25
161#define LPFC_VF26 26
162#define LPFC_VF27 27
163#define LPFC_VF28 28
164#define LPFC_VF29 29
165#define LPFC_VF30 30
166#define LPFC_VF31 31
167
168/* PCI function numbers */
169#define LPFC_PCI_FUNC0 0
170#define LPFC_PCI_FUNC1 1
171#define LPFC_PCI_FUNC2 2
172#define LPFC_PCI_FUNC3 3
173#define LPFC_PCI_FUNC4 4
174
James Smart88a2cfb2011-07-22 18:36:33 -0400175/* SLI4 interface type-2 PDEV_CTL register */
James Smartc0c11512011-05-24 11:41:34 -0400176#define LPFC_CTL_PDEV_CTL_OFFSET 0x414
James Smartc0c11512011-05-24 11:41:34 -0400177#define LPFC_CTL_PDEV_CTL_DRST 0x00000001
178#define LPFC_CTL_PDEV_CTL_FRST 0x00000002
179#define LPFC_CTL_PDEV_CTL_DD 0x00000004
180#define LPFC_CTL_PDEV_CTL_LC 0x00000008
181#define LPFC_CTL_PDEV_CTL_FRL_ALL 0x00
182#define LPFC_CTL_PDEV_CTL_FRL_FC_FCOE 0x10
183#define LPFC_CTL_PDEV_CTL_FRL_NIC 0x20
184
185#define LPFC_FW_DUMP_REQUEST (LPFC_CTL_PDEV_CTL_DD | LPFC_CTL_PDEV_CTL_FRST)
186
James Smartda0436e2009-05-22 14:51:39 -0400187/* Active interrupt test count */
188#define LPFC_ACT_INTR_CNT 4
189
190/* Delay Multiplier constant */
191#define LPFC_DMULT_CONST 651042
192#define LPFC_MIM_IMAX 636
193#define LPFC_FP_DEF_IMAX 10000
194#define LPFC_SP_DEF_IMAX 10000
195
James Smart28baac72010-02-12 14:42:03 -0500196/* PORT_CAPABILITIES constants. */
197#define LPFC_MAX_SUPPORTED_PAGES 8
198
James Smartda0436e2009-05-22 14:51:39 -0400199struct ulp_bde64 {
200 union ULP_BDE_TUS {
201 uint32_t w;
202 struct {
203#ifdef __BIG_ENDIAN_BITFIELD
204 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
205 VALUE !! */
206 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
207#else /* __LITTLE_ENDIAN_BITFIELD */
208 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
209 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
210 VALUE !! */
211#endif
212#define BUFF_TYPE_BDE_64 0x00 /* BDE (Host_resident) */
213#define BUFF_TYPE_BDE_IMMED 0x01 /* Immediate Data BDE */
214#define BUFF_TYPE_BDE_64P 0x02 /* BDE (Port-resident) */
215#define BUFF_TYPE_BDE_64I 0x08 /* Input BDE (Host-resident) */
216#define BUFF_TYPE_BDE_64IP 0x0A /* Input BDE (Port-resident) */
217#define BUFF_TYPE_BLP_64 0x40 /* BLP (Host-resident) */
218#define BUFF_TYPE_BLP_64P 0x42 /* BLP (Port-resident) */
219 } f;
220 } tus;
221 uint32_t addrLow;
222 uint32_t addrHigh;
223};
224
225struct lpfc_sli4_flags {
226 uint32_t word0;
James Smart6d368e52011-05-24 11:44:12 -0400227#define lpfc_idx_rsrc_rdy_SHIFT 0
228#define lpfc_idx_rsrc_rdy_MASK 0x00000001
229#define lpfc_idx_rsrc_rdy_WORD word0
230#define LPFC_IDX_RSRC_RDY 1
231#define lpfc_xri_rsrc_rdy_SHIFT 1
232#define lpfc_xri_rsrc_rdy_MASK 0x00000001
233#define lpfc_xri_rsrc_rdy_WORD word0
234#define LPFC_XRI_RSRC_RDY 1
235#define lpfc_rpi_rsrc_rdy_SHIFT 2
236#define lpfc_rpi_rsrc_rdy_MASK 0x00000001
237#define lpfc_rpi_rsrc_rdy_WORD word0
238#define LPFC_RPI_RSRC_RDY 1
239#define lpfc_vpi_rsrc_rdy_SHIFT 3
240#define lpfc_vpi_rsrc_rdy_MASK 0x00000001
241#define lpfc_vpi_rsrc_rdy_WORD word0
242#define LPFC_VPI_RSRC_RDY 1
243#define lpfc_vfi_rsrc_rdy_SHIFT 4
244#define lpfc_vfi_rsrc_rdy_MASK 0x00000001
245#define lpfc_vfi_rsrc_rdy_WORD word0
246#define LPFC_VFI_RSRC_RDY 1
James Smartda0436e2009-05-22 14:51:39 -0400247};
248
James Smart546fc852011-03-11 16:06:29 -0500249struct sli4_bls_rsp {
James Smart5ffc2662009-11-18 15:39:44 -0500250 uint32_t word0_rsvd; /* Word0 must be reserved */
251 uint32_t word1;
252#define lpfc_abts_orig_SHIFT 0
253#define lpfc_abts_orig_MASK 0x00000001
254#define lpfc_abts_orig_WORD word1
255#define LPFC_ABTS_UNSOL_RSP 1
256#define LPFC_ABTS_UNSOL_INT 0
257 uint32_t word2;
258#define lpfc_abts_rxid_SHIFT 0
259#define lpfc_abts_rxid_MASK 0x0000FFFF
260#define lpfc_abts_rxid_WORD word2
261#define lpfc_abts_oxid_SHIFT 16
262#define lpfc_abts_oxid_MASK 0x0000FFFF
263#define lpfc_abts_oxid_WORD word2
264 uint32_t word3;
James Smart546fc852011-03-11 16:06:29 -0500265#define lpfc_vndr_code_SHIFT 0
266#define lpfc_vndr_code_MASK 0x000000FF
267#define lpfc_vndr_code_WORD word3
268#define lpfc_rsn_expln_SHIFT 8
269#define lpfc_rsn_expln_MASK 0x000000FF
270#define lpfc_rsn_expln_WORD word3
271#define lpfc_rsn_code_SHIFT 16
272#define lpfc_rsn_code_MASK 0x000000FF
273#define lpfc_rsn_code_WORD word3
274
James Smart5ffc2662009-11-18 15:39:44 -0500275 uint32_t word4;
276 uint32_t word5_rsvd; /* Word5 must be reserved */
277};
278
James Smartda0436e2009-05-22 14:51:39 -0400279/* event queue entry structure */
280struct lpfc_eqe {
281 uint32_t word0;
282#define lpfc_eqe_resource_id_SHIFT 16
283#define lpfc_eqe_resource_id_MASK 0x000000FF
284#define lpfc_eqe_resource_id_WORD word0
285#define lpfc_eqe_minor_code_SHIFT 4
286#define lpfc_eqe_minor_code_MASK 0x00000FFF
287#define lpfc_eqe_minor_code_WORD word0
288#define lpfc_eqe_major_code_SHIFT 1
289#define lpfc_eqe_major_code_MASK 0x00000007
290#define lpfc_eqe_major_code_WORD word0
291#define lpfc_eqe_valid_SHIFT 0
292#define lpfc_eqe_valid_MASK 0x00000001
293#define lpfc_eqe_valid_WORD word0
294};
295
296/* completion queue entry structure (common fields for all cqe types) */
297struct lpfc_cqe {
298 uint32_t reserved0;
299 uint32_t reserved1;
300 uint32_t reserved2;
301 uint32_t word3;
302#define lpfc_cqe_valid_SHIFT 31
303#define lpfc_cqe_valid_MASK 0x00000001
304#define lpfc_cqe_valid_WORD word3
305#define lpfc_cqe_code_SHIFT 16
306#define lpfc_cqe_code_MASK 0x000000FF
307#define lpfc_cqe_code_WORD word3
308};
309
310/* Completion Queue Entry Status Codes */
311#define CQE_STATUS_SUCCESS 0x0
312#define CQE_STATUS_FCP_RSP_FAILURE 0x1
313#define CQE_STATUS_REMOTE_STOP 0x2
314#define CQE_STATUS_LOCAL_REJECT 0x3
315#define CQE_STATUS_NPORT_RJT 0x4
316#define CQE_STATUS_FABRIC_RJT 0x5
317#define CQE_STATUS_NPORT_BSY 0x6
318#define CQE_STATUS_FABRIC_BSY 0x7
319#define CQE_STATUS_INTERMED_RSP 0x8
320#define CQE_STATUS_LS_RJT 0x9
321#define CQE_STATUS_CMD_REJECT 0xb
322#define CQE_STATUS_FCP_TGT_LENCHECK 0xc
323#define CQE_STATUS_NEED_BUFF_ENTRY 0xf
324
325/* Status returned by hardware (valid only if status = CQE_STATUS_SUCCESS). */
326#define CQE_HW_STATUS_NO_ERR 0x0
327#define CQE_HW_STATUS_UNDERRUN 0x1
328#define CQE_HW_STATUS_OVERRUN 0x2
329
330/* Completion Queue Entry Codes */
331#define CQE_CODE_COMPL_WQE 0x1
332#define CQE_CODE_RELEASE_WQE 0x2
333#define CQE_CODE_RECEIVE 0x4
334#define CQE_CODE_XRI_ABORTED 0x5
James Smart7851fe22011-07-22 18:36:52 -0400335#define CQE_CODE_RECEIVE_V1 0x9
James Smartda0436e2009-05-22 14:51:39 -0400336
337/* completion queue entry for wqe completions */
338struct lpfc_wcqe_complete {
339 uint32_t word0;
340#define lpfc_wcqe_c_request_tag_SHIFT 16
341#define lpfc_wcqe_c_request_tag_MASK 0x0000FFFF
342#define lpfc_wcqe_c_request_tag_WORD word0
343#define lpfc_wcqe_c_status_SHIFT 8
344#define lpfc_wcqe_c_status_MASK 0x000000FF
345#define lpfc_wcqe_c_status_WORD word0
346#define lpfc_wcqe_c_hw_status_SHIFT 0
347#define lpfc_wcqe_c_hw_status_MASK 0x000000FF
348#define lpfc_wcqe_c_hw_status_WORD word0
349 uint32_t total_data_placed;
350 uint32_t parameter;
351 uint32_t word3;
352#define lpfc_wcqe_c_valid_SHIFT lpfc_cqe_valid_SHIFT
353#define lpfc_wcqe_c_valid_MASK lpfc_cqe_valid_MASK
354#define lpfc_wcqe_c_valid_WORD lpfc_cqe_valid_WORD
355#define lpfc_wcqe_c_xb_SHIFT 28
356#define lpfc_wcqe_c_xb_MASK 0x00000001
357#define lpfc_wcqe_c_xb_WORD word3
358#define lpfc_wcqe_c_pv_SHIFT 27
359#define lpfc_wcqe_c_pv_MASK 0x00000001
360#define lpfc_wcqe_c_pv_WORD word3
361#define lpfc_wcqe_c_priority_SHIFT 24
362#define lpfc_wcqe_c_priority_MASK 0x00000007
363#define lpfc_wcqe_c_priority_WORD word3
364#define lpfc_wcqe_c_code_SHIFT lpfc_cqe_code_SHIFT
365#define lpfc_wcqe_c_code_MASK lpfc_cqe_code_MASK
366#define lpfc_wcqe_c_code_WORD lpfc_cqe_code_WORD
367};
368
369/* completion queue entry for wqe release */
370struct lpfc_wcqe_release {
371 uint32_t reserved0;
372 uint32_t reserved1;
373 uint32_t word2;
374#define lpfc_wcqe_r_wq_id_SHIFT 16
375#define lpfc_wcqe_r_wq_id_MASK 0x0000FFFF
376#define lpfc_wcqe_r_wq_id_WORD word2
377#define lpfc_wcqe_r_wqe_index_SHIFT 0
378#define lpfc_wcqe_r_wqe_index_MASK 0x0000FFFF
379#define lpfc_wcqe_r_wqe_index_WORD word2
380 uint32_t word3;
381#define lpfc_wcqe_r_valid_SHIFT lpfc_cqe_valid_SHIFT
382#define lpfc_wcqe_r_valid_MASK lpfc_cqe_valid_MASK
383#define lpfc_wcqe_r_valid_WORD lpfc_cqe_valid_WORD
384#define lpfc_wcqe_r_code_SHIFT lpfc_cqe_code_SHIFT
385#define lpfc_wcqe_r_code_MASK lpfc_cqe_code_MASK
386#define lpfc_wcqe_r_code_WORD lpfc_cqe_code_WORD
387};
388
389struct sli4_wcqe_xri_aborted {
390 uint32_t word0;
391#define lpfc_wcqe_xa_status_SHIFT 8
392#define lpfc_wcqe_xa_status_MASK 0x000000FF
393#define lpfc_wcqe_xa_status_WORD word0
394 uint32_t parameter;
395 uint32_t word2;
396#define lpfc_wcqe_xa_remote_xid_SHIFT 16
397#define lpfc_wcqe_xa_remote_xid_MASK 0x0000FFFF
398#define lpfc_wcqe_xa_remote_xid_WORD word2
399#define lpfc_wcqe_xa_xri_SHIFT 0
400#define lpfc_wcqe_xa_xri_MASK 0x0000FFFF
401#define lpfc_wcqe_xa_xri_WORD word2
402 uint32_t word3;
403#define lpfc_wcqe_xa_valid_SHIFT lpfc_cqe_valid_SHIFT
404#define lpfc_wcqe_xa_valid_MASK lpfc_cqe_valid_MASK
405#define lpfc_wcqe_xa_valid_WORD lpfc_cqe_valid_WORD
406#define lpfc_wcqe_xa_ia_SHIFT 30
407#define lpfc_wcqe_xa_ia_MASK 0x00000001
408#define lpfc_wcqe_xa_ia_WORD word3
409#define CQE_XRI_ABORTED_IA_REMOTE 0
410#define CQE_XRI_ABORTED_IA_LOCAL 1
411#define lpfc_wcqe_xa_br_SHIFT 29
412#define lpfc_wcqe_xa_br_MASK 0x00000001
413#define lpfc_wcqe_xa_br_WORD word3
414#define CQE_XRI_ABORTED_BR_BA_ACC 0
415#define CQE_XRI_ABORTED_BR_BA_RJT 1
416#define lpfc_wcqe_xa_eo_SHIFT 28
417#define lpfc_wcqe_xa_eo_MASK 0x00000001
418#define lpfc_wcqe_xa_eo_WORD word3
419#define CQE_XRI_ABORTED_EO_REMOTE 0
420#define CQE_XRI_ABORTED_EO_LOCAL 1
421#define lpfc_wcqe_xa_code_SHIFT lpfc_cqe_code_SHIFT
422#define lpfc_wcqe_xa_code_MASK lpfc_cqe_code_MASK
423#define lpfc_wcqe_xa_code_WORD lpfc_cqe_code_WORD
424};
425
426/* completion queue entry structure for rqe completion */
427struct lpfc_rcqe {
428 uint32_t word0;
429#define lpfc_rcqe_bindex_SHIFT 16
430#define lpfc_rcqe_bindex_MASK 0x0000FFF
431#define lpfc_rcqe_bindex_WORD word0
432#define lpfc_rcqe_status_SHIFT 8
433#define lpfc_rcqe_status_MASK 0x000000FF
434#define lpfc_rcqe_status_WORD word0
435#define FC_STATUS_RQ_SUCCESS 0x10 /* Async receive successful */
436#define FC_STATUS_RQ_BUF_LEN_EXCEEDED 0x11 /* payload truncated */
437#define FC_STATUS_INSUFF_BUF_NEED_BUF 0x12 /* Insufficient buffers */
438#define FC_STATUS_INSUFF_BUF_FRM_DISC 0x13 /* Frame Discard */
James Smart7851fe22011-07-22 18:36:52 -0400439 uint32_t word1;
440#define lpfc_rcqe_fcf_id_v1_SHIFT 0
441#define lpfc_rcqe_fcf_id_v1_MASK 0x0000003F
442#define lpfc_rcqe_fcf_id_v1_WORD word1
James Smartda0436e2009-05-22 14:51:39 -0400443 uint32_t word2;
444#define lpfc_rcqe_length_SHIFT 16
445#define lpfc_rcqe_length_MASK 0x0000FFFF
446#define lpfc_rcqe_length_WORD word2
447#define lpfc_rcqe_rq_id_SHIFT 6
448#define lpfc_rcqe_rq_id_MASK 0x000003FF
449#define lpfc_rcqe_rq_id_WORD word2
450#define lpfc_rcqe_fcf_id_SHIFT 0
451#define lpfc_rcqe_fcf_id_MASK 0x0000003F
452#define lpfc_rcqe_fcf_id_WORD word2
James Smart7851fe22011-07-22 18:36:52 -0400453#define lpfc_rcqe_rq_id_v1_SHIFT 0
454#define lpfc_rcqe_rq_id_v1_MASK 0x0000FFFF
455#define lpfc_rcqe_rq_id_v1_WORD word2
James Smartda0436e2009-05-22 14:51:39 -0400456 uint32_t word3;
457#define lpfc_rcqe_valid_SHIFT lpfc_cqe_valid_SHIFT
458#define lpfc_rcqe_valid_MASK lpfc_cqe_valid_MASK
459#define lpfc_rcqe_valid_WORD lpfc_cqe_valid_WORD
460#define lpfc_rcqe_port_SHIFT 30
461#define lpfc_rcqe_port_MASK 0x00000001
462#define lpfc_rcqe_port_WORD word3
463#define lpfc_rcqe_hdr_length_SHIFT 24
464#define lpfc_rcqe_hdr_length_MASK 0x0000001F
465#define lpfc_rcqe_hdr_length_WORD word3
466#define lpfc_rcqe_code_SHIFT lpfc_cqe_code_SHIFT
467#define lpfc_rcqe_code_MASK lpfc_cqe_code_MASK
468#define lpfc_rcqe_code_WORD lpfc_cqe_code_WORD
469#define lpfc_rcqe_eof_SHIFT 8
470#define lpfc_rcqe_eof_MASK 0x000000FF
471#define lpfc_rcqe_eof_WORD word3
472#define FCOE_EOFn 0x41
473#define FCOE_EOFt 0x42
474#define FCOE_EOFni 0x49
475#define FCOE_EOFa 0x50
476#define lpfc_rcqe_sof_SHIFT 0
477#define lpfc_rcqe_sof_MASK 0x000000FF
478#define lpfc_rcqe_sof_WORD word3
479#define FCOE_SOFi2 0x2d
480#define FCOE_SOFi3 0x2e
481#define FCOE_SOFn2 0x35
482#define FCOE_SOFn3 0x36
483};
484
James Smartda0436e2009-05-22 14:51:39 -0400485struct lpfc_rqe {
486 uint32_t address_hi;
487 uint32_t address_lo;
488};
489
490/* buffer descriptors */
491struct lpfc_bde4 {
492 uint32_t addr_hi;
493 uint32_t addr_lo;
494 uint32_t word2;
495#define lpfc_bde4_last_SHIFT 31
496#define lpfc_bde4_last_MASK 0x00000001
497#define lpfc_bde4_last_WORD word2
498#define lpfc_bde4_sge_offset_SHIFT 0
499#define lpfc_bde4_sge_offset_MASK 0x000003FF
500#define lpfc_bde4_sge_offset_WORD word2
501 uint32_t word3;
502#define lpfc_bde4_length_SHIFT 0
503#define lpfc_bde4_length_MASK 0x000000FF
504#define lpfc_bde4_length_WORD word3
505};
506
507struct lpfc_register {
508 uint32_t word0;
509};
510
James Smart085c6472010-11-20 23:11:37 -0500511/* The following BAR0 Registers apply to SLI4 if_type 0 UCNAs. */
James Smartda0436e2009-05-22 14:51:39 -0400512#define LPFC_UERR_STATUS_HI 0x00A4
513#define LPFC_UERR_STATUS_LO 0x00A0
James Smarta747c9c2009-11-18 15:41:10 -0500514#define LPFC_UE_MASK_HI 0x00AC
515#define LPFC_UE_MASK_LO 0x00A8
James Smartda0436e2009-05-22 14:51:39 -0400516
James Smart2fcee4b2010-12-15 17:57:46 -0500517/* The following BAR0 register sets are defined for if_type 0 and 2 UCNAs. */
518#define LPFC_SLI_INTF 0x0058
James Smartda0436e2009-05-22 14:51:39 -0400519
James Smart88a2cfb2011-07-22 18:36:33 -0400520#define LPFC_CTL_PORT_SEM_OFFSET 0x400
James Smart2fcee4b2010-12-15 17:57:46 -0500521#define lpfc_port_smphr_perr_SHIFT 31
522#define lpfc_port_smphr_perr_MASK 0x1
523#define lpfc_port_smphr_perr_WORD word0
524#define lpfc_port_smphr_sfi_SHIFT 30
525#define lpfc_port_smphr_sfi_MASK 0x1
526#define lpfc_port_smphr_sfi_WORD word0
527#define lpfc_port_smphr_nip_SHIFT 29
528#define lpfc_port_smphr_nip_MASK 0x1
529#define lpfc_port_smphr_nip_WORD word0
530#define lpfc_port_smphr_ipc_SHIFT 28
531#define lpfc_port_smphr_ipc_MASK 0x1
532#define lpfc_port_smphr_ipc_WORD word0
533#define lpfc_port_smphr_scr1_SHIFT 27
534#define lpfc_port_smphr_scr1_MASK 0x1
535#define lpfc_port_smphr_scr1_WORD word0
536#define lpfc_port_smphr_scr2_SHIFT 26
537#define lpfc_port_smphr_scr2_MASK 0x1
538#define lpfc_port_smphr_scr2_WORD word0
539#define lpfc_port_smphr_host_scratch_SHIFT 16
540#define lpfc_port_smphr_host_scratch_MASK 0xFF
541#define lpfc_port_smphr_host_scratch_WORD word0
542#define lpfc_port_smphr_port_status_SHIFT 0
543#define lpfc_port_smphr_port_status_MASK 0xFFFF
544#define lpfc_port_smphr_port_status_WORD word0
545
James Smartda0436e2009-05-22 14:51:39 -0400546#define LPFC_POST_STAGE_POWER_ON_RESET 0x0000
547#define LPFC_POST_STAGE_AWAITING_HOST_RDY 0x0001
548#define LPFC_POST_STAGE_HOST_RDY 0x0002
549#define LPFC_POST_STAGE_BE_RESET 0x0003
550#define LPFC_POST_STAGE_SEEPROM_CS_START 0x0100
551#define LPFC_POST_STAGE_SEEPROM_CS_DONE 0x0101
552#define LPFC_POST_STAGE_DDR_CONFIG_START 0x0200
553#define LPFC_POST_STAGE_DDR_CONFIG_DONE 0x0201
554#define LPFC_POST_STAGE_DDR_CALIBRATE_START 0x0300
555#define LPFC_POST_STAGE_DDR_CALIBRATE_DONE 0x0301
556#define LPFC_POST_STAGE_DDR_TEST_START 0x0400
557#define LPFC_POST_STAGE_DDR_TEST_DONE 0x0401
558#define LPFC_POST_STAGE_REDBOOT_INIT_START 0x0600
559#define LPFC_POST_STAGE_REDBOOT_INIT_DONE 0x0601
560#define LPFC_POST_STAGE_FW_IMAGE_LOAD_START 0x0700
561#define LPFC_POST_STAGE_FW_IMAGE_LOAD_DONE 0x0701
562#define LPFC_POST_STAGE_ARMFW_START 0x0800
563#define LPFC_POST_STAGE_DHCP_QUERY_START 0x0900
564#define LPFC_POST_STAGE_DHCP_QUERY_DONE 0x0901
565#define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_START 0x0A00
566#define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_DONE 0x0A01
567#define LPFC_POST_STAGE_RC_OPTION_SET 0x0B00
568#define LPFC_POST_STAGE_SWITCH_LINK 0x0B01
569#define LPFC_POST_STAGE_SEND_ICDS_MESSAGE 0x0B02
570#define LPFC_POST_STAGE_PERFROM_TFTP 0x0B03
571#define LPFC_POST_STAGE_PARSE_XML 0x0B04
572#define LPFC_POST_STAGE_DOWNLOAD_IMAGE 0x0B05
573#define LPFC_POST_STAGE_FLASH_IMAGE 0x0B06
574#define LPFC_POST_STAGE_RC_DONE 0x0B07
575#define LPFC_POST_STAGE_REBOOT_SYSTEM 0x0B08
576#define LPFC_POST_STAGE_MAC_ADDRESS 0x0C00
James Smart2fcee4b2010-12-15 17:57:46 -0500577#define LPFC_POST_STAGE_PORT_READY 0xC000
578#define LPFC_POST_STAGE_PORT_UE 0xF000
James Smart085c6472010-11-20 23:11:37 -0500579
James Smart88a2cfb2011-07-22 18:36:33 -0400580#define LPFC_CTL_PORT_STA_OFFSET 0x404
James Smart085c6472010-11-20 23:11:37 -0500581#define lpfc_sliport_status_err_SHIFT 31
582#define lpfc_sliport_status_err_MASK 0x1
583#define lpfc_sliport_status_err_WORD word0
584#define lpfc_sliport_status_end_SHIFT 30
585#define lpfc_sliport_status_end_MASK 0x1
586#define lpfc_sliport_status_end_WORD word0
587#define lpfc_sliport_status_oti_SHIFT 29
588#define lpfc_sliport_status_oti_MASK 0x1
589#define lpfc_sliport_status_oti_WORD word0
590#define lpfc_sliport_status_rn_SHIFT 24
591#define lpfc_sliport_status_rn_MASK 0x1
592#define lpfc_sliport_status_rn_WORD word0
593#define lpfc_sliport_status_rdy_SHIFT 23
594#define lpfc_sliport_status_rdy_MASK 0x1
595#define lpfc_sliport_status_rdy_WORD word0
James Smart2fcee4b2010-12-15 17:57:46 -0500596#define MAX_IF_TYPE_2_RESETS 1000
James Smart085c6472010-11-20 23:11:37 -0500597
James Smart88a2cfb2011-07-22 18:36:33 -0400598#define LPFC_CTL_PORT_CTL_OFFSET 0x408
James Smart085c6472010-11-20 23:11:37 -0500599#define lpfc_sliport_ctrl_end_SHIFT 30
600#define lpfc_sliport_ctrl_end_MASK 0x1
601#define lpfc_sliport_ctrl_end_WORD word0
602#define LPFC_SLIPORT_LITTLE_ENDIAN 0
603#define LPFC_SLIPORT_BIG_ENDIAN 1
604#define lpfc_sliport_ctrl_ip_SHIFT 27
605#define lpfc_sliport_ctrl_ip_MASK 0x1
606#define lpfc_sliport_ctrl_ip_WORD word0
James Smart2fcee4b2010-12-15 17:57:46 -0500607#define LPFC_SLIPORT_INIT_PORT 1
James Smart085c6472010-11-20 23:11:37 -0500608
James Smart88a2cfb2011-07-22 18:36:33 -0400609#define LPFC_CTL_PORT_ER1_OFFSET 0x40C
610#define LPFC_CTL_PORT_ER2_OFFSET 0x410
James Smart085c6472010-11-20 23:11:37 -0500611
James Smart2fcee4b2010-12-15 17:57:46 -0500612/* The following Registers apply to SLI4 if_type 0 UCNAs. They typically
613 * reside in BAR 2.
614 */
615#define LPFC_SLIPORT_IF0_SMPHR 0x00AC
616
James Smartda0436e2009-05-22 14:51:39 -0400617#define LPFC_IMR_MASK_ALL 0xFFFFFFFF
618#define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF
619
620#define LPFC_HST_ISR0 0x0C18
621#define LPFC_HST_ISR1 0x0C1C
622#define LPFC_HST_ISR2 0x0C20
623#define LPFC_HST_ISR3 0x0C24
624#define LPFC_HST_ISR4 0x0C28
625
626#define LPFC_HST_IMR0 0x0C48
627#define LPFC_HST_IMR1 0x0C4C
628#define LPFC_HST_IMR2 0x0C50
629#define LPFC_HST_IMR3 0x0C54
630#define LPFC_HST_IMR4 0x0C58
631
632#define LPFC_HST_ISCR0 0x0C78
633#define LPFC_HST_ISCR1 0x0C7C
634#define LPFC_HST_ISCR2 0x0C80
635#define LPFC_HST_ISCR3 0x0C84
636#define LPFC_HST_ISCR4 0x0C88
637
638#define LPFC_SLI4_INTR0 BIT0
639#define LPFC_SLI4_INTR1 BIT1
640#define LPFC_SLI4_INTR2 BIT2
641#define LPFC_SLI4_INTR3 BIT3
642#define LPFC_SLI4_INTR4 BIT4
643#define LPFC_SLI4_INTR5 BIT5
644#define LPFC_SLI4_INTR6 BIT6
645#define LPFC_SLI4_INTR7 BIT7
646#define LPFC_SLI4_INTR8 BIT8
647#define LPFC_SLI4_INTR9 BIT9
648#define LPFC_SLI4_INTR10 BIT10
649#define LPFC_SLI4_INTR11 BIT11
650#define LPFC_SLI4_INTR12 BIT12
651#define LPFC_SLI4_INTR13 BIT13
652#define LPFC_SLI4_INTR14 BIT14
653#define LPFC_SLI4_INTR15 BIT15
654#define LPFC_SLI4_INTR16 BIT16
655#define LPFC_SLI4_INTR17 BIT17
656#define LPFC_SLI4_INTR18 BIT18
657#define LPFC_SLI4_INTR19 BIT19
658#define LPFC_SLI4_INTR20 BIT20
659#define LPFC_SLI4_INTR21 BIT21
660#define LPFC_SLI4_INTR22 BIT22
661#define LPFC_SLI4_INTR23 BIT23
662#define LPFC_SLI4_INTR24 BIT24
663#define LPFC_SLI4_INTR25 BIT25
664#define LPFC_SLI4_INTR26 BIT26
665#define LPFC_SLI4_INTR27 BIT27
666#define LPFC_SLI4_INTR28 BIT28
667#define LPFC_SLI4_INTR29 BIT29
668#define LPFC_SLI4_INTR30 BIT30
669#define LPFC_SLI4_INTR31 BIT31
670
James Smart085c6472010-11-20 23:11:37 -0500671/*
672 * The Doorbell registers defined here exist in different BAR
673 * register sets depending on the UCNA Port's reported if_type
674 * value. For UCNA ports running SLI4 and if_type 0, they reside in
James Smart2fcee4b2010-12-15 17:57:46 -0500675 * BAR4. For UCNA ports running SLI4 and if_type 2, they reside in
James Smart085c6472010-11-20 23:11:37 -0500676 * BAR0. The offsets are the same so the driver must account for
677 * any base address difference.
678 */
James Smartda0436e2009-05-22 14:51:39 -0400679#define LPFC_RQ_DOORBELL 0x00A0
680#define lpfc_rq_doorbell_num_posted_SHIFT 16
681#define lpfc_rq_doorbell_num_posted_MASK 0x3FFF
682#define lpfc_rq_doorbell_num_posted_WORD word0
683#define LPFC_RQ_POST_BATCH 8 /* RQEs to post at one time */
684#define lpfc_rq_doorbell_id_SHIFT 0
James Smart085c6472010-11-20 23:11:37 -0500685#define lpfc_rq_doorbell_id_MASK 0xFFFF
James Smartda0436e2009-05-22 14:51:39 -0400686#define lpfc_rq_doorbell_id_WORD word0
687
688#define LPFC_WQ_DOORBELL 0x0040
689#define lpfc_wq_doorbell_num_posted_SHIFT 24
690#define lpfc_wq_doorbell_num_posted_MASK 0x00FF
691#define lpfc_wq_doorbell_num_posted_WORD word0
692#define lpfc_wq_doorbell_index_SHIFT 16
693#define lpfc_wq_doorbell_index_MASK 0x00FF
694#define lpfc_wq_doorbell_index_WORD word0
695#define lpfc_wq_doorbell_id_SHIFT 0
696#define lpfc_wq_doorbell_id_MASK 0xFFFF
697#define lpfc_wq_doorbell_id_WORD word0
698
699#define LPFC_EQCQ_DOORBELL 0x0120
James Smart085c6472010-11-20 23:11:37 -0500700#define lpfc_eqcq_doorbell_se_SHIFT 31
701#define lpfc_eqcq_doorbell_se_MASK 0x0001
702#define lpfc_eqcq_doorbell_se_WORD word0
703#define LPFC_EQCQ_SOLICIT_ENABLE_OFF 0
704#define LPFC_EQCQ_SOLICIT_ENABLE_ON 1
James Smartda0436e2009-05-22 14:51:39 -0400705#define lpfc_eqcq_doorbell_arm_SHIFT 29
706#define lpfc_eqcq_doorbell_arm_MASK 0x0001
707#define lpfc_eqcq_doorbell_arm_WORD word0
708#define lpfc_eqcq_doorbell_num_released_SHIFT 16
709#define lpfc_eqcq_doorbell_num_released_MASK 0x1FFF
710#define lpfc_eqcq_doorbell_num_released_WORD word0
711#define lpfc_eqcq_doorbell_qt_SHIFT 10
712#define lpfc_eqcq_doorbell_qt_MASK 0x0001
713#define lpfc_eqcq_doorbell_qt_WORD word0
714#define LPFC_QUEUE_TYPE_COMPLETION 0
715#define LPFC_QUEUE_TYPE_EVENT 1
716#define lpfc_eqcq_doorbell_eqci_SHIFT 9
717#define lpfc_eqcq_doorbell_eqci_MASK 0x0001
718#define lpfc_eqcq_doorbell_eqci_WORD word0
719#define lpfc_eqcq_doorbell_cqid_SHIFT 0
720#define lpfc_eqcq_doorbell_cqid_MASK 0x03FF
721#define lpfc_eqcq_doorbell_cqid_WORD word0
722#define lpfc_eqcq_doorbell_eqid_SHIFT 0
723#define lpfc_eqcq_doorbell_eqid_MASK 0x01FF
724#define lpfc_eqcq_doorbell_eqid_WORD word0
725
726#define LPFC_BMBX 0x0160
727#define lpfc_bmbx_addr_SHIFT 2
728#define lpfc_bmbx_addr_MASK 0x3FFFFFFF
729#define lpfc_bmbx_addr_WORD word0
730#define lpfc_bmbx_hi_SHIFT 1
731#define lpfc_bmbx_hi_MASK 0x0001
732#define lpfc_bmbx_hi_WORD word0
733#define lpfc_bmbx_rdy_SHIFT 0
734#define lpfc_bmbx_rdy_MASK 0x0001
735#define lpfc_bmbx_rdy_WORD word0
736
737#define LPFC_MQ_DOORBELL 0x0140
738#define lpfc_mq_doorbell_num_posted_SHIFT 16
739#define lpfc_mq_doorbell_num_posted_MASK 0x3FFF
740#define lpfc_mq_doorbell_num_posted_WORD word0
741#define lpfc_mq_doorbell_id_SHIFT 0
James Smart085c6472010-11-20 23:11:37 -0500742#define lpfc_mq_doorbell_id_MASK 0xFFFF
James Smartda0436e2009-05-22 14:51:39 -0400743#define lpfc_mq_doorbell_id_WORD word0
744
745struct lpfc_sli4_cfg_mhdr {
746 uint32_t word1;
747#define lpfc_mbox_hdr_emb_SHIFT 0
748#define lpfc_mbox_hdr_emb_MASK 0x00000001
749#define lpfc_mbox_hdr_emb_WORD word1
750#define lpfc_mbox_hdr_sge_cnt_SHIFT 3
751#define lpfc_mbox_hdr_sge_cnt_MASK 0x0000001F
752#define lpfc_mbox_hdr_sge_cnt_WORD word1
753 uint32_t payload_length;
754 uint32_t tag_lo;
755 uint32_t tag_hi;
756 uint32_t reserved5;
757};
758
759union lpfc_sli4_cfg_shdr {
760 struct {
761 uint32_t word6;
James Smart5a6f1332011-03-11 16:05:35 -0500762#define lpfc_mbox_hdr_opcode_SHIFT 0
763#define lpfc_mbox_hdr_opcode_MASK 0x000000FF
764#define lpfc_mbox_hdr_opcode_WORD word6
765#define lpfc_mbox_hdr_subsystem_SHIFT 8
766#define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
767#define lpfc_mbox_hdr_subsystem_WORD word6
768#define lpfc_mbox_hdr_port_number_SHIFT 16
769#define lpfc_mbox_hdr_port_number_MASK 0x000000FF
770#define lpfc_mbox_hdr_port_number_WORD word6
771#define lpfc_mbox_hdr_domain_SHIFT 24
772#define lpfc_mbox_hdr_domain_MASK 0x000000FF
773#define lpfc_mbox_hdr_domain_WORD word6
James Smartda0436e2009-05-22 14:51:39 -0400774 uint32_t timeout;
775 uint32_t request_length;
James Smart5a6f1332011-03-11 16:05:35 -0500776 uint32_t word9;
777#define lpfc_mbox_hdr_version_SHIFT 0
778#define lpfc_mbox_hdr_version_MASK 0x000000FF
779#define lpfc_mbox_hdr_version_WORD word9
James Smart912e3ac2011-05-24 11:42:11 -0400780#define lpfc_mbox_hdr_pf_num_SHIFT 16
781#define lpfc_mbox_hdr_pf_num_MASK 0x000000FF
782#define lpfc_mbox_hdr_pf_num_WORD word9
783#define lpfc_mbox_hdr_vh_num_SHIFT 24
784#define lpfc_mbox_hdr_vh_num_MASK 0x000000FF
785#define lpfc_mbox_hdr_vh_num_WORD word9
James Smart5a6f1332011-03-11 16:05:35 -0500786#define LPFC_Q_CREATE_VERSION_2 2
787#define LPFC_Q_CREATE_VERSION_1 1
788#define LPFC_Q_CREATE_VERSION_0 0
James Smartda0436e2009-05-22 14:51:39 -0400789 } request;
790 struct {
791 uint32_t word6;
792#define lpfc_mbox_hdr_opcode_SHIFT 0
793#define lpfc_mbox_hdr_opcode_MASK 0x000000FF
794#define lpfc_mbox_hdr_opcode_WORD word6
795#define lpfc_mbox_hdr_subsystem_SHIFT 8
796#define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
797#define lpfc_mbox_hdr_subsystem_WORD word6
798#define lpfc_mbox_hdr_domain_SHIFT 24
799#define lpfc_mbox_hdr_domain_MASK 0x000000FF
800#define lpfc_mbox_hdr_domain_WORD word6
801 uint32_t word7;
802#define lpfc_mbox_hdr_status_SHIFT 0
803#define lpfc_mbox_hdr_status_MASK 0x000000FF
804#define lpfc_mbox_hdr_status_WORD word7
805#define lpfc_mbox_hdr_add_status_SHIFT 8
806#define lpfc_mbox_hdr_add_status_MASK 0x000000FF
807#define lpfc_mbox_hdr_add_status_WORD word7
808 uint32_t response_length;
809 uint32_t actual_response_length;
810 } response;
811};
812
James Smart6d368e52011-05-24 11:44:12 -0400813/* Mailbox Header structures.
814 * struct mbox_header is defined for first generation SLI4_CFG mailbox
815 * calls deployed for BE-based ports.
816 *
817 * struct sli4_mbox_header is defined for second generation SLI4
818 * ports that don't deploy the SLI4_CFG mechanism.
819 */
James Smartda0436e2009-05-22 14:51:39 -0400820struct mbox_header {
821 struct lpfc_sli4_cfg_mhdr cfg_mhdr;
822 union lpfc_sli4_cfg_shdr cfg_shdr;
823};
824
James Smart6d368e52011-05-24 11:44:12 -0400825#define LPFC_EXTENT_LOCAL 0
826#define LPFC_TIMEOUT_DEFAULT 0
827#define LPFC_EXTENT_VERSION_DEFAULT 0
828
James Smartda0436e2009-05-22 14:51:39 -0400829/* Subsystem Definitions */
830#define LPFC_MBOX_SUBSYSTEM_COMMON 0x1
831#define LPFC_MBOX_SUBSYSTEM_FCOE 0xC
832
833/* Device Specific Definitions */
834
835/* The HOST ENDIAN defines are in Big Endian format. */
836#define HOST_ENDIAN_LOW_WORD0 0xFF3412FF
837#define HOST_ENDIAN_HIGH_WORD1 0xFF7856FF
838
839/* Common Opcodes */
840#define LPFC_MBOX_OPCODE_CQ_CREATE 0x0C
841#define LPFC_MBOX_OPCODE_EQ_CREATE 0x0D
842#define LPFC_MBOX_OPCODE_MQ_CREATE 0x15
843#define LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES 0x20
844#define LPFC_MBOX_OPCODE_NOP 0x21
845#define LPFC_MBOX_OPCODE_MQ_DESTROY 0x35
846#define LPFC_MBOX_OPCODE_CQ_DESTROY 0x36
847#define LPFC_MBOX_OPCODE_EQ_DESTROY 0x37
James Smart6669f9b2009-10-02 15:16:45 -0400848#define LPFC_MBOX_OPCODE_QUERY_FW_CFG 0x3A
James Smartda0436e2009-05-22 14:51:39 -0400849#define LPFC_MBOX_OPCODE_FUNCTION_RESET 0x3D
James Smartb19a0612010-04-06 14:48:51 -0400850#define LPFC_MBOX_OPCODE_MQ_CREATE_EXT 0x5A
James Smart6d368e52011-05-24 11:44:12 -0400851#define LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO 0x9A
852#define LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT 0x9B
853#define LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT 0x9C
854#define LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT 0x9D
James Smart912e3ac2011-05-24 11:42:11 -0400855#define LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG 0xA0
856#define LPFC_MBOX_OPCODE_GET_PROFILE_CONFIG 0xA4
James Smart52d52442011-05-24 11:42:45 -0400857#define LPFC_MBOX_OPCODE_WRITE_OBJECT 0xAC
James Smartfedd3b72011-02-16 12:39:24 -0500858#define LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS 0xB5
James Smartda0436e2009-05-22 14:51:39 -0400859
860/* FCoE Opcodes */
861#define LPFC_MBOX_OPCODE_FCOE_WQ_CREATE 0x01
862#define LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY 0x02
863#define LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES 0x03
864#define LPFC_MBOX_OPCODE_FCOE_REMOVE_SGL_PAGES 0x04
865#define LPFC_MBOX_OPCODE_FCOE_RQ_CREATE 0x05
866#define LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY 0x06
867#define LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE 0x08
868#define LPFC_MBOX_OPCODE_FCOE_ADD_FCF 0x09
869#define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF 0x0A
870#define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE 0x0B
James Smartecfd03c2010-02-12 14:41:27 -0500871#define LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF 0x10
James Smart7ad20aa2011-05-24 11:44:28 -0400872#define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_STATE 0x22
873#define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_LOOPBACK 0x23
James Smartda0436e2009-05-22 14:51:39 -0400874
875/* Mailbox command structures */
876struct eq_context {
877 uint32_t word0;
878#define lpfc_eq_context_size_SHIFT 31
879#define lpfc_eq_context_size_MASK 0x00000001
880#define lpfc_eq_context_size_WORD word0
881#define LPFC_EQE_SIZE_4 0x0
882#define LPFC_EQE_SIZE_16 0x1
883#define lpfc_eq_context_valid_SHIFT 29
884#define lpfc_eq_context_valid_MASK 0x00000001
885#define lpfc_eq_context_valid_WORD word0
886 uint32_t word1;
887#define lpfc_eq_context_count_SHIFT 26
888#define lpfc_eq_context_count_MASK 0x00000003
889#define lpfc_eq_context_count_WORD word1
890#define LPFC_EQ_CNT_256 0x0
891#define LPFC_EQ_CNT_512 0x1
892#define LPFC_EQ_CNT_1024 0x2
893#define LPFC_EQ_CNT_2048 0x3
894#define LPFC_EQ_CNT_4096 0x4
895 uint32_t word2;
896#define lpfc_eq_context_delay_multi_SHIFT 13
897#define lpfc_eq_context_delay_multi_MASK 0x000003FF
898#define lpfc_eq_context_delay_multi_WORD word2
899 uint32_t reserved3;
900};
901
902struct sgl_page_pairs {
903 uint32_t sgl_pg0_addr_lo;
904 uint32_t sgl_pg0_addr_hi;
905 uint32_t sgl_pg1_addr_lo;
906 uint32_t sgl_pg1_addr_hi;
907};
908
909struct lpfc_mbx_post_sgl_pages {
910 struct mbox_header header;
911 uint32_t word0;
912#define lpfc_post_sgl_pages_xri_SHIFT 0
913#define lpfc_post_sgl_pages_xri_MASK 0x0000FFFF
914#define lpfc_post_sgl_pages_xri_WORD word0
915#define lpfc_post_sgl_pages_xricnt_SHIFT 16
916#define lpfc_post_sgl_pages_xricnt_MASK 0x0000FFFF
917#define lpfc_post_sgl_pages_xricnt_WORD word0
918 struct sgl_page_pairs sgl_pg_pairs[1];
919};
920
921/* word0 of page-1 struct shares the same SHIFT/MASK/WORD defines as above */
922struct lpfc_mbx_post_uembed_sgl_page1 {
923 union lpfc_sli4_cfg_shdr cfg_shdr;
924 uint32_t word0;
925 struct sgl_page_pairs sgl_pg_pairs;
926};
927
928struct lpfc_mbx_sge {
929 uint32_t pa_lo;
930 uint32_t pa_hi;
931 uint32_t length;
932};
933
934struct lpfc_mbx_nembed_cmd {
935 struct lpfc_sli4_cfg_mhdr cfg_mhdr;
936#define LPFC_SLI4_MBX_SGE_MAX_PAGES 19
937 struct lpfc_mbx_sge sge[LPFC_SLI4_MBX_SGE_MAX_PAGES];
938};
939
940struct lpfc_mbx_nembed_sge_virt {
941 void *addr[LPFC_SLI4_MBX_SGE_MAX_PAGES];
942};
943
944struct lpfc_mbx_eq_create {
945 struct mbox_header header;
946 union {
947 struct {
948 uint32_t word0;
949#define lpfc_mbx_eq_create_num_pages_SHIFT 0
950#define lpfc_mbx_eq_create_num_pages_MASK 0x0000FFFF
951#define lpfc_mbx_eq_create_num_pages_WORD word0
952 struct eq_context context;
953 struct dma_address page[LPFC_MAX_EQ_PAGE];
954 } request;
955 struct {
956 uint32_t word0;
957#define lpfc_mbx_eq_create_q_id_SHIFT 0
958#define lpfc_mbx_eq_create_q_id_MASK 0x0000FFFF
959#define lpfc_mbx_eq_create_q_id_WORD word0
960 } response;
961 } u;
962};
963
964struct lpfc_mbx_eq_destroy {
965 struct mbox_header header;
966 union {
967 struct {
968 uint32_t word0;
969#define lpfc_mbx_eq_destroy_q_id_SHIFT 0
970#define lpfc_mbx_eq_destroy_q_id_MASK 0x0000FFFF
971#define lpfc_mbx_eq_destroy_q_id_WORD word0
972 } request;
973 struct {
974 uint32_t word0;
975 } response;
976 } u;
977};
978
979struct lpfc_mbx_nop {
980 struct mbox_header header;
981 uint32_t context[2];
982};
983
984struct cq_context {
985 uint32_t word0;
986#define lpfc_cq_context_event_SHIFT 31
987#define lpfc_cq_context_event_MASK 0x00000001
988#define lpfc_cq_context_event_WORD word0
989#define lpfc_cq_context_valid_SHIFT 29
990#define lpfc_cq_context_valid_MASK 0x00000001
991#define lpfc_cq_context_valid_WORD word0
992#define lpfc_cq_context_count_SHIFT 27
993#define lpfc_cq_context_count_MASK 0x00000003
994#define lpfc_cq_context_count_WORD word0
995#define LPFC_CQ_CNT_256 0x0
996#define LPFC_CQ_CNT_512 0x1
997#define LPFC_CQ_CNT_1024 0x2
998 uint32_t word1;
James Smart5a6f1332011-03-11 16:05:35 -0500999#define lpfc_cq_eq_id_SHIFT 22 /* Version 0 Only */
James Smartda0436e2009-05-22 14:51:39 -04001000#define lpfc_cq_eq_id_MASK 0x000000FF
1001#define lpfc_cq_eq_id_WORD word1
James Smart5a6f1332011-03-11 16:05:35 -05001002#define lpfc_cq_eq_id_2_SHIFT 0 /* Version 2 Only */
1003#define lpfc_cq_eq_id_2_MASK 0x0000FFFF
1004#define lpfc_cq_eq_id_2_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04001005 uint32_t reserved0;
1006 uint32_t reserved1;
1007};
1008
1009struct lpfc_mbx_cq_create {
1010 struct mbox_header header;
1011 union {
1012 struct {
1013 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001014#define lpfc_mbx_cq_create_page_size_SHIFT 16 /* Version 2 Only */
1015#define lpfc_mbx_cq_create_page_size_MASK 0x000000FF
1016#define lpfc_mbx_cq_create_page_size_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04001017#define lpfc_mbx_cq_create_num_pages_SHIFT 0
1018#define lpfc_mbx_cq_create_num_pages_MASK 0x0000FFFF
1019#define lpfc_mbx_cq_create_num_pages_WORD word0
1020 struct cq_context context;
1021 struct dma_address page[LPFC_MAX_CQ_PAGE];
1022 } request;
1023 struct {
1024 uint32_t word0;
1025#define lpfc_mbx_cq_create_q_id_SHIFT 0
1026#define lpfc_mbx_cq_create_q_id_MASK 0x0000FFFF
1027#define lpfc_mbx_cq_create_q_id_WORD word0
1028 } response;
1029 } u;
1030};
1031
1032struct lpfc_mbx_cq_destroy {
1033 struct mbox_header header;
1034 union {
1035 struct {
1036 uint32_t word0;
1037#define lpfc_mbx_cq_destroy_q_id_SHIFT 0
1038#define lpfc_mbx_cq_destroy_q_id_MASK 0x0000FFFF
1039#define lpfc_mbx_cq_destroy_q_id_WORD word0
1040 } request;
1041 struct {
1042 uint32_t word0;
1043 } response;
1044 } u;
1045};
1046
1047struct wq_context {
1048 uint32_t reserved0;
1049 uint32_t reserved1;
1050 uint32_t reserved2;
1051 uint32_t reserved3;
1052};
1053
1054struct lpfc_mbx_wq_create {
1055 struct mbox_header header;
1056 union {
James Smart5a6f1332011-03-11 16:05:35 -05001057 struct { /* Version 0 Request */
James Smartda0436e2009-05-22 14:51:39 -04001058 uint32_t word0;
1059#define lpfc_mbx_wq_create_num_pages_SHIFT 0
1060#define lpfc_mbx_wq_create_num_pages_MASK 0x0000FFFF
1061#define lpfc_mbx_wq_create_num_pages_WORD word0
1062#define lpfc_mbx_wq_create_cq_id_SHIFT 16
1063#define lpfc_mbx_wq_create_cq_id_MASK 0x0000FFFF
1064#define lpfc_mbx_wq_create_cq_id_WORD word0
1065 struct dma_address page[LPFC_MAX_WQ_PAGE];
1066 } request;
James Smart5a6f1332011-03-11 16:05:35 -05001067 struct { /* Version 1 Request */
1068 uint32_t word0; /* Word 0 is the same as in v0 */
1069 uint32_t word1;
1070#define lpfc_mbx_wq_create_page_size_SHIFT 0
1071#define lpfc_mbx_wq_create_page_size_MASK 0x000000FF
1072#define lpfc_mbx_wq_create_page_size_WORD word1
1073#define lpfc_mbx_wq_create_wqe_size_SHIFT 8
1074#define lpfc_mbx_wq_create_wqe_size_MASK 0x0000000F
1075#define lpfc_mbx_wq_create_wqe_size_WORD word1
1076#define LPFC_WQ_WQE_SIZE_64 0x5
1077#define LPFC_WQ_WQE_SIZE_128 0x6
1078#define lpfc_mbx_wq_create_wqe_count_SHIFT 16
1079#define lpfc_mbx_wq_create_wqe_count_MASK 0x0000FFFF
1080#define lpfc_mbx_wq_create_wqe_count_WORD word1
1081 uint32_t word2;
1082 struct dma_address page[LPFC_MAX_WQ_PAGE-1];
1083 } request_1;
James Smartda0436e2009-05-22 14:51:39 -04001084 struct {
1085 uint32_t word0;
1086#define lpfc_mbx_wq_create_q_id_SHIFT 0
1087#define lpfc_mbx_wq_create_q_id_MASK 0x0000FFFF
1088#define lpfc_mbx_wq_create_q_id_WORD word0
1089 } response;
1090 } u;
1091};
1092
1093struct lpfc_mbx_wq_destroy {
1094 struct mbox_header header;
1095 union {
1096 struct {
1097 uint32_t word0;
1098#define lpfc_mbx_wq_destroy_q_id_SHIFT 0
1099#define lpfc_mbx_wq_destroy_q_id_MASK 0x0000FFFF
1100#define lpfc_mbx_wq_destroy_q_id_WORD word0
1101 } request;
1102 struct {
1103 uint32_t word0;
1104 } response;
1105 } u;
1106};
1107
1108#define LPFC_HDR_BUF_SIZE 128
James Smarteeead812009-12-21 17:01:23 -05001109#define LPFC_DATA_BUF_SIZE 2048
James Smartda0436e2009-05-22 14:51:39 -04001110struct rq_context {
1111 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001112#define lpfc_rq_context_rqe_count_SHIFT 16 /* Version 0 Only */
1113#define lpfc_rq_context_rqe_count_MASK 0x0000000F
1114#define lpfc_rq_context_rqe_count_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04001115#define LPFC_RQ_RING_SIZE_512 9 /* 512 entries */
1116#define LPFC_RQ_RING_SIZE_1024 10 /* 1024 entries */
1117#define LPFC_RQ_RING_SIZE_2048 11 /* 2048 entries */
1118#define LPFC_RQ_RING_SIZE_4096 12 /* 4096 entries */
James Smart5a6f1332011-03-11 16:05:35 -05001119#define lpfc_rq_context_rqe_count_1_SHIFT 16 /* Version 1 Only */
1120#define lpfc_rq_context_rqe_count_1_MASK 0x0000FFFF
1121#define lpfc_rq_context_rqe_count_1_WORD word0
1122#define lpfc_rq_context_rqe_size_SHIFT 8 /* Version 1 Only */
1123#define lpfc_rq_context_rqe_size_MASK 0x0000000F
1124#define lpfc_rq_context_rqe_size_WORD word0
James Smartc31098c2011-04-16 11:03:33 -04001125#define LPFC_RQE_SIZE_8 2
1126#define LPFC_RQE_SIZE_16 3
1127#define LPFC_RQE_SIZE_32 4
1128#define LPFC_RQE_SIZE_64 5
1129#define LPFC_RQE_SIZE_128 6
James Smart5a6f1332011-03-11 16:05:35 -05001130#define lpfc_rq_context_page_size_SHIFT 0 /* Version 1 Only */
1131#define lpfc_rq_context_page_size_MASK 0x000000FF
1132#define lpfc_rq_context_page_size_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04001133 uint32_t reserved1;
1134 uint32_t word2;
1135#define lpfc_rq_context_cq_id_SHIFT 16
1136#define lpfc_rq_context_cq_id_MASK 0x000003FF
1137#define lpfc_rq_context_cq_id_WORD word2
1138#define lpfc_rq_context_buf_size_SHIFT 0
1139#define lpfc_rq_context_buf_size_MASK 0x0000FFFF
1140#define lpfc_rq_context_buf_size_WORD word2
James Smart5a6f1332011-03-11 16:05:35 -05001141 uint32_t buffer_size; /* Version 1 Only */
James Smartda0436e2009-05-22 14:51:39 -04001142};
1143
1144struct lpfc_mbx_rq_create {
1145 struct mbox_header header;
1146 union {
1147 struct {
1148 uint32_t word0;
1149#define lpfc_mbx_rq_create_num_pages_SHIFT 0
1150#define lpfc_mbx_rq_create_num_pages_MASK 0x0000FFFF
1151#define lpfc_mbx_rq_create_num_pages_WORD word0
1152 struct rq_context context;
1153 struct dma_address page[LPFC_MAX_WQ_PAGE];
1154 } request;
1155 struct {
1156 uint32_t word0;
1157#define lpfc_mbx_rq_create_q_id_SHIFT 0
1158#define lpfc_mbx_rq_create_q_id_MASK 0x0000FFFF
1159#define lpfc_mbx_rq_create_q_id_WORD word0
1160 } response;
1161 } u;
1162};
1163
1164struct lpfc_mbx_rq_destroy {
1165 struct mbox_header header;
1166 union {
1167 struct {
1168 uint32_t word0;
1169#define lpfc_mbx_rq_destroy_q_id_SHIFT 0
1170#define lpfc_mbx_rq_destroy_q_id_MASK 0x0000FFFF
1171#define lpfc_mbx_rq_destroy_q_id_WORD word0
1172 } request;
1173 struct {
1174 uint32_t word0;
1175 } response;
1176 } u;
1177};
1178
1179struct mq_context {
1180 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001181#define lpfc_mq_context_cq_id_SHIFT 22 /* Version 0 Only */
James Smartda0436e2009-05-22 14:51:39 -04001182#define lpfc_mq_context_cq_id_MASK 0x000003FF
1183#define lpfc_mq_context_cq_id_WORD word0
James Smart5a6f1332011-03-11 16:05:35 -05001184#define lpfc_mq_context_ring_size_SHIFT 16
1185#define lpfc_mq_context_ring_size_MASK 0x0000000F
1186#define lpfc_mq_context_ring_size_WORD word0
1187#define LPFC_MQ_RING_SIZE_16 0x5
1188#define LPFC_MQ_RING_SIZE_32 0x6
1189#define LPFC_MQ_RING_SIZE_64 0x7
1190#define LPFC_MQ_RING_SIZE_128 0x8
James Smartda0436e2009-05-22 14:51:39 -04001191 uint32_t word1;
1192#define lpfc_mq_context_valid_SHIFT 31
1193#define lpfc_mq_context_valid_MASK 0x00000001
1194#define lpfc_mq_context_valid_WORD word1
1195 uint32_t reserved2;
1196 uint32_t reserved3;
1197};
1198
1199struct lpfc_mbx_mq_create {
1200 struct mbox_header header;
1201 union {
1202 struct {
1203 uint32_t word0;
1204#define lpfc_mbx_mq_create_num_pages_SHIFT 0
1205#define lpfc_mbx_mq_create_num_pages_MASK 0x0000FFFF
1206#define lpfc_mbx_mq_create_num_pages_WORD word0
1207 struct mq_context context;
1208 struct dma_address page[LPFC_MAX_MQ_PAGE];
1209 } request;
1210 struct {
1211 uint32_t word0;
1212#define lpfc_mbx_mq_create_q_id_SHIFT 0
1213#define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
1214#define lpfc_mbx_mq_create_q_id_WORD word0
1215 } response;
1216 } u;
1217};
1218
James Smartb19a0612010-04-06 14:48:51 -04001219struct lpfc_mbx_mq_create_ext {
1220 struct mbox_header header;
1221 union {
1222 struct {
1223 uint32_t word0;
James Smart5a6f1332011-03-11 16:05:35 -05001224#define lpfc_mbx_mq_create_ext_num_pages_SHIFT 0
1225#define lpfc_mbx_mq_create_ext_num_pages_MASK 0x0000FFFF
1226#define lpfc_mbx_mq_create_ext_num_pages_WORD word0
1227#define lpfc_mbx_mq_create_ext_cq_id_SHIFT 16 /* Version 1 Only */
1228#define lpfc_mbx_mq_create_ext_cq_id_MASK 0x0000FFFF
1229#define lpfc_mbx_mq_create_ext_cq_id_WORD word0
James Smartb19a0612010-04-06 14:48:51 -04001230 uint32_t async_evt_bmap;
1231#define lpfc_mbx_mq_create_ext_async_evt_link_SHIFT LPFC_TRAILER_CODE_LINK
1232#define lpfc_mbx_mq_create_ext_async_evt_link_MASK 0x00000001
1233#define lpfc_mbx_mq_create_ext_async_evt_link_WORD async_evt_bmap
James Smart70f3c072010-12-15 17:57:33 -05001234#define lpfc_mbx_mq_create_ext_async_evt_fip_SHIFT LPFC_TRAILER_CODE_FCOE
1235#define lpfc_mbx_mq_create_ext_async_evt_fip_MASK 0x00000001
1236#define lpfc_mbx_mq_create_ext_async_evt_fip_WORD async_evt_bmap
James Smartb19a0612010-04-06 14:48:51 -04001237#define lpfc_mbx_mq_create_ext_async_evt_group5_SHIFT LPFC_TRAILER_CODE_GRP5
1238#define lpfc_mbx_mq_create_ext_async_evt_group5_MASK 0x00000001
1239#define lpfc_mbx_mq_create_ext_async_evt_group5_WORD async_evt_bmap
James Smart70f3c072010-12-15 17:57:33 -05001240#define lpfc_mbx_mq_create_ext_async_evt_fc_SHIFT LPFC_TRAILER_CODE_FC
1241#define lpfc_mbx_mq_create_ext_async_evt_fc_MASK 0x00000001
1242#define lpfc_mbx_mq_create_ext_async_evt_fc_WORD async_evt_bmap
1243#define lpfc_mbx_mq_create_ext_async_evt_sli_SHIFT LPFC_TRAILER_CODE_SLI
1244#define lpfc_mbx_mq_create_ext_async_evt_sli_MASK 0x00000001
1245#define lpfc_mbx_mq_create_ext_async_evt_sli_WORD async_evt_bmap
James Smartb19a0612010-04-06 14:48:51 -04001246 struct mq_context context;
1247 struct dma_address page[LPFC_MAX_MQ_PAGE];
1248 } request;
1249 struct {
1250 uint32_t word0;
1251#define lpfc_mbx_mq_create_q_id_SHIFT 0
1252#define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
1253#define lpfc_mbx_mq_create_q_id_WORD word0
1254 } response;
1255 } u;
1256#define LPFC_ASYNC_EVENT_LINK_STATE 0x2
1257#define LPFC_ASYNC_EVENT_FCF_STATE 0x4
1258#define LPFC_ASYNC_EVENT_GROUP5 0x20
1259};
1260
James Smartda0436e2009-05-22 14:51:39 -04001261struct lpfc_mbx_mq_destroy {
1262 struct mbox_header header;
1263 union {
1264 struct {
1265 uint32_t word0;
1266#define lpfc_mbx_mq_destroy_q_id_SHIFT 0
1267#define lpfc_mbx_mq_destroy_q_id_MASK 0x0000FFFF
1268#define lpfc_mbx_mq_destroy_q_id_WORD word0
1269 } request;
1270 struct {
1271 uint32_t word0;
1272 } response;
1273 } u;
1274};
1275
James Smart6d368e52011-05-24 11:44:12 -04001276/* Start Gen 2 SLI4 Mailbox definitions: */
1277
1278/* Define allocate-ready Gen 2 SLI4 FCoE Resource Extent Types. */
1279#define LPFC_RSC_TYPE_FCOE_VFI 0x20
1280#define LPFC_RSC_TYPE_FCOE_VPI 0x21
1281#define LPFC_RSC_TYPE_FCOE_RPI 0x22
1282#define LPFC_RSC_TYPE_FCOE_XRI 0x23
1283
1284struct lpfc_mbx_get_rsrc_extent_info {
1285 struct mbox_header header;
1286 union {
1287 struct {
1288 uint32_t word4;
1289#define lpfc_mbx_get_rsrc_extent_info_type_SHIFT 0
1290#define lpfc_mbx_get_rsrc_extent_info_type_MASK 0x0000FFFF
1291#define lpfc_mbx_get_rsrc_extent_info_type_WORD word4
1292 } req;
1293 struct {
1294 uint32_t word4;
1295#define lpfc_mbx_get_rsrc_extent_info_cnt_SHIFT 0
1296#define lpfc_mbx_get_rsrc_extent_info_cnt_MASK 0x0000FFFF
1297#define lpfc_mbx_get_rsrc_extent_info_cnt_WORD word4
1298#define lpfc_mbx_get_rsrc_extent_info_size_SHIFT 16
1299#define lpfc_mbx_get_rsrc_extent_info_size_MASK 0x0000FFFF
1300#define lpfc_mbx_get_rsrc_extent_info_size_WORD word4
1301 } rsp;
1302 } u;
1303};
1304
1305struct lpfc_id_range {
1306 uint32_t word5;
1307#define lpfc_mbx_rsrc_id_word4_0_SHIFT 0
1308#define lpfc_mbx_rsrc_id_word4_0_MASK 0x0000FFFF
1309#define lpfc_mbx_rsrc_id_word4_0_WORD word5
1310#define lpfc_mbx_rsrc_id_word4_1_SHIFT 16
1311#define lpfc_mbx_rsrc_id_word4_1_MASK 0x0000FFFF
1312#define lpfc_mbx_rsrc_id_word4_1_WORD word5
1313};
1314
James Smart7ad20aa2011-05-24 11:44:28 -04001315struct lpfc_mbx_set_link_diag_state {
1316 struct mbox_header header;
1317 union {
1318 struct {
1319 uint32_t word0;
1320#define lpfc_mbx_set_diag_state_diag_SHIFT 0
1321#define lpfc_mbx_set_diag_state_diag_MASK 0x00000001
1322#define lpfc_mbx_set_diag_state_diag_WORD word0
1323#define lpfc_mbx_set_diag_state_link_num_SHIFT 16
1324#define lpfc_mbx_set_diag_state_link_num_MASK 0x0000003F
1325#define lpfc_mbx_set_diag_state_link_num_WORD word0
1326#define lpfc_mbx_set_diag_state_link_type_SHIFT 22
1327#define lpfc_mbx_set_diag_state_link_type_MASK 0x00000003
1328#define lpfc_mbx_set_diag_state_link_type_WORD word0
1329 } req;
1330 struct {
1331 uint32_t word0;
1332 } rsp;
1333 } u;
1334};
1335
1336struct lpfc_mbx_set_link_diag_loopback {
1337 struct mbox_header header;
1338 union {
1339 struct {
1340 uint32_t word0;
1341#define lpfc_mbx_set_diag_lpbk_type_SHIFT 0
1342#define lpfc_mbx_set_diag_lpbk_type_MASK 0x00000001
1343#define lpfc_mbx_set_diag_lpbk_type_WORD word0
1344#define LPFC_DIAG_LOOPBACK_TYPE_DISABLE 0x0
1345#define LPFC_DIAG_LOOPBACK_TYPE_INTERNAL 0x1
1346#define LPFC_DIAG_LOOPBACK_TYPE_EXTERNAL 0x2
1347#define lpfc_mbx_set_diag_lpbk_link_num_SHIFT 16
1348#define lpfc_mbx_set_diag_lpbk_link_num_MASK 0x0000003F
1349#define lpfc_mbx_set_diag_lpbk_link_num_WORD word0
1350#define lpfc_mbx_set_diag_lpbk_link_type_SHIFT 22
1351#define lpfc_mbx_set_diag_lpbk_link_type_MASK 0x00000003
1352#define lpfc_mbx_set_diag_lpbk_link_type_WORD word0
1353 } req;
1354 struct {
1355 uint32_t word0;
1356 } rsp;
1357 } u;
1358};
1359
1360struct lpfc_mbx_run_link_diag_test {
1361 struct mbox_header header;
1362 union {
1363 struct {
1364 uint32_t word0;
1365#define lpfc_mbx_run_diag_test_link_num_SHIFT 16
1366#define lpfc_mbx_run_diag_test_link_num_MASK 0x0000003F
1367#define lpfc_mbx_run_diag_test_link_num_WORD word0
1368#define lpfc_mbx_run_diag_test_link_type_SHIFT 22
1369#define lpfc_mbx_run_diag_test_link_type_MASK 0x00000003
1370#define lpfc_mbx_run_diag_test_link_type_WORD word0
1371 uint32_t word1;
1372#define lpfc_mbx_run_diag_test_test_id_SHIFT 0
1373#define lpfc_mbx_run_diag_test_test_id_MASK 0x0000FFFF
1374#define lpfc_mbx_run_diag_test_test_id_WORD word1
1375#define lpfc_mbx_run_diag_test_loops_SHIFT 16
1376#define lpfc_mbx_run_diag_test_loops_MASK 0x0000FFFF
1377#define lpfc_mbx_run_diag_test_loops_WORD word1
1378 uint32_t word2;
1379#define lpfc_mbx_run_diag_test_test_ver_SHIFT 0
1380#define lpfc_mbx_run_diag_test_test_ver_MASK 0x0000FFFF
1381#define lpfc_mbx_run_diag_test_test_ver_WORD word2
1382#define lpfc_mbx_run_diag_test_err_act_SHIFT 16
1383#define lpfc_mbx_run_diag_test_err_act_MASK 0x000000FF
1384#define lpfc_mbx_run_diag_test_err_act_WORD word2
1385 } req;
1386 struct {
1387 uint32_t word0;
1388 } rsp;
1389 } u;
1390};
1391
James Smart6d368e52011-05-24 11:44:12 -04001392/*
1393 * struct lpfc_mbx_alloc_rsrc_extents:
1394 * A mbox is generically 256 bytes long. An SLI4_CONFIG mailbox requires
1395 * 6 words of header + 4 words of shared subcommand header +
1396 * 1 words of Extent-Opcode-specific header = 11 words or 44 bytes total.
1397 *
1398 * An embedded version of SLI4_CONFIG therefore has 256 - 44 = 212 bytes
1399 * for extents payload.
1400 *
1401 * 212/2 (bytes per extent) = 106 extents.
1402 * 106/2 (extents per word) = 53 words.
1403 * lpfc_id_range id is statically size to 53.
1404 *
1405 * This mailbox definition is used for ALLOC or GET_ALLOCATED
1406 * extent ranges. For ALLOC, the type and cnt are required.
1407 * For GET_ALLOCATED, only the type is required.
1408 */
1409struct lpfc_mbx_alloc_rsrc_extents {
1410 struct mbox_header header;
1411 union {
1412 struct {
1413 uint32_t word4;
1414#define lpfc_mbx_alloc_rsrc_extents_type_SHIFT 0
1415#define lpfc_mbx_alloc_rsrc_extents_type_MASK 0x0000FFFF
1416#define lpfc_mbx_alloc_rsrc_extents_type_WORD word4
1417#define lpfc_mbx_alloc_rsrc_extents_cnt_SHIFT 16
1418#define lpfc_mbx_alloc_rsrc_extents_cnt_MASK 0x0000FFFF
1419#define lpfc_mbx_alloc_rsrc_extents_cnt_WORD word4
1420 } req;
1421 struct {
1422 uint32_t word4;
1423#define lpfc_mbx_rsrc_cnt_SHIFT 0
1424#define lpfc_mbx_rsrc_cnt_MASK 0x0000FFFF
1425#define lpfc_mbx_rsrc_cnt_WORD word4
1426 struct lpfc_id_range id[53];
1427 } rsp;
1428 } u;
1429};
1430
1431/*
1432 * This is the non-embedded version of ALLOC or GET RSRC_EXTENTS. Word4 in this
1433 * structure shares the same SHIFT/MASK/WORD defines provided in the
1434 * mbx_alloc_rsrc_extents and mbx_get_alloc_rsrc_extents, word4, provided in
1435 * the structures defined above. This non-embedded structure provides for the
1436 * maximum number of extents supported by the port.
1437 */
1438struct lpfc_mbx_nembed_rsrc_extent {
1439 union lpfc_sli4_cfg_shdr cfg_shdr;
1440 uint32_t word4;
1441 struct lpfc_id_range id;
1442};
1443
1444struct lpfc_mbx_dealloc_rsrc_extents {
1445 struct mbox_header header;
1446 struct {
1447 uint32_t word4;
1448#define lpfc_mbx_dealloc_rsrc_extents_type_SHIFT 0
1449#define lpfc_mbx_dealloc_rsrc_extents_type_MASK 0x0000FFFF
1450#define lpfc_mbx_dealloc_rsrc_extents_type_WORD word4
1451 } req;
1452
1453};
1454
1455/* Start SLI4 FCoE specific mbox structures. */
1456
James Smartda0436e2009-05-22 14:51:39 -04001457struct lpfc_mbx_post_hdr_tmpl {
1458 struct mbox_header header;
1459 uint32_t word10;
1460#define lpfc_mbx_post_hdr_tmpl_rpi_offset_SHIFT 0
1461#define lpfc_mbx_post_hdr_tmpl_rpi_offset_MASK 0x0000FFFF
1462#define lpfc_mbx_post_hdr_tmpl_rpi_offset_WORD word10
1463#define lpfc_mbx_post_hdr_tmpl_page_cnt_SHIFT 16
1464#define lpfc_mbx_post_hdr_tmpl_page_cnt_MASK 0x0000FFFF
1465#define lpfc_mbx_post_hdr_tmpl_page_cnt_WORD word10
1466 uint32_t rpi_paddr_lo;
1467 uint32_t rpi_paddr_hi;
1468};
1469
1470struct sli4_sge { /* SLI-4 */
1471 uint32_t addr_hi;
1472 uint32_t addr_lo;
1473
1474 uint32_t word2;
1475#define lpfc_sli4_sge_offset_SHIFT 0 /* Offset of buffer - Not used*/
James Smart05580562011-05-24 11:40:48 -04001476#define lpfc_sli4_sge_offset_MASK 0x1FFFFFFF
James Smartda0436e2009-05-22 14:51:39 -04001477#define lpfc_sli4_sge_offset_WORD word2
1478#define lpfc_sli4_sge_last_SHIFT 31 /* Last SEG in the SGL sets
1479 this flag !! */
1480#define lpfc_sli4_sge_last_MASK 0x00000001
1481#define lpfc_sli4_sge_last_WORD word2
James Smart28baac72010-02-12 14:42:03 -05001482 uint32_t sge_len;
James Smartda0436e2009-05-22 14:51:39 -04001483};
1484
1485struct fcf_record {
1486 uint32_t max_rcv_size;
1487 uint32_t fka_adv_period;
1488 uint32_t fip_priority;
1489 uint32_t word3;
1490#define lpfc_fcf_record_mac_0_SHIFT 0
1491#define lpfc_fcf_record_mac_0_MASK 0x000000FF
1492#define lpfc_fcf_record_mac_0_WORD word3
1493#define lpfc_fcf_record_mac_1_SHIFT 8
1494#define lpfc_fcf_record_mac_1_MASK 0x000000FF
1495#define lpfc_fcf_record_mac_1_WORD word3
1496#define lpfc_fcf_record_mac_2_SHIFT 16
1497#define lpfc_fcf_record_mac_2_MASK 0x000000FF
1498#define lpfc_fcf_record_mac_2_WORD word3
1499#define lpfc_fcf_record_mac_3_SHIFT 24
1500#define lpfc_fcf_record_mac_3_MASK 0x000000FF
1501#define lpfc_fcf_record_mac_3_WORD word3
1502 uint32_t word4;
1503#define lpfc_fcf_record_mac_4_SHIFT 0
1504#define lpfc_fcf_record_mac_4_MASK 0x000000FF
1505#define lpfc_fcf_record_mac_4_WORD word4
1506#define lpfc_fcf_record_mac_5_SHIFT 8
1507#define lpfc_fcf_record_mac_5_MASK 0x000000FF
1508#define lpfc_fcf_record_mac_5_WORD word4
1509#define lpfc_fcf_record_fcf_avail_SHIFT 16
1510#define lpfc_fcf_record_fcf_avail_MASK 0x000000FF
James Smart0c287582009-06-10 17:22:56 -04001511#define lpfc_fcf_record_fcf_avail_WORD word4
James Smartda0436e2009-05-22 14:51:39 -04001512#define lpfc_fcf_record_mac_addr_prov_SHIFT 24
1513#define lpfc_fcf_record_mac_addr_prov_MASK 0x000000FF
1514#define lpfc_fcf_record_mac_addr_prov_WORD word4
1515#define LPFC_FCF_FPMA 1 /* Fabric Provided MAC Address */
1516#define LPFC_FCF_SPMA 2 /* Server Provided MAC Address */
1517 uint32_t word5;
1518#define lpfc_fcf_record_fab_name_0_SHIFT 0
1519#define lpfc_fcf_record_fab_name_0_MASK 0x000000FF
1520#define lpfc_fcf_record_fab_name_0_WORD word5
1521#define lpfc_fcf_record_fab_name_1_SHIFT 8
1522#define lpfc_fcf_record_fab_name_1_MASK 0x000000FF
1523#define lpfc_fcf_record_fab_name_1_WORD word5
1524#define lpfc_fcf_record_fab_name_2_SHIFT 16
1525#define lpfc_fcf_record_fab_name_2_MASK 0x000000FF
1526#define lpfc_fcf_record_fab_name_2_WORD word5
1527#define lpfc_fcf_record_fab_name_3_SHIFT 24
1528#define lpfc_fcf_record_fab_name_3_MASK 0x000000FF
1529#define lpfc_fcf_record_fab_name_3_WORD word5
1530 uint32_t word6;
1531#define lpfc_fcf_record_fab_name_4_SHIFT 0
1532#define lpfc_fcf_record_fab_name_4_MASK 0x000000FF
1533#define lpfc_fcf_record_fab_name_4_WORD word6
1534#define lpfc_fcf_record_fab_name_5_SHIFT 8
1535#define lpfc_fcf_record_fab_name_5_MASK 0x000000FF
1536#define lpfc_fcf_record_fab_name_5_WORD word6
1537#define lpfc_fcf_record_fab_name_6_SHIFT 16
1538#define lpfc_fcf_record_fab_name_6_MASK 0x000000FF
1539#define lpfc_fcf_record_fab_name_6_WORD word6
1540#define lpfc_fcf_record_fab_name_7_SHIFT 24
1541#define lpfc_fcf_record_fab_name_7_MASK 0x000000FF
1542#define lpfc_fcf_record_fab_name_7_WORD word6
1543 uint32_t word7;
1544#define lpfc_fcf_record_fc_map_0_SHIFT 0
1545#define lpfc_fcf_record_fc_map_0_MASK 0x000000FF
1546#define lpfc_fcf_record_fc_map_0_WORD word7
1547#define lpfc_fcf_record_fc_map_1_SHIFT 8
1548#define lpfc_fcf_record_fc_map_1_MASK 0x000000FF
1549#define lpfc_fcf_record_fc_map_1_WORD word7
1550#define lpfc_fcf_record_fc_map_2_SHIFT 16
1551#define lpfc_fcf_record_fc_map_2_MASK 0x000000FF
1552#define lpfc_fcf_record_fc_map_2_WORD word7
1553#define lpfc_fcf_record_fcf_valid_SHIFT 24
1554#define lpfc_fcf_record_fcf_valid_MASK 0x000000FF
1555#define lpfc_fcf_record_fcf_valid_WORD word7
1556 uint32_t word8;
1557#define lpfc_fcf_record_fcf_index_SHIFT 0
1558#define lpfc_fcf_record_fcf_index_MASK 0x0000FFFF
1559#define lpfc_fcf_record_fcf_index_WORD word8
1560#define lpfc_fcf_record_fcf_state_SHIFT 16
1561#define lpfc_fcf_record_fcf_state_MASK 0x0000FFFF
1562#define lpfc_fcf_record_fcf_state_WORD word8
1563 uint8_t vlan_bitmap[512];
James Smart8fa38512009-07-19 10:01:03 -04001564 uint32_t word137;
1565#define lpfc_fcf_record_switch_name_0_SHIFT 0
1566#define lpfc_fcf_record_switch_name_0_MASK 0x000000FF
1567#define lpfc_fcf_record_switch_name_0_WORD word137
1568#define lpfc_fcf_record_switch_name_1_SHIFT 8
1569#define lpfc_fcf_record_switch_name_1_MASK 0x000000FF
1570#define lpfc_fcf_record_switch_name_1_WORD word137
1571#define lpfc_fcf_record_switch_name_2_SHIFT 16
1572#define lpfc_fcf_record_switch_name_2_MASK 0x000000FF
1573#define lpfc_fcf_record_switch_name_2_WORD word137
1574#define lpfc_fcf_record_switch_name_3_SHIFT 24
1575#define lpfc_fcf_record_switch_name_3_MASK 0x000000FF
1576#define lpfc_fcf_record_switch_name_3_WORD word137
1577 uint32_t word138;
1578#define lpfc_fcf_record_switch_name_4_SHIFT 0
1579#define lpfc_fcf_record_switch_name_4_MASK 0x000000FF
1580#define lpfc_fcf_record_switch_name_4_WORD word138
1581#define lpfc_fcf_record_switch_name_5_SHIFT 8
1582#define lpfc_fcf_record_switch_name_5_MASK 0x000000FF
1583#define lpfc_fcf_record_switch_name_5_WORD word138
1584#define lpfc_fcf_record_switch_name_6_SHIFT 16
1585#define lpfc_fcf_record_switch_name_6_MASK 0x000000FF
1586#define lpfc_fcf_record_switch_name_6_WORD word138
1587#define lpfc_fcf_record_switch_name_7_SHIFT 24
1588#define lpfc_fcf_record_switch_name_7_MASK 0x000000FF
1589#define lpfc_fcf_record_switch_name_7_WORD word138
James Smartda0436e2009-05-22 14:51:39 -04001590};
1591
1592struct lpfc_mbx_read_fcf_tbl {
1593 union lpfc_sli4_cfg_shdr cfg_shdr;
1594 union {
1595 struct {
1596 uint32_t word10;
1597#define lpfc_mbx_read_fcf_tbl_indx_SHIFT 0
1598#define lpfc_mbx_read_fcf_tbl_indx_MASK 0x0000FFFF
1599#define lpfc_mbx_read_fcf_tbl_indx_WORD word10
1600 } request;
1601 struct {
1602 uint32_t eventag;
1603 } response;
1604 } u;
1605 uint32_t word11;
1606#define lpfc_mbx_read_fcf_tbl_nxt_vindx_SHIFT 0
1607#define lpfc_mbx_read_fcf_tbl_nxt_vindx_MASK 0x0000FFFF
1608#define lpfc_mbx_read_fcf_tbl_nxt_vindx_WORD word11
1609};
1610
1611struct lpfc_mbx_add_fcf_tbl_entry {
1612 union lpfc_sli4_cfg_shdr cfg_shdr;
1613 uint32_t word10;
1614#define lpfc_mbx_add_fcf_tbl_fcfi_SHIFT 0
1615#define lpfc_mbx_add_fcf_tbl_fcfi_MASK 0x0000FFFF
1616#define lpfc_mbx_add_fcf_tbl_fcfi_WORD word10
1617 struct lpfc_mbx_sge fcf_sge;
1618};
1619
1620struct lpfc_mbx_del_fcf_tbl_entry {
1621 struct mbox_header header;
1622 uint32_t word10;
1623#define lpfc_mbx_del_fcf_tbl_count_SHIFT 0
1624#define lpfc_mbx_del_fcf_tbl_count_MASK 0x0000FFFF
1625#define lpfc_mbx_del_fcf_tbl_count_WORD word10
1626#define lpfc_mbx_del_fcf_tbl_index_SHIFT 16
1627#define lpfc_mbx_del_fcf_tbl_index_MASK 0x0000FFFF
1628#define lpfc_mbx_del_fcf_tbl_index_WORD word10
1629};
1630
James Smartecfd03c2010-02-12 14:41:27 -05001631struct lpfc_mbx_redisc_fcf_tbl {
1632 struct mbox_header header;
1633 uint32_t word10;
1634#define lpfc_mbx_redisc_fcf_count_SHIFT 0
1635#define lpfc_mbx_redisc_fcf_count_MASK 0x0000FFFF
1636#define lpfc_mbx_redisc_fcf_count_WORD word10
1637 uint32_t resvd;
1638 uint32_t word12;
1639#define lpfc_mbx_redisc_fcf_index_SHIFT 0
1640#define lpfc_mbx_redisc_fcf_index_MASK 0x0000FFFF
1641#define lpfc_mbx_redisc_fcf_index_WORD word12
1642};
1643
James Smart6669f9b2009-10-02 15:16:45 -04001644struct lpfc_mbx_query_fw_cfg {
1645 struct mbox_header header;
1646 uint32_t config_number;
1647 uint32_t asic_rev;
1648 uint32_t phys_port;
1649 uint32_t function_mode;
1650/* firmware Function Mode */
1651#define lpfc_function_mode_toe_SHIFT 0
1652#define lpfc_function_mode_toe_MASK 0x00000001
1653#define lpfc_function_mode_toe_WORD function_mode
1654#define lpfc_function_mode_nic_SHIFT 1
1655#define lpfc_function_mode_nic_MASK 0x00000001
1656#define lpfc_function_mode_nic_WORD function_mode
1657#define lpfc_function_mode_rdma_SHIFT 2
1658#define lpfc_function_mode_rdma_MASK 0x00000001
1659#define lpfc_function_mode_rdma_WORD function_mode
1660#define lpfc_function_mode_vm_SHIFT 3
1661#define lpfc_function_mode_vm_MASK 0x00000001
1662#define lpfc_function_mode_vm_WORD function_mode
1663#define lpfc_function_mode_iscsi_i_SHIFT 4
1664#define lpfc_function_mode_iscsi_i_MASK 0x00000001
1665#define lpfc_function_mode_iscsi_i_WORD function_mode
1666#define lpfc_function_mode_iscsi_t_SHIFT 5
1667#define lpfc_function_mode_iscsi_t_MASK 0x00000001
1668#define lpfc_function_mode_iscsi_t_WORD function_mode
1669#define lpfc_function_mode_fcoe_i_SHIFT 6
1670#define lpfc_function_mode_fcoe_i_MASK 0x00000001
1671#define lpfc_function_mode_fcoe_i_WORD function_mode
1672#define lpfc_function_mode_fcoe_t_SHIFT 7
1673#define lpfc_function_mode_fcoe_t_MASK 0x00000001
1674#define lpfc_function_mode_fcoe_t_WORD function_mode
1675#define lpfc_function_mode_dal_SHIFT 8
1676#define lpfc_function_mode_dal_MASK 0x00000001
1677#define lpfc_function_mode_dal_WORD function_mode
1678#define lpfc_function_mode_lro_SHIFT 9
1679#define lpfc_function_mode_lro_MASK 0x00000001
James Smart70f3c072010-12-15 17:57:33 -05001680#define lpfc_function_mode_lro_WORD function_mode
James Smart6669f9b2009-10-02 15:16:45 -04001681#define lpfc_function_mode_flex10_SHIFT 10
1682#define lpfc_function_mode_flex10_MASK 0x00000001
1683#define lpfc_function_mode_flex10_WORD function_mode
1684#define lpfc_function_mode_ncsi_SHIFT 11
1685#define lpfc_function_mode_ncsi_MASK 0x00000001
1686#define lpfc_function_mode_ncsi_WORD function_mode
1687};
1688
James Smartda0436e2009-05-22 14:51:39 -04001689/* Status field for embedded SLI_CONFIG mailbox command */
1690#define STATUS_SUCCESS 0x0
1691#define STATUS_FAILED 0x1
1692#define STATUS_ILLEGAL_REQUEST 0x2
1693#define STATUS_ILLEGAL_FIELD 0x3
1694#define STATUS_INSUFFICIENT_BUFFER 0x4
1695#define STATUS_UNAUTHORIZED_REQUEST 0x5
1696#define STATUS_FLASHROM_SAVE_FAILED 0x17
1697#define STATUS_FLASHROM_RESTORE_FAILED 0x18
1698#define STATUS_ICCBINDEX_ALLOC_FAILED 0x1a
1699#define STATUS_IOCTLHANDLE_ALLOC_FAILED 0x1b
1700#define STATUS_INVALID_PHY_ADDR_FROM_OSM 0x1c
1701#define STATUS_INVALID_PHY_ADDR_LEN_FROM_OSM 0x1d
1702#define STATUS_ASSERT_FAILED 0x1e
1703#define STATUS_INVALID_SESSION 0x1f
1704#define STATUS_INVALID_CONNECTION 0x20
1705#define STATUS_BTL_PATH_EXCEEDS_OSM_LIMIT 0x21
1706#define STATUS_BTL_NO_FREE_SLOT_PATH 0x24
1707#define STATUS_BTL_NO_FREE_SLOT_TGTID 0x25
1708#define STATUS_OSM_DEVSLOT_NOT_FOUND 0x26
1709#define STATUS_FLASHROM_READ_FAILED 0x27
1710#define STATUS_POLL_IOCTL_TIMEOUT 0x28
1711#define STATUS_ERROR_ACITMAIN 0x2a
1712#define STATUS_REBOOT_REQUIRED 0x2c
1713#define STATUS_FCF_IN_USE 0x3a
James Smartdef9c7a2009-12-21 17:02:28 -05001714#define STATUS_FCF_TABLE_EMPTY 0x43
James Smartda0436e2009-05-22 14:51:39 -04001715
1716struct lpfc_mbx_sli4_config {
1717 struct mbox_header header;
1718};
1719
1720struct lpfc_mbx_init_vfi {
1721 uint32_t word1;
1722#define lpfc_init_vfi_vr_SHIFT 31
1723#define lpfc_init_vfi_vr_MASK 0x00000001
1724#define lpfc_init_vfi_vr_WORD word1
1725#define lpfc_init_vfi_vt_SHIFT 30
1726#define lpfc_init_vfi_vt_MASK 0x00000001
1727#define lpfc_init_vfi_vt_WORD word1
1728#define lpfc_init_vfi_vf_SHIFT 29
1729#define lpfc_init_vfi_vf_MASK 0x00000001
1730#define lpfc_init_vfi_vf_WORD word1
James Smart76a95d72010-11-20 23:11:48 -05001731#define lpfc_init_vfi_vp_SHIFT 28
1732#define lpfc_init_vfi_vp_MASK 0x00000001
1733#define lpfc_init_vfi_vp_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04001734#define lpfc_init_vfi_vfi_SHIFT 0
1735#define lpfc_init_vfi_vfi_MASK 0x0000FFFF
1736#define lpfc_init_vfi_vfi_WORD word1
1737 uint32_t word2;
James Smart76a95d72010-11-20 23:11:48 -05001738#define lpfc_init_vfi_vpi_SHIFT 16
1739#define lpfc_init_vfi_vpi_MASK 0x0000FFFF
1740#define lpfc_init_vfi_vpi_WORD word2
James Smartda0436e2009-05-22 14:51:39 -04001741#define lpfc_init_vfi_fcfi_SHIFT 0
1742#define lpfc_init_vfi_fcfi_MASK 0x0000FFFF
1743#define lpfc_init_vfi_fcfi_WORD word2
1744 uint32_t word3;
1745#define lpfc_init_vfi_pri_SHIFT 13
1746#define lpfc_init_vfi_pri_MASK 0x00000007
1747#define lpfc_init_vfi_pri_WORD word3
1748#define lpfc_init_vfi_vf_id_SHIFT 1
1749#define lpfc_init_vfi_vf_id_MASK 0x00000FFF
1750#define lpfc_init_vfi_vf_id_WORD word3
1751 uint32_t word4;
1752#define lpfc_init_vfi_hop_count_SHIFT 24
1753#define lpfc_init_vfi_hop_count_MASK 0x000000FF
1754#define lpfc_init_vfi_hop_count_WORD word4
1755};
1756
1757struct lpfc_mbx_reg_vfi {
1758 uint32_t word1;
1759#define lpfc_reg_vfi_vp_SHIFT 28
1760#define lpfc_reg_vfi_vp_MASK 0x00000001
1761#define lpfc_reg_vfi_vp_WORD word1
1762#define lpfc_reg_vfi_vfi_SHIFT 0
1763#define lpfc_reg_vfi_vfi_MASK 0x0000FFFF
1764#define lpfc_reg_vfi_vfi_WORD word1
1765 uint32_t word2;
1766#define lpfc_reg_vfi_vpi_SHIFT 16
1767#define lpfc_reg_vfi_vpi_MASK 0x0000FFFF
1768#define lpfc_reg_vfi_vpi_WORD word2
1769#define lpfc_reg_vfi_fcfi_SHIFT 0
1770#define lpfc_reg_vfi_fcfi_MASK 0x0000FFFF
1771#define lpfc_reg_vfi_fcfi_WORD word2
James Smartc8685952009-11-18 15:39:16 -05001772 uint32_t wwn[2];
James Smartda0436e2009-05-22 14:51:39 -04001773 struct ulp_bde64 bde;
James Smartb19a0612010-04-06 14:48:51 -04001774 uint32_t e_d_tov;
1775 uint32_t r_a_tov;
James Smartda0436e2009-05-22 14:51:39 -04001776 uint32_t word10;
1777#define lpfc_reg_vfi_nport_id_SHIFT 0
1778#define lpfc_reg_vfi_nport_id_MASK 0x00FFFFFF
1779#define lpfc_reg_vfi_nport_id_WORD word10
1780};
1781
1782struct lpfc_mbx_init_vpi {
1783 uint32_t word1;
1784#define lpfc_init_vpi_vfi_SHIFT 16
1785#define lpfc_init_vpi_vfi_MASK 0x0000FFFF
1786#define lpfc_init_vpi_vfi_WORD word1
1787#define lpfc_init_vpi_vpi_SHIFT 0
1788#define lpfc_init_vpi_vpi_MASK 0x0000FFFF
1789#define lpfc_init_vpi_vpi_WORD word1
1790};
1791
1792struct lpfc_mbx_read_vpi {
1793 uint32_t word1_rsvd;
1794 uint32_t word2;
1795#define lpfc_mbx_read_vpi_vnportid_SHIFT 0
1796#define lpfc_mbx_read_vpi_vnportid_MASK 0x00FFFFFF
1797#define lpfc_mbx_read_vpi_vnportid_WORD word2
1798 uint32_t word3_rsvd;
1799 uint32_t word4;
1800#define lpfc_mbx_read_vpi_acq_alpa_SHIFT 0
1801#define lpfc_mbx_read_vpi_acq_alpa_MASK 0x000000FF
1802#define lpfc_mbx_read_vpi_acq_alpa_WORD word4
1803#define lpfc_mbx_read_vpi_pb_SHIFT 15
1804#define lpfc_mbx_read_vpi_pb_MASK 0x00000001
1805#define lpfc_mbx_read_vpi_pb_WORD word4
1806#define lpfc_mbx_read_vpi_spec_alpa_SHIFT 16
1807#define lpfc_mbx_read_vpi_spec_alpa_MASK 0x000000FF
1808#define lpfc_mbx_read_vpi_spec_alpa_WORD word4
1809#define lpfc_mbx_read_vpi_ns_SHIFT 30
1810#define lpfc_mbx_read_vpi_ns_MASK 0x00000001
1811#define lpfc_mbx_read_vpi_ns_WORD word4
1812#define lpfc_mbx_read_vpi_hl_SHIFT 31
1813#define lpfc_mbx_read_vpi_hl_MASK 0x00000001
1814#define lpfc_mbx_read_vpi_hl_WORD word4
1815 uint32_t word5_rsvd;
1816 uint32_t word6;
1817#define lpfc_mbx_read_vpi_vpi_SHIFT 0
1818#define lpfc_mbx_read_vpi_vpi_MASK 0x0000FFFF
1819#define lpfc_mbx_read_vpi_vpi_WORD word6
1820 uint32_t word7;
1821#define lpfc_mbx_read_vpi_mac_0_SHIFT 0
1822#define lpfc_mbx_read_vpi_mac_0_MASK 0x000000FF
1823#define lpfc_mbx_read_vpi_mac_0_WORD word7
1824#define lpfc_mbx_read_vpi_mac_1_SHIFT 8
1825#define lpfc_mbx_read_vpi_mac_1_MASK 0x000000FF
1826#define lpfc_mbx_read_vpi_mac_1_WORD word7
1827#define lpfc_mbx_read_vpi_mac_2_SHIFT 16
1828#define lpfc_mbx_read_vpi_mac_2_MASK 0x000000FF
1829#define lpfc_mbx_read_vpi_mac_2_WORD word7
1830#define lpfc_mbx_read_vpi_mac_3_SHIFT 24
1831#define lpfc_mbx_read_vpi_mac_3_MASK 0x000000FF
1832#define lpfc_mbx_read_vpi_mac_3_WORD word7
1833 uint32_t word8;
1834#define lpfc_mbx_read_vpi_mac_4_SHIFT 0
1835#define lpfc_mbx_read_vpi_mac_4_MASK 0x000000FF
1836#define lpfc_mbx_read_vpi_mac_4_WORD word8
1837#define lpfc_mbx_read_vpi_mac_5_SHIFT 8
1838#define lpfc_mbx_read_vpi_mac_5_MASK 0x000000FF
1839#define lpfc_mbx_read_vpi_mac_5_WORD word8
1840#define lpfc_mbx_read_vpi_vlan_tag_SHIFT 16
1841#define lpfc_mbx_read_vpi_vlan_tag_MASK 0x00000FFF
1842#define lpfc_mbx_read_vpi_vlan_tag_WORD word8
1843#define lpfc_mbx_read_vpi_vv_SHIFT 28
1844#define lpfc_mbx_read_vpi_vv_MASK 0x0000001
1845#define lpfc_mbx_read_vpi_vv_WORD word8
1846};
1847
1848struct lpfc_mbx_unreg_vfi {
1849 uint32_t word1_rsvd;
1850 uint32_t word2;
1851#define lpfc_unreg_vfi_vfi_SHIFT 0
1852#define lpfc_unreg_vfi_vfi_MASK 0x0000FFFF
1853#define lpfc_unreg_vfi_vfi_WORD word2
1854};
1855
1856struct lpfc_mbx_resume_rpi {
1857 uint32_t word1;
James Smart8fa38512009-07-19 10:01:03 -04001858#define lpfc_resume_rpi_index_SHIFT 0
1859#define lpfc_resume_rpi_index_MASK 0x0000FFFF
1860#define lpfc_resume_rpi_index_WORD word1
1861#define lpfc_resume_rpi_ii_SHIFT 30
1862#define lpfc_resume_rpi_ii_MASK 0x00000003
1863#define lpfc_resume_rpi_ii_WORD word1
1864#define RESUME_INDEX_RPI 0
1865#define RESUME_INDEX_VPI 1
1866#define RESUME_INDEX_VFI 2
1867#define RESUME_INDEX_FCFI 3
James Smartda0436e2009-05-22 14:51:39 -04001868 uint32_t event_tag;
James Smartda0436e2009-05-22 14:51:39 -04001869};
1870
1871#define REG_FCF_INVALID_QID 0xFFFF
1872struct lpfc_mbx_reg_fcfi {
1873 uint32_t word1;
1874#define lpfc_reg_fcfi_info_index_SHIFT 0
1875#define lpfc_reg_fcfi_info_index_MASK 0x0000FFFF
1876#define lpfc_reg_fcfi_info_index_WORD word1
1877#define lpfc_reg_fcfi_fcfi_SHIFT 16
1878#define lpfc_reg_fcfi_fcfi_MASK 0x0000FFFF
1879#define lpfc_reg_fcfi_fcfi_WORD word1
1880 uint32_t word2;
1881#define lpfc_reg_fcfi_rq_id1_SHIFT 0
1882#define lpfc_reg_fcfi_rq_id1_MASK 0x0000FFFF
1883#define lpfc_reg_fcfi_rq_id1_WORD word2
1884#define lpfc_reg_fcfi_rq_id0_SHIFT 16
1885#define lpfc_reg_fcfi_rq_id0_MASK 0x0000FFFF
1886#define lpfc_reg_fcfi_rq_id0_WORD word2
1887 uint32_t word3;
1888#define lpfc_reg_fcfi_rq_id3_SHIFT 0
1889#define lpfc_reg_fcfi_rq_id3_MASK 0x0000FFFF
1890#define lpfc_reg_fcfi_rq_id3_WORD word3
1891#define lpfc_reg_fcfi_rq_id2_SHIFT 16
1892#define lpfc_reg_fcfi_rq_id2_MASK 0x0000FFFF
1893#define lpfc_reg_fcfi_rq_id2_WORD word3
1894 uint32_t word4;
1895#define lpfc_reg_fcfi_type_match0_SHIFT 24
1896#define lpfc_reg_fcfi_type_match0_MASK 0x000000FF
1897#define lpfc_reg_fcfi_type_match0_WORD word4
1898#define lpfc_reg_fcfi_type_mask0_SHIFT 16
1899#define lpfc_reg_fcfi_type_mask0_MASK 0x000000FF
1900#define lpfc_reg_fcfi_type_mask0_WORD word4
1901#define lpfc_reg_fcfi_rctl_match0_SHIFT 8
1902#define lpfc_reg_fcfi_rctl_match0_MASK 0x000000FF
1903#define lpfc_reg_fcfi_rctl_match0_WORD word4
1904#define lpfc_reg_fcfi_rctl_mask0_SHIFT 0
1905#define lpfc_reg_fcfi_rctl_mask0_MASK 0x000000FF
1906#define lpfc_reg_fcfi_rctl_mask0_WORD word4
1907 uint32_t word5;
1908#define lpfc_reg_fcfi_type_match1_SHIFT 24
1909#define lpfc_reg_fcfi_type_match1_MASK 0x000000FF
1910#define lpfc_reg_fcfi_type_match1_WORD word5
1911#define lpfc_reg_fcfi_type_mask1_SHIFT 16
1912#define lpfc_reg_fcfi_type_mask1_MASK 0x000000FF
1913#define lpfc_reg_fcfi_type_mask1_WORD word5
1914#define lpfc_reg_fcfi_rctl_match1_SHIFT 8
1915#define lpfc_reg_fcfi_rctl_match1_MASK 0x000000FF
1916#define lpfc_reg_fcfi_rctl_match1_WORD word5
1917#define lpfc_reg_fcfi_rctl_mask1_SHIFT 0
1918#define lpfc_reg_fcfi_rctl_mask1_MASK 0x000000FF
1919#define lpfc_reg_fcfi_rctl_mask1_WORD word5
1920 uint32_t word6;
1921#define lpfc_reg_fcfi_type_match2_SHIFT 24
1922#define lpfc_reg_fcfi_type_match2_MASK 0x000000FF
1923#define lpfc_reg_fcfi_type_match2_WORD word6
1924#define lpfc_reg_fcfi_type_mask2_SHIFT 16
1925#define lpfc_reg_fcfi_type_mask2_MASK 0x000000FF
1926#define lpfc_reg_fcfi_type_mask2_WORD word6
1927#define lpfc_reg_fcfi_rctl_match2_SHIFT 8
1928#define lpfc_reg_fcfi_rctl_match2_MASK 0x000000FF
1929#define lpfc_reg_fcfi_rctl_match2_WORD word6
1930#define lpfc_reg_fcfi_rctl_mask2_SHIFT 0
1931#define lpfc_reg_fcfi_rctl_mask2_MASK 0x000000FF
1932#define lpfc_reg_fcfi_rctl_mask2_WORD word6
1933 uint32_t word7;
1934#define lpfc_reg_fcfi_type_match3_SHIFT 24
1935#define lpfc_reg_fcfi_type_match3_MASK 0x000000FF
1936#define lpfc_reg_fcfi_type_match3_WORD word7
1937#define lpfc_reg_fcfi_type_mask3_SHIFT 16
1938#define lpfc_reg_fcfi_type_mask3_MASK 0x000000FF
1939#define lpfc_reg_fcfi_type_mask3_WORD word7
1940#define lpfc_reg_fcfi_rctl_match3_SHIFT 8
1941#define lpfc_reg_fcfi_rctl_match3_MASK 0x000000FF
1942#define lpfc_reg_fcfi_rctl_match3_WORD word7
1943#define lpfc_reg_fcfi_rctl_mask3_SHIFT 0
1944#define lpfc_reg_fcfi_rctl_mask3_MASK 0x000000FF
1945#define lpfc_reg_fcfi_rctl_mask3_WORD word7
1946 uint32_t word8;
1947#define lpfc_reg_fcfi_mam_SHIFT 13
1948#define lpfc_reg_fcfi_mam_MASK 0x00000003
1949#define lpfc_reg_fcfi_mam_WORD word8
1950#define LPFC_MAM_BOTH 0 /* Both SPMA and FPMA */
1951#define LPFC_MAM_SPMA 1 /* Server Provided MAC Address */
1952#define LPFC_MAM_FPMA 2 /* Fabric Provided MAC Address */
1953#define lpfc_reg_fcfi_vv_SHIFT 12
1954#define lpfc_reg_fcfi_vv_MASK 0x00000001
1955#define lpfc_reg_fcfi_vv_WORD word8
1956#define lpfc_reg_fcfi_vlan_tag_SHIFT 0
1957#define lpfc_reg_fcfi_vlan_tag_MASK 0x00000FFF
1958#define lpfc_reg_fcfi_vlan_tag_WORD word8
1959};
1960
1961struct lpfc_mbx_unreg_fcfi {
1962 uint32_t word1_rsv;
1963 uint32_t word2;
1964#define lpfc_unreg_fcfi_SHIFT 0
1965#define lpfc_unreg_fcfi_MASK 0x0000FFFF
1966#define lpfc_unreg_fcfi_WORD word2
1967};
1968
1969struct lpfc_mbx_read_rev {
1970 uint32_t word1;
1971#define lpfc_mbx_rd_rev_sli_lvl_SHIFT 16
1972#define lpfc_mbx_rd_rev_sli_lvl_MASK 0x0000000F
1973#define lpfc_mbx_rd_rev_sli_lvl_WORD word1
1974#define lpfc_mbx_rd_rev_fcoe_SHIFT 20
1975#define lpfc_mbx_rd_rev_fcoe_MASK 0x00000001
1976#define lpfc_mbx_rd_rev_fcoe_WORD word1
James Smart45ed1192009-10-02 15:17:02 -04001977#define lpfc_mbx_rd_rev_cee_ver_SHIFT 21
1978#define lpfc_mbx_rd_rev_cee_ver_MASK 0x00000003
1979#define lpfc_mbx_rd_rev_cee_ver_WORD word1
1980#define LPFC_PREDCBX_CEE_MODE 0
1981#define LPFC_DCBX_CEE_MODE 1
James Smartda0436e2009-05-22 14:51:39 -04001982#define lpfc_mbx_rd_rev_vpd_SHIFT 29
1983#define lpfc_mbx_rd_rev_vpd_MASK 0x00000001
1984#define lpfc_mbx_rd_rev_vpd_WORD word1
1985 uint32_t first_hw_rev;
1986 uint32_t second_hw_rev;
1987 uint32_t word4_rsvd;
1988 uint32_t third_hw_rev;
1989 uint32_t word6;
1990#define lpfc_mbx_rd_rev_fcph_low_SHIFT 0
1991#define lpfc_mbx_rd_rev_fcph_low_MASK 0x000000FF
1992#define lpfc_mbx_rd_rev_fcph_low_WORD word6
1993#define lpfc_mbx_rd_rev_fcph_high_SHIFT 8
1994#define lpfc_mbx_rd_rev_fcph_high_MASK 0x000000FF
1995#define lpfc_mbx_rd_rev_fcph_high_WORD word6
1996#define lpfc_mbx_rd_rev_ftr_lvl_low_SHIFT 16
1997#define lpfc_mbx_rd_rev_ftr_lvl_low_MASK 0x000000FF
1998#define lpfc_mbx_rd_rev_ftr_lvl_low_WORD word6
1999#define lpfc_mbx_rd_rev_ftr_lvl_high_SHIFT 24
2000#define lpfc_mbx_rd_rev_ftr_lvl_high_MASK 0x000000FF
2001#define lpfc_mbx_rd_rev_ftr_lvl_high_WORD word6
2002 uint32_t word7_rsvd;
2003 uint32_t fw_id_rev;
2004 uint8_t fw_name[16];
2005 uint32_t ulp_fw_id_rev;
2006 uint8_t ulp_fw_name[16];
2007 uint32_t word18_47_rsvd[30];
2008 uint32_t word48;
2009#define lpfc_mbx_rd_rev_avail_len_SHIFT 0
2010#define lpfc_mbx_rd_rev_avail_len_MASK 0x00FFFFFF
2011#define lpfc_mbx_rd_rev_avail_len_WORD word48
2012 uint32_t vpd_paddr_low;
2013 uint32_t vpd_paddr_high;
2014 uint32_t avail_vpd_len;
2015 uint32_t rsvd_52_63[12];
2016};
2017
2018struct lpfc_mbx_read_config {
2019 uint32_t word1;
James Smart6d368e52011-05-24 11:44:12 -04002020#define lpfc_mbx_rd_conf_extnts_inuse_SHIFT 31
2021#define lpfc_mbx_rd_conf_extnts_inuse_MASK 0x00000001
2022#define lpfc_mbx_rd_conf_extnts_inuse_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04002023 uint32_t word2;
James Smartda0436e2009-05-22 14:51:39 -04002024#define lpfc_mbx_rd_conf_topology_SHIFT 24
2025#define lpfc_mbx_rd_conf_topology_MASK 0x000000FF
2026#define lpfc_mbx_rd_conf_topology_WORD word2
James Smart6d368e52011-05-24 11:44:12 -04002027 uint32_t rsvd_3;
James Smartda0436e2009-05-22 14:51:39 -04002028 uint32_t word4;
2029#define lpfc_mbx_rd_conf_e_d_tov_SHIFT 0
2030#define lpfc_mbx_rd_conf_e_d_tov_MASK 0x0000FFFF
2031#define lpfc_mbx_rd_conf_e_d_tov_WORD word4
James Smart6d368e52011-05-24 11:44:12 -04002032 uint32_t rsvd_5;
James Smartda0436e2009-05-22 14:51:39 -04002033 uint32_t word6;
2034#define lpfc_mbx_rd_conf_r_a_tov_SHIFT 0
2035#define lpfc_mbx_rd_conf_r_a_tov_MASK 0x0000FFFF
2036#define lpfc_mbx_rd_conf_r_a_tov_WORD word6
James Smart6d368e52011-05-24 11:44:12 -04002037 uint32_t rsvd_7;
2038 uint32_t rsvd_8;
James Smartda0436e2009-05-22 14:51:39 -04002039 uint32_t word9;
2040#define lpfc_mbx_rd_conf_lmt_SHIFT 0
2041#define lpfc_mbx_rd_conf_lmt_MASK 0x0000FFFF
2042#define lpfc_mbx_rd_conf_lmt_WORD word9
James Smart6d368e52011-05-24 11:44:12 -04002043 uint32_t rsvd_10;
2044 uint32_t rsvd_11;
James Smartda0436e2009-05-22 14:51:39 -04002045 uint32_t word12;
2046#define lpfc_mbx_rd_conf_xri_base_SHIFT 0
2047#define lpfc_mbx_rd_conf_xri_base_MASK 0x0000FFFF
2048#define lpfc_mbx_rd_conf_xri_base_WORD word12
2049#define lpfc_mbx_rd_conf_xri_count_SHIFT 16
2050#define lpfc_mbx_rd_conf_xri_count_MASK 0x0000FFFF
2051#define lpfc_mbx_rd_conf_xri_count_WORD word12
2052 uint32_t word13;
2053#define lpfc_mbx_rd_conf_rpi_base_SHIFT 0
2054#define lpfc_mbx_rd_conf_rpi_base_MASK 0x0000FFFF
2055#define lpfc_mbx_rd_conf_rpi_base_WORD word13
2056#define lpfc_mbx_rd_conf_rpi_count_SHIFT 16
2057#define lpfc_mbx_rd_conf_rpi_count_MASK 0x0000FFFF
2058#define lpfc_mbx_rd_conf_rpi_count_WORD word13
2059 uint32_t word14;
2060#define lpfc_mbx_rd_conf_vpi_base_SHIFT 0
2061#define lpfc_mbx_rd_conf_vpi_base_MASK 0x0000FFFF
2062#define lpfc_mbx_rd_conf_vpi_base_WORD word14
2063#define lpfc_mbx_rd_conf_vpi_count_SHIFT 16
2064#define lpfc_mbx_rd_conf_vpi_count_MASK 0x0000FFFF
2065#define lpfc_mbx_rd_conf_vpi_count_WORD word14
2066 uint32_t word15;
2067#define lpfc_mbx_rd_conf_vfi_base_SHIFT 0
2068#define lpfc_mbx_rd_conf_vfi_base_MASK 0x0000FFFF
2069#define lpfc_mbx_rd_conf_vfi_base_WORD word15
2070#define lpfc_mbx_rd_conf_vfi_count_SHIFT 16
2071#define lpfc_mbx_rd_conf_vfi_count_MASK 0x0000FFFF
2072#define lpfc_mbx_rd_conf_vfi_count_WORD word15
2073 uint32_t word16;
James Smartda0436e2009-05-22 14:51:39 -04002074#define lpfc_mbx_rd_conf_fcfi_count_SHIFT 16
2075#define lpfc_mbx_rd_conf_fcfi_count_MASK 0x0000FFFF
2076#define lpfc_mbx_rd_conf_fcfi_count_WORD word16
2077 uint32_t word17;
2078#define lpfc_mbx_rd_conf_rq_count_SHIFT 0
2079#define lpfc_mbx_rd_conf_rq_count_MASK 0x0000FFFF
2080#define lpfc_mbx_rd_conf_rq_count_WORD word17
2081#define lpfc_mbx_rd_conf_eq_count_SHIFT 16
2082#define lpfc_mbx_rd_conf_eq_count_MASK 0x0000FFFF
2083#define lpfc_mbx_rd_conf_eq_count_WORD word17
2084 uint32_t word18;
2085#define lpfc_mbx_rd_conf_wq_count_SHIFT 0
2086#define lpfc_mbx_rd_conf_wq_count_MASK 0x0000FFFF
2087#define lpfc_mbx_rd_conf_wq_count_WORD word18
2088#define lpfc_mbx_rd_conf_cq_count_SHIFT 16
2089#define lpfc_mbx_rd_conf_cq_count_MASK 0x0000FFFF
2090#define lpfc_mbx_rd_conf_cq_count_WORD word18
2091};
2092
2093struct lpfc_mbx_request_features {
2094 uint32_t word1;
2095#define lpfc_mbx_rq_ftr_qry_SHIFT 0
2096#define lpfc_mbx_rq_ftr_qry_MASK 0x00000001
2097#define lpfc_mbx_rq_ftr_qry_WORD word1
2098 uint32_t word2;
2099#define lpfc_mbx_rq_ftr_rq_iaab_SHIFT 0
2100#define lpfc_mbx_rq_ftr_rq_iaab_MASK 0x00000001
2101#define lpfc_mbx_rq_ftr_rq_iaab_WORD word2
2102#define lpfc_mbx_rq_ftr_rq_npiv_SHIFT 1
2103#define lpfc_mbx_rq_ftr_rq_npiv_MASK 0x00000001
2104#define lpfc_mbx_rq_ftr_rq_npiv_WORD word2
2105#define lpfc_mbx_rq_ftr_rq_dif_SHIFT 2
2106#define lpfc_mbx_rq_ftr_rq_dif_MASK 0x00000001
2107#define lpfc_mbx_rq_ftr_rq_dif_WORD word2
2108#define lpfc_mbx_rq_ftr_rq_vf_SHIFT 3
2109#define lpfc_mbx_rq_ftr_rq_vf_MASK 0x00000001
2110#define lpfc_mbx_rq_ftr_rq_vf_WORD word2
2111#define lpfc_mbx_rq_ftr_rq_fcpi_SHIFT 4
2112#define lpfc_mbx_rq_ftr_rq_fcpi_MASK 0x00000001
2113#define lpfc_mbx_rq_ftr_rq_fcpi_WORD word2
2114#define lpfc_mbx_rq_ftr_rq_fcpt_SHIFT 5
2115#define lpfc_mbx_rq_ftr_rq_fcpt_MASK 0x00000001
2116#define lpfc_mbx_rq_ftr_rq_fcpt_WORD word2
2117#define lpfc_mbx_rq_ftr_rq_fcpc_SHIFT 6
2118#define lpfc_mbx_rq_ftr_rq_fcpc_MASK 0x00000001
2119#define lpfc_mbx_rq_ftr_rq_fcpc_WORD word2
2120#define lpfc_mbx_rq_ftr_rq_ifip_SHIFT 7
2121#define lpfc_mbx_rq_ftr_rq_ifip_MASK 0x00000001
2122#define lpfc_mbx_rq_ftr_rq_ifip_WORD word2
James Smartfedd3b72011-02-16 12:39:24 -05002123#define lpfc_mbx_rq_ftr_rq_perfh_SHIFT 11
2124#define lpfc_mbx_rq_ftr_rq_perfh_MASK 0x00000001
2125#define lpfc_mbx_rq_ftr_rq_perfh_WORD word2
James Smartda0436e2009-05-22 14:51:39 -04002126 uint32_t word3;
2127#define lpfc_mbx_rq_ftr_rsp_iaab_SHIFT 0
2128#define lpfc_mbx_rq_ftr_rsp_iaab_MASK 0x00000001
2129#define lpfc_mbx_rq_ftr_rsp_iaab_WORD word3
2130#define lpfc_mbx_rq_ftr_rsp_npiv_SHIFT 1
2131#define lpfc_mbx_rq_ftr_rsp_npiv_MASK 0x00000001
2132#define lpfc_mbx_rq_ftr_rsp_npiv_WORD word3
2133#define lpfc_mbx_rq_ftr_rsp_dif_SHIFT 2
2134#define lpfc_mbx_rq_ftr_rsp_dif_MASK 0x00000001
2135#define lpfc_mbx_rq_ftr_rsp_dif_WORD word3
2136#define lpfc_mbx_rq_ftr_rsp_vf_SHIFT 3
2137#define lpfc_mbx_rq_ftr_rsp_vf__MASK 0x00000001
2138#define lpfc_mbx_rq_ftr_rsp_vf_WORD word3
2139#define lpfc_mbx_rq_ftr_rsp_fcpi_SHIFT 4
2140#define lpfc_mbx_rq_ftr_rsp_fcpi_MASK 0x00000001
2141#define lpfc_mbx_rq_ftr_rsp_fcpi_WORD word3
2142#define lpfc_mbx_rq_ftr_rsp_fcpt_SHIFT 5
2143#define lpfc_mbx_rq_ftr_rsp_fcpt_MASK 0x00000001
2144#define lpfc_mbx_rq_ftr_rsp_fcpt_WORD word3
2145#define lpfc_mbx_rq_ftr_rsp_fcpc_SHIFT 6
2146#define lpfc_mbx_rq_ftr_rsp_fcpc_MASK 0x00000001
2147#define lpfc_mbx_rq_ftr_rsp_fcpc_WORD word3
2148#define lpfc_mbx_rq_ftr_rsp_ifip_SHIFT 7
2149#define lpfc_mbx_rq_ftr_rsp_ifip_MASK 0x00000001
2150#define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3
James Smartfedd3b72011-02-16 12:39:24 -05002151#define lpfc_mbx_rq_ftr_rsp_perfh_SHIFT 11
2152#define lpfc_mbx_rq_ftr_rsp_perfh_MASK 0x00000001
2153#define lpfc_mbx_rq_ftr_rsp_perfh_WORD word3
James Smartda0436e2009-05-22 14:51:39 -04002154};
2155
James Smart28baac72010-02-12 14:42:03 -05002156struct lpfc_mbx_supp_pages {
2157 uint32_t word1;
2158#define qs_SHIFT 0
2159#define qs_MASK 0x00000001
2160#define qs_WORD word1
2161#define wr_SHIFT 1
2162#define wr_MASK 0x00000001
2163#define wr_WORD word1
2164#define pf_SHIFT 8
2165#define pf_MASK 0x000000ff
2166#define pf_WORD word1
2167#define cpn_SHIFT 16
2168#define cpn_MASK 0x000000ff
2169#define cpn_WORD word1
2170 uint32_t word2;
2171#define list_offset_SHIFT 0
2172#define list_offset_MASK 0x000000ff
2173#define list_offset_WORD word2
2174#define next_offset_SHIFT 8
2175#define next_offset_MASK 0x000000ff
2176#define next_offset_WORD word2
2177#define elem_cnt_SHIFT 16
2178#define elem_cnt_MASK 0x000000ff
2179#define elem_cnt_WORD word2
2180 uint32_t word3;
2181#define pn_0_SHIFT 24
2182#define pn_0_MASK 0x000000ff
2183#define pn_0_WORD word3
2184#define pn_1_SHIFT 16
2185#define pn_1_MASK 0x000000ff
2186#define pn_1_WORD word3
2187#define pn_2_SHIFT 8
2188#define pn_2_MASK 0x000000ff
2189#define pn_2_WORD word3
2190#define pn_3_SHIFT 0
2191#define pn_3_MASK 0x000000ff
2192#define pn_3_WORD word3
2193 uint32_t word4;
2194#define pn_4_SHIFT 24
2195#define pn_4_MASK 0x000000ff
2196#define pn_4_WORD word4
2197#define pn_5_SHIFT 16
2198#define pn_5_MASK 0x000000ff
2199#define pn_5_WORD word4
2200#define pn_6_SHIFT 8
2201#define pn_6_MASK 0x000000ff
2202#define pn_6_WORD word4
2203#define pn_7_SHIFT 0
2204#define pn_7_MASK 0x000000ff
2205#define pn_7_WORD word4
2206 uint32_t rsvd[27];
2207#define LPFC_SUPP_PAGES 0
2208#define LPFC_BLOCK_GUARD_PROFILES 1
2209#define LPFC_SLI4_PARAMETERS 2
2210};
2211
James Smartfedd3b72011-02-16 12:39:24 -05002212struct lpfc_mbx_pc_sli4_params {
James Smart28baac72010-02-12 14:42:03 -05002213 uint32_t word1;
2214#define qs_SHIFT 0
2215#define qs_MASK 0x00000001
2216#define qs_WORD word1
2217#define wr_SHIFT 1
2218#define wr_MASK 0x00000001
2219#define wr_WORD word1
2220#define pf_SHIFT 8
2221#define pf_MASK 0x000000ff
2222#define pf_WORD word1
2223#define cpn_SHIFT 16
2224#define cpn_MASK 0x000000ff
2225#define cpn_WORD word1
2226 uint32_t word2;
2227#define if_type_SHIFT 0
2228#define if_type_MASK 0x00000007
2229#define if_type_WORD word2
2230#define sli_rev_SHIFT 4
2231#define sli_rev_MASK 0x0000000f
2232#define sli_rev_WORD word2
2233#define sli_family_SHIFT 8
2234#define sli_family_MASK 0x000000ff
2235#define sli_family_WORD word2
2236#define featurelevel_1_SHIFT 16
2237#define featurelevel_1_MASK 0x000000ff
2238#define featurelevel_1_WORD word2
2239#define featurelevel_2_SHIFT 24
2240#define featurelevel_2_MASK 0x0000001f
2241#define featurelevel_2_WORD word2
2242 uint32_t word3;
2243#define fcoe_SHIFT 0
2244#define fcoe_MASK 0x00000001
2245#define fcoe_WORD word3
2246#define fc_SHIFT 1
2247#define fc_MASK 0x00000001
2248#define fc_WORD word3
2249#define nic_SHIFT 2
2250#define nic_MASK 0x00000001
2251#define nic_WORD word3
2252#define iscsi_SHIFT 3
2253#define iscsi_MASK 0x00000001
2254#define iscsi_WORD word3
2255#define rdma_SHIFT 4
2256#define rdma_MASK 0x00000001
2257#define rdma_WORD word3
2258 uint32_t sge_supp_len;
James Smartcb5172e2010-03-15 11:25:07 -04002259#define SLI4_PAGE_SIZE 4096
James Smart28baac72010-02-12 14:42:03 -05002260 uint32_t word5;
2261#define if_page_sz_SHIFT 0
2262#define if_page_sz_MASK 0x0000ffff
2263#define if_page_sz_WORD word5
2264#define loopbk_scope_SHIFT 24
2265#define loopbk_scope_MASK 0x0000000f
2266#define loopbk_scope_WORD word5
2267#define rq_db_window_SHIFT 28
2268#define rq_db_window_MASK 0x0000000f
2269#define rq_db_window_WORD word5
2270 uint32_t word6;
2271#define eq_pages_SHIFT 0
2272#define eq_pages_MASK 0x0000000f
2273#define eq_pages_WORD word6
2274#define eqe_size_SHIFT 8
2275#define eqe_size_MASK 0x000000ff
2276#define eqe_size_WORD word6
2277 uint32_t word7;
2278#define cq_pages_SHIFT 0
2279#define cq_pages_MASK 0x0000000f
2280#define cq_pages_WORD word7
2281#define cqe_size_SHIFT 8
2282#define cqe_size_MASK 0x000000ff
2283#define cqe_size_WORD word7
2284 uint32_t word8;
2285#define mq_pages_SHIFT 0
2286#define mq_pages_MASK 0x0000000f
2287#define mq_pages_WORD word8
2288#define mqe_size_SHIFT 8
2289#define mqe_size_MASK 0x000000ff
2290#define mqe_size_WORD word8
2291#define mq_elem_cnt_SHIFT 16
2292#define mq_elem_cnt_MASK 0x000000ff
2293#define mq_elem_cnt_WORD word8
2294 uint32_t word9;
2295#define wq_pages_SHIFT 0
2296#define wq_pages_MASK 0x0000ffff
2297#define wq_pages_WORD word9
2298#define wqe_size_SHIFT 8
2299#define wqe_size_MASK 0x000000ff
2300#define wqe_size_WORD word9
2301 uint32_t word10;
2302#define rq_pages_SHIFT 0
2303#define rq_pages_MASK 0x0000ffff
2304#define rq_pages_WORD word10
2305#define rqe_size_SHIFT 8
2306#define rqe_size_MASK 0x000000ff
2307#define rqe_size_WORD word10
2308 uint32_t word11;
2309#define hdr_pages_SHIFT 0
2310#define hdr_pages_MASK 0x0000000f
2311#define hdr_pages_WORD word11
2312#define hdr_size_SHIFT 8
2313#define hdr_size_MASK 0x0000000f
2314#define hdr_size_WORD word11
2315#define hdr_pp_align_SHIFT 16
2316#define hdr_pp_align_MASK 0x0000ffff
2317#define hdr_pp_align_WORD word11
2318 uint32_t word12;
2319#define sgl_pages_SHIFT 0
2320#define sgl_pages_MASK 0x0000000f
2321#define sgl_pages_WORD word12
2322#define sgl_pp_align_SHIFT 16
2323#define sgl_pp_align_MASK 0x0000ffff
2324#define sgl_pp_align_WORD word12
2325 uint32_t rsvd_13_63[51];
2326};
James Smart9589b062011-04-16 11:03:17 -04002327#define SLI4_PAGE_ALIGN(addr) (((addr)+((SLI4_PAGE_SIZE)-1)) \
2328 &(~((SLI4_PAGE_SIZE)-1)))
James Smart28baac72010-02-12 14:42:03 -05002329
James Smartfedd3b72011-02-16 12:39:24 -05002330struct lpfc_sli4_parameters {
2331 uint32_t word0;
2332#define cfg_prot_type_SHIFT 0
2333#define cfg_prot_type_MASK 0x000000FF
2334#define cfg_prot_type_WORD word0
2335 uint32_t word1;
2336#define cfg_ft_SHIFT 0
2337#define cfg_ft_MASK 0x00000001
2338#define cfg_ft_WORD word1
2339#define cfg_sli_rev_SHIFT 4
2340#define cfg_sli_rev_MASK 0x0000000f
2341#define cfg_sli_rev_WORD word1
2342#define cfg_sli_family_SHIFT 8
2343#define cfg_sli_family_MASK 0x0000000f
2344#define cfg_sli_family_WORD word1
2345#define cfg_if_type_SHIFT 12
2346#define cfg_if_type_MASK 0x0000000f
2347#define cfg_if_type_WORD word1
2348#define cfg_sli_hint_1_SHIFT 16
2349#define cfg_sli_hint_1_MASK 0x000000ff
2350#define cfg_sli_hint_1_WORD word1
2351#define cfg_sli_hint_2_SHIFT 24
2352#define cfg_sli_hint_2_MASK 0x0000001f
2353#define cfg_sli_hint_2_WORD word1
2354 uint32_t word2;
2355 uint32_t word3;
2356 uint32_t word4;
2357#define cfg_cqv_SHIFT 14
2358#define cfg_cqv_MASK 0x00000003
2359#define cfg_cqv_WORD word4
2360 uint32_t word5;
2361 uint32_t word6;
2362#define cfg_mqv_SHIFT 14
2363#define cfg_mqv_MASK 0x00000003
2364#define cfg_mqv_WORD word6
2365 uint32_t word7;
2366 uint32_t word8;
2367#define cfg_wqv_SHIFT 14
2368#define cfg_wqv_MASK 0x00000003
2369#define cfg_wqv_WORD word8
2370 uint32_t word9;
2371 uint32_t word10;
2372#define cfg_rqv_SHIFT 14
2373#define cfg_rqv_MASK 0x00000003
2374#define cfg_rqv_WORD word10
2375 uint32_t word11;
2376#define cfg_rq_db_window_SHIFT 28
2377#define cfg_rq_db_window_MASK 0x0000000f
2378#define cfg_rq_db_window_WORD word11
2379 uint32_t word12;
2380#define cfg_fcoe_SHIFT 0
2381#define cfg_fcoe_MASK 0x00000001
2382#define cfg_fcoe_WORD word12
James Smart6d368e52011-05-24 11:44:12 -04002383#define cfg_ext_SHIFT 1
2384#define cfg_ext_MASK 0x00000001
2385#define cfg_ext_WORD word12
2386#define cfg_hdrr_SHIFT 2
2387#define cfg_hdrr_MASK 0x00000001
2388#define cfg_hdrr_WORD word12
James Smartfedd3b72011-02-16 12:39:24 -05002389#define cfg_phwq_SHIFT 15
2390#define cfg_phwq_MASK 0x00000001
2391#define cfg_phwq_WORD word12
2392#define cfg_loopbk_scope_SHIFT 28
2393#define cfg_loopbk_scope_MASK 0x0000000f
2394#define cfg_loopbk_scope_WORD word12
2395 uint32_t sge_supp_len;
2396 uint32_t word14;
2397#define cfg_sgl_page_cnt_SHIFT 0
2398#define cfg_sgl_page_cnt_MASK 0x0000000f
2399#define cfg_sgl_page_cnt_WORD word14
2400#define cfg_sgl_page_size_SHIFT 8
2401#define cfg_sgl_page_size_MASK 0x000000ff
2402#define cfg_sgl_page_size_WORD word14
2403#define cfg_sgl_pp_align_SHIFT 16
2404#define cfg_sgl_pp_align_MASK 0x000000ff
2405#define cfg_sgl_pp_align_WORD word14
2406 uint32_t word15;
2407 uint32_t word16;
2408 uint32_t word17;
2409 uint32_t word18;
2410 uint32_t word19;
2411};
2412
2413struct lpfc_mbx_get_sli4_parameters {
2414 struct mbox_header header;
2415 struct lpfc_sli4_parameters sli4_parameters;
2416};
2417
James Smart912e3ac2011-05-24 11:42:11 -04002418struct lpfc_rscr_desc_generic {
2419#define LPFC_RSRC_DESC_WSIZE 18
2420 uint32_t desc[LPFC_RSRC_DESC_WSIZE];
2421};
2422
2423struct lpfc_rsrc_desc_pcie {
2424 uint32_t word0;
2425#define lpfc_rsrc_desc_pcie_type_SHIFT 0
2426#define lpfc_rsrc_desc_pcie_type_MASK 0x000000ff
2427#define lpfc_rsrc_desc_pcie_type_WORD word0
2428#define LPFC_RSRC_DESC_TYPE_PCIE 0x40
2429 uint32_t word1;
2430#define lpfc_rsrc_desc_pcie_pfnum_SHIFT 0
2431#define lpfc_rsrc_desc_pcie_pfnum_MASK 0x000000ff
2432#define lpfc_rsrc_desc_pcie_pfnum_WORD word1
2433 uint32_t reserved;
2434 uint32_t word3;
2435#define lpfc_rsrc_desc_pcie_sriov_sta_SHIFT 0
2436#define lpfc_rsrc_desc_pcie_sriov_sta_MASK 0x000000ff
2437#define lpfc_rsrc_desc_pcie_sriov_sta_WORD word3
2438#define lpfc_rsrc_desc_pcie_pf_sta_SHIFT 8
2439#define lpfc_rsrc_desc_pcie_pf_sta_MASK 0x000000ff
2440#define lpfc_rsrc_desc_pcie_pf_sta_WORD word3
2441#define lpfc_rsrc_desc_pcie_pf_type_SHIFT 16
2442#define lpfc_rsrc_desc_pcie_pf_type_MASK 0x000000ff
2443#define lpfc_rsrc_desc_pcie_pf_type_WORD word3
2444 uint32_t word4;
2445#define lpfc_rsrc_desc_pcie_nr_virtfn_SHIFT 0
2446#define lpfc_rsrc_desc_pcie_nr_virtfn_MASK 0x0000ffff
2447#define lpfc_rsrc_desc_pcie_nr_virtfn_WORD word4
2448};
2449
2450struct lpfc_rsrc_desc_fcfcoe {
2451 uint32_t word0;
2452#define lpfc_rsrc_desc_fcfcoe_type_SHIFT 0
2453#define lpfc_rsrc_desc_fcfcoe_type_MASK 0x000000ff
2454#define lpfc_rsrc_desc_fcfcoe_type_WORD word0
2455#define LPFC_RSRC_DESC_TYPE_FCFCOE 0x43
2456 uint32_t word1;
2457#define lpfc_rsrc_desc_fcfcoe_vfnum_SHIFT 0
2458#define lpfc_rsrc_desc_fcfcoe_vfnum_MASK 0x000000ff
2459#define lpfc_rsrc_desc_fcfcoe_vfnum_WORD word1
2460#define lpfc_rsrc_desc_fcfcoe_pfnum_SHIFT 16
2461#define lpfc_rsrc_desc_fcfcoe_pfnum_MASK 0x000007ff
2462#define lpfc_rsrc_desc_fcfcoe_pfnum_WORD word1
2463 uint32_t word2;
2464#define lpfc_rsrc_desc_fcfcoe_rpi_cnt_SHIFT 0
2465#define lpfc_rsrc_desc_fcfcoe_rpi_cnt_MASK 0x0000ffff
2466#define lpfc_rsrc_desc_fcfcoe_rpi_cnt_WORD word2
2467#define lpfc_rsrc_desc_fcfcoe_xri_cnt_SHIFT 16
2468#define lpfc_rsrc_desc_fcfcoe_xri_cnt_MASK 0x0000ffff
2469#define lpfc_rsrc_desc_fcfcoe_xri_cnt_WORD word2
2470 uint32_t word3;
2471#define lpfc_rsrc_desc_fcfcoe_wq_cnt_SHIFT 0
2472#define lpfc_rsrc_desc_fcfcoe_wq_cnt_MASK 0x0000ffff
2473#define lpfc_rsrc_desc_fcfcoe_wq_cnt_WORD word3
2474#define lpfc_rsrc_desc_fcfcoe_rq_cnt_SHIFT 16
2475#define lpfc_rsrc_desc_fcfcoe_rq_cnt_MASK 0x0000ffff
2476#define lpfc_rsrc_desc_fcfcoe_rq_cnt_WORD word3
2477 uint32_t word4;
2478#define lpfc_rsrc_desc_fcfcoe_cq_cnt_SHIFT 0
2479#define lpfc_rsrc_desc_fcfcoe_cq_cnt_MASK 0x0000ffff
2480#define lpfc_rsrc_desc_fcfcoe_cq_cnt_WORD word4
2481#define lpfc_rsrc_desc_fcfcoe_vpi_cnt_SHIFT 16
2482#define lpfc_rsrc_desc_fcfcoe_vpi_cnt_MASK 0x0000ffff
2483#define lpfc_rsrc_desc_fcfcoe_vpi_cnt_WORD word4
2484 uint32_t word5;
2485#define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_SHIFT 0
2486#define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_MASK 0x0000ffff
2487#define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_WORD word5
2488#define lpfc_rsrc_desc_fcfcoe_vfi_cnt_SHIFT 16
2489#define lpfc_rsrc_desc_fcfcoe_vfi_cnt_MASK 0x0000ffff
2490#define lpfc_rsrc_desc_fcfcoe_vfi_cnt_WORD word5
2491 uint32_t word6;
2492 uint32_t word7;
2493 uint32_t word8;
2494 uint32_t word9;
2495 uint32_t word10;
2496 uint32_t word11;
2497 uint32_t word12;
2498 uint32_t word13;
2499#define lpfc_rsrc_desc_fcfcoe_lnk_nr_SHIFT 0
2500#define lpfc_rsrc_desc_fcfcoe_lnk_nr_MASK 0x0000003f
2501#define lpfc_rsrc_desc_fcfcoe_lnk_nr_WORD word13
2502#define lpfc_rsrc_desc_fcfcoe_lnk_tp_SHIFT 6
2503#define lpfc_rsrc_desc_fcfcoe_lnk_tp_MASK 0x00000003
2504#define lpfc_rsrc_desc_fcfcoe_lnk_tp_WORD word13
2505#define lpfc_rsrc_desc_fcfcoe_lmc_SHIFT 8
2506#define lpfc_rsrc_desc_fcfcoe_lmc_MASK 0x00000001
2507#define lpfc_rsrc_desc_fcfcoe_lmc_WORD word13
2508#define lpfc_rsrc_desc_fcfcoe_lld_SHIFT 9
2509#define lpfc_rsrc_desc_fcfcoe_lld_MASK 0x00000001
2510#define lpfc_rsrc_desc_fcfcoe_lld_WORD word13
2511#define lpfc_rsrc_desc_fcfcoe_eq_cnt_SHIFT 16
2512#define lpfc_rsrc_desc_fcfcoe_eq_cnt_MASK 0x0000ffff
2513#define lpfc_rsrc_desc_fcfcoe_eq_cnt_WORD word13
2514};
2515
2516struct lpfc_func_cfg {
2517#define LPFC_RSRC_DESC_MAX_NUM 2
2518 uint32_t rsrc_desc_count;
2519 struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
2520};
2521
2522struct lpfc_mbx_get_func_cfg {
2523 struct mbox_header header;
2524#define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
2525#define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
2526#define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
2527 struct lpfc_func_cfg func_cfg;
2528};
2529
2530struct lpfc_prof_cfg {
2531#define LPFC_RSRC_DESC_MAX_NUM 2
2532 uint32_t rsrc_desc_count;
2533 struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
2534};
2535
2536struct lpfc_mbx_get_prof_cfg {
2537 struct mbox_header header;
2538#define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
2539#define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
2540#define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
2541 union {
2542 struct {
2543 uint32_t word10;
2544#define lpfc_mbx_get_prof_cfg_prof_id_SHIFT 0
2545#define lpfc_mbx_get_prof_cfg_prof_id_MASK 0x000000ff
2546#define lpfc_mbx_get_prof_cfg_prof_id_WORD word10
2547#define lpfc_mbx_get_prof_cfg_prof_tp_SHIFT 8
2548#define lpfc_mbx_get_prof_cfg_prof_tp_MASK 0x00000003
2549#define lpfc_mbx_get_prof_cfg_prof_tp_WORD word10
2550 } request;
2551 struct {
2552 struct lpfc_prof_cfg prof_cfg;
2553 } response;
2554 } u;
2555};
2556
James Smartda0436e2009-05-22 14:51:39 -04002557/* Mailbox Completion Queue Error Messages */
2558#define MB_CQE_STATUS_SUCCESS 0x0
2559#define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1
2560#define MB_CQE_STATUS_INVALID_PARAMETER 0x2
2561#define MB_CQE_STATUS_INSUFFICIENT_RESOURCES 0x3
2562#define MB_CEQ_STATUS_QUEUE_FLUSHING 0x4
2563#define MB_CQE_STATUS_DMA_FAILED 0x5
2564
James Smart52d52442011-05-24 11:42:45 -04002565#define LPFC_MBX_WR_CONFIG_MAX_BDE 8
2566struct lpfc_mbx_wr_object {
2567 struct mbox_header header;
2568 union {
2569 struct {
2570 uint32_t word4;
2571#define lpfc_wr_object_eof_SHIFT 31
2572#define lpfc_wr_object_eof_MASK 0x00000001
2573#define lpfc_wr_object_eof_WORD word4
2574#define lpfc_wr_object_write_length_SHIFT 0
2575#define lpfc_wr_object_write_length_MASK 0x00FFFFFF
2576#define lpfc_wr_object_write_length_WORD word4
2577 uint32_t write_offset;
2578 uint32_t object_name[26];
2579 uint32_t bde_count;
2580 struct ulp_bde64 bde[LPFC_MBX_WR_CONFIG_MAX_BDE];
2581 } request;
2582 struct {
2583 uint32_t actual_write_length;
2584 } response;
2585 } u;
2586};
2587
James Smartda0436e2009-05-22 14:51:39 -04002588/* mailbox queue entry structure */
2589struct lpfc_mqe {
2590 uint32_t word0;
2591#define lpfc_mqe_status_SHIFT 16
2592#define lpfc_mqe_status_MASK 0x0000FFFF
2593#define lpfc_mqe_status_WORD word0
2594#define lpfc_mqe_command_SHIFT 8
2595#define lpfc_mqe_command_MASK 0x000000FF
2596#define lpfc_mqe_command_WORD word0
2597 union {
2598 uint32_t mb_words[LPFC_SLI4_MB_WORD_COUNT - 1];
2599 /* sli4 mailbox commands */
2600 struct lpfc_mbx_sli4_config sli4_config;
2601 struct lpfc_mbx_init_vfi init_vfi;
2602 struct lpfc_mbx_reg_vfi reg_vfi;
2603 struct lpfc_mbx_reg_vfi unreg_vfi;
2604 struct lpfc_mbx_init_vpi init_vpi;
2605 struct lpfc_mbx_resume_rpi resume_rpi;
2606 struct lpfc_mbx_read_fcf_tbl read_fcf_tbl;
2607 struct lpfc_mbx_add_fcf_tbl_entry add_fcf_entry;
2608 struct lpfc_mbx_del_fcf_tbl_entry del_fcf_entry;
James Smartecfd03c2010-02-12 14:41:27 -05002609 struct lpfc_mbx_redisc_fcf_tbl redisc_fcf_tbl;
James Smartda0436e2009-05-22 14:51:39 -04002610 struct lpfc_mbx_reg_fcfi reg_fcfi;
2611 struct lpfc_mbx_unreg_fcfi unreg_fcfi;
2612 struct lpfc_mbx_mq_create mq_create;
James Smartb19a0612010-04-06 14:48:51 -04002613 struct lpfc_mbx_mq_create_ext mq_create_ext;
James Smartda0436e2009-05-22 14:51:39 -04002614 struct lpfc_mbx_eq_create eq_create;
2615 struct lpfc_mbx_cq_create cq_create;
2616 struct lpfc_mbx_wq_create wq_create;
2617 struct lpfc_mbx_rq_create rq_create;
2618 struct lpfc_mbx_mq_destroy mq_destroy;
2619 struct lpfc_mbx_eq_destroy eq_destroy;
2620 struct lpfc_mbx_cq_destroy cq_destroy;
2621 struct lpfc_mbx_wq_destroy wq_destroy;
2622 struct lpfc_mbx_rq_destroy rq_destroy;
James Smart6d368e52011-05-24 11:44:12 -04002623 struct lpfc_mbx_get_rsrc_extent_info rsrc_extent_info;
2624 struct lpfc_mbx_alloc_rsrc_extents alloc_rsrc_extents;
2625 struct lpfc_mbx_dealloc_rsrc_extents dealloc_rsrc_extents;
James Smartda0436e2009-05-22 14:51:39 -04002626 struct lpfc_mbx_post_sgl_pages post_sgl_pages;
2627 struct lpfc_mbx_nembed_cmd nembed_cmd;
2628 struct lpfc_mbx_read_rev read_rev;
2629 struct lpfc_mbx_read_vpi read_vpi;
2630 struct lpfc_mbx_read_config rd_config;
2631 struct lpfc_mbx_request_features req_ftrs;
2632 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl;
James Smart6669f9b2009-10-02 15:16:45 -04002633 struct lpfc_mbx_query_fw_cfg query_fw_cfg;
James Smart28baac72010-02-12 14:42:03 -05002634 struct lpfc_mbx_supp_pages supp_pages;
James Smartfedd3b72011-02-16 12:39:24 -05002635 struct lpfc_mbx_pc_sli4_params sli4_params;
2636 struct lpfc_mbx_get_sli4_parameters get_sli4_parameters;
James Smart7ad20aa2011-05-24 11:44:28 -04002637 struct lpfc_mbx_set_link_diag_state link_diag_state;
2638 struct lpfc_mbx_set_link_diag_loopback link_diag_loopback;
2639 struct lpfc_mbx_run_link_diag_test link_diag_test;
James Smart912e3ac2011-05-24 11:42:11 -04002640 struct lpfc_mbx_get_func_cfg get_func_cfg;
2641 struct lpfc_mbx_get_prof_cfg get_prof_cfg;
James Smartda0436e2009-05-22 14:51:39 -04002642 struct lpfc_mbx_nop nop;
James Smart52d52442011-05-24 11:42:45 -04002643 struct lpfc_mbx_wr_object wr_object;
James Smartda0436e2009-05-22 14:51:39 -04002644 } un;
2645};
2646
2647struct lpfc_mcqe {
2648 uint32_t word0;
2649#define lpfc_mcqe_status_SHIFT 0
2650#define lpfc_mcqe_status_MASK 0x0000FFFF
2651#define lpfc_mcqe_status_WORD word0
2652#define lpfc_mcqe_ext_status_SHIFT 16
2653#define lpfc_mcqe_ext_status_MASK 0x0000FFFF
2654#define lpfc_mcqe_ext_status_WORD word0
2655 uint32_t mcqe_tag0;
2656 uint32_t mcqe_tag1;
2657 uint32_t trailer;
2658#define lpfc_trailer_valid_SHIFT 31
2659#define lpfc_trailer_valid_MASK 0x00000001
2660#define lpfc_trailer_valid_WORD trailer
2661#define lpfc_trailer_async_SHIFT 30
2662#define lpfc_trailer_async_MASK 0x00000001
2663#define lpfc_trailer_async_WORD trailer
2664#define lpfc_trailer_hpi_SHIFT 29
2665#define lpfc_trailer_hpi_MASK 0x00000001
2666#define lpfc_trailer_hpi_WORD trailer
2667#define lpfc_trailer_completed_SHIFT 28
2668#define lpfc_trailer_completed_MASK 0x00000001
2669#define lpfc_trailer_completed_WORD trailer
2670#define lpfc_trailer_consumed_SHIFT 27
2671#define lpfc_trailer_consumed_MASK 0x00000001
2672#define lpfc_trailer_consumed_WORD trailer
2673#define lpfc_trailer_type_SHIFT 16
2674#define lpfc_trailer_type_MASK 0x000000FF
2675#define lpfc_trailer_type_WORD trailer
2676#define lpfc_trailer_code_SHIFT 8
2677#define lpfc_trailer_code_MASK 0x000000FF
2678#define lpfc_trailer_code_WORD trailer
2679#define LPFC_TRAILER_CODE_LINK 0x1
2680#define LPFC_TRAILER_CODE_FCOE 0x2
2681#define LPFC_TRAILER_CODE_DCBX 0x3
James Smartb19a0612010-04-06 14:48:51 -04002682#define LPFC_TRAILER_CODE_GRP5 0x5
James Smart76a95d72010-11-20 23:11:48 -05002683#define LPFC_TRAILER_CODE_FC 0x10
James Smart70f3c072010-12-15 17:57:33 -05002684#define LPFC_TRAILER_CODE_SLI 0x11
James Smartda0436e2009-05-22 14:51:39 -04002685};
2686
2687struct lpfc_acqe_link {
2688 uint32_t word0;
2689#define lpfc_acqe_link_speed_SHIFT 24
2690#define lpfc_acqe_link_speed_MASK 0x000000FF
2691#define lpfc_acqe_link_speed_WORD word0
2692#define LPFC_ASYNC_LINK_SPEED_ZERO 0x0
2693#define LPFC_ASYNC_LINK_SPEED_10MBPS 0x1
2694#define LPFC_ASYNC_LINK_SPEED_100MBPS 0x2
2695#define LPFC_ASYNC_LINK_SPEED_1GBPS 0x3
2696#define LPFC_ASYNC_LINK_SPEED_10GBPS 0x4
2697#define lpfc_acqe_link_duplex_SHIFT 16
2698#define lpfc_acqe_link_duplex_MASK 0x000000FF
2699#define lpfc_acqe_link_duplex_WORD word0
2700#define LPFC_ASYNC_LINK_DUPLEX_NONE 0x0
2701#define LPFC_ASYNC_LINK_DUPLEX_HALF 0x1
2702#define LPFC_ASYNC_LINK_DUPLEX_FULL 0x2
2703#define lpfc_acqe_link_status_SHIFT 8
2704#define lpfc_acqe_link_status_MASK 0x000000FF
2705#define lpfc_acqe_link_status_WORD word0
2706#define LPFC_ASYNC_LINK_STATUS_DOWN 0x0
2707#define LPFC_ASYNC_LINK_STATUS_UP 0x1
2708#define LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN 0x2
2709#define LPFC_ASYNC_LINK_STATUS_LOGICAL_UP 0x3
James Smart70f3c072010-12-15 17:57:33 -05002710#define lpfc_acqe_link_type_SHIFT 6
2711#define lpfc_acqe_link_type_MASK 0x00000003
2712#define lpfc_acqe_link_type_WORD word0
2713#define lpfc_acqe_link_number_SHIFT 0
2714#define lpfc_acqe_link_number_MASK 0x0000003F
2715#define lpfc_acqe_link_number_WORD word0
James Smartda0436e2009-05-22 14:51:39 -04002716 uint32_t word1;
2717#define lpfc_acqe_link_fault_SHIFT 0
2718#define lpfc_acqe_link_fault_MASK 0x000000FF
2719#define lpfc_acqe_link_fault_WORD word1
2720#define LPFC_ASYNC_LINK_FAULT_NONE 0x0
2721#define LPFC_ASYNC_LINK_FAULT_LOCAL 0x1
2722#define LPFC_ASYNC_LINK_FAULT_REMOTE 0x2
James Smart70f3c072010-12-15 17:57:33 -05002723#define lpfc_acqe_logical_link_speed_SHIFT 16
2724#define lpfc_acqe_logical_link_speed_MASK 0x0000FFFF
2725#define lpfc_acqe_logical_link_speed_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04002726 uint32_t event_tag;
2727 uint32_t trailer;
James Smart70f3c072010-12-15 17:57:33 -05002728#define LPFC_LINK_EVENT_TYPE_PHYSICAL 0x0
2729#define LPFC_LINK_EVENT_TYPE_VIRTUAL 0x1
James Smartda0436e2009-05-22 14:51:39 -04002730};
2731
James Smart70f3c072010-12-15 17:57:33 -05002732struct lpfc_acqe_fip {
James Smart6669f9b2009-10-02 15:16:45 -04002733 uint32_t index;
James Smartda0436e2009-05-22 14:51:39 -04002734 uint32_t word1;
James Smart70f3c072010-12-15 17:57:33 -05002735#define lpfc_acqe_fip_fcf_count_SHIFT 0
2736#define lpfc_acqe_fip_fcf_count_MASK 0x0000FFFF
2737#define lpfc_acqe_fip_fcf_count_WORD word1
2738#define lpfc_acqe_fip_event_type_SHIFT 16
2739#define lpfc_acqe_fip_event_type_MASK 0x0000FFFF
2740#define lpfc_acqe_fip_event_type_WORD word1
James Smartda0436e2009-05-22 14:51:39 -04002741 uint32_t event_tag;
2742 uint32_t trailer;
James Smart70f3c072010-12-15 17:57:33 -05002743#define LPFC_FIP_EVENT_TYPE_NEW_FCF 0x1
2744#define LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL 0x2
2745#define LPFC_FIP_EVENT_TYPE_FCF_DEAD 0x3
2746#define LPFC_FIP_EVENT_TYPE_CVL 0x4
2747#define LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD 0x5
James Smartda0436e2009-05-22 14:51:39 -04002748};
2749
2750struct lpfc_acqe_dcbx {
2751 uint32_t tlv_ttl;
2752 uint32_t reserved;
2753 uint32_t event_tag;
2754 uint32_t trailer;
2755};
2756
James Smartb19a0612010-04-06 14:48:51 -04002757struct lpfc_acqe_grp5 {
2758 uint32_t word0;
James Smart70f3c072010-12-15 17:57:33 -05002759#define lpfc_acqe_grp5_type_SHIFT 6
2760#define lpfc_acqe_grp5_type_MASK 0x00000003
2761#define lpfc_acqe_grp5_type_WORD word0
2762#define lpfc_acqe_grp5_number_SHIFT 0
2763#define lpfc_acqe_grp5_number_MASK 0x0000003F
2764#define lpfc_acqe_grp5_number_WORD word0
James Smartb19a0612010-04-06 14:48:51 -04002765 uint32_t word1;
2766#define lpfc_acqe_grp5_llink_spd_SHIFT 16
2767#define lpfc_acqe_grp5_llink_spd_MASK 0x0000FFFF
2768#define lpfc_acqe_grp5_llink_spd_WORD word1
2769 uint32_t event_tag;
2770 uint32_t trailer;
2771};
2772
James Smart70f3c072010-12-15 17:57:33 -05002773struct lpfc_acqe_fc_la {
2774 uint32_t word0;
2775#define lpfc_acqe_fc_la_speed_SHIFT 24
2776#define lpfc_acqe_fc_la_speed_MASK 0x000000FF
2777#define lpfc_acqe_fc_la_speed_WORD word0
2778#define LPFC_FC_LA_SPEED_UNKOWN 0x0
2779#define LPFC_FC_LA_SPEED_1G 0x1
2780#define LPFC_FC_LA_SPEED_2G 0x2
2781#define LPFC_FC_LA_SPEED_4G 0x4
2782#define LPFC_FC_LA_SPEED_8G 0x8
2783#define LPFC_FC_LA_SPEED_10G 0xA
2784#define LPFC_FC_LA_SPEED_16G 0x10
2785#define lpfc_acqe_fc_la_topology_SHIFT 16
2786#define lpfc_acqe_fc_la_topology_MASK 0x000000FF
2787#define lpfc_acqe_fc_la_topology_WORD word0
2788#define LPFC_FC_LA_TOP_UNKOWN 0x0
2789#define LPFC_FC_LA_TOP_P2P 0x1
2790#define LPFC_FC_LA_TOP_FCAL 0x2
2791#define LPFC_FC_LA_TOP_INTERNAL_LOOP 0x3
2792#define LPFC_FC_LA_TOP_SERDES_LOOP 0x4
2793#define lpfc_acqe_fc_la_att_type_SHIFT 8
2794#define lpfc_acqe_fc_la_att_type_MASK 0x000000FF
2795#define lpfc_acqe_fc_la_att_type_WORD word0
2796#define LPFC_FC_LA_TYPE_LINK_UP 0x1
2797#define LPFC_FC_LA_TYPE_LINK_DOWN 0x2
2798#define LPFC_FC_LA_TYPE_NO_HARD_ALPA 0x3
2799#define lpfc_acqe_fc_la_port_type_SHIFT 6
2800#define lpfc_acqe_fc_la_port_type_MASK 0x00000003
2801#define lpfc_acqe_fc_la_port_type_WORD word0
2802#define LPFC_LINK_TYPE_ETHERNET 0x0
2803#define LPFC_LINK_TYPE_FC 0x1
2804#define lpfc_acqe_fc_la_port_number_SHIFT 0
2805#define lpfc_acqe_fc_la_port_number_MASK 0x0000003F
2806#define lpfc_acqe_fc_la_port_number_WORD word0
2807 uint32_t word1;
2808#define lpfc_acqe_fc_la_llink_spd_SHIFT 16
2809#define lpfc_acqe_fc_la_llink_spd_MASK 0x0000FFFF
2810#define lpfc_acqe_fc_la_llink_spd_WORD word1
2811#define lpfc_acqe_fc_la_fault_SHIFT 0
2812#define lpfc_acqe_fc_la_fault_MASK 0x000000FF
2813#define lpfc_acqe_fc_la_fault_WORD word1
2814#define LPFC_FC_LA_FAULT_NONE 0x0
2815#define LPFC_FC_LA_FAULT_LOCAL 0x1
2816#define LPFC_FC_LA_FAULT_REMOTE 0x2
2817 uint32_t event_tag;
2818 uint32_t trailer;
2819#define LPFC_FC_LA_EVENT_TYPE_FC_LINK 0x1
2820#define LPFC_FC_LA_EVENT_TYPE_SHARED_LINK 0x2
2821};
2822
2823struct lpfc_acqe_sli {
2824 uint32_t event_data1;
2825 uint32_t event_data2;
2826 uint32_t reserved;
2827 uint32_t trailer;
2828#define LPFC_SLI_EVENT_TYPE_PORT_ERROR 0x1
2829#define LPFC_SLI_EVENT_TYPE_OVER_TEMP 0x2
2830#define LPFC_SLI_EVENT_TYPE_NORM_TEMP 0x3
2831#define LPFC_SLI_EVENT_TYPE_NVLOG_POST 0x4
2832#define LPFC_SLI_EVENT_TYPE_DIAG_DUMP 0x5
2833};
2834
James Smartda0436e2009-05-22 14:51:39 -04002835/*
2836 * Define the bootstrap mailbox (bmbx) region used to communicate
2837 * mailbox command between the host and port. The mailbox consists
2838 * of a payload area of 256 bytes and a completion queue of length
2839 * 16 bytes.
2840 */
2841struct lpfc_bmbx_create {
2842 struct lpfc_mqe mqe;
2843 struct lpfc_mcqe mcqe;
2844};
2845
2846#define SGL_ALIGN_SZ 64
2847#define SGL_PAGE_SIZE 4096
2848/* align SGL addr on a size boundary - adjust address up */
James Smart6d368e52011-05-24 11:44:12 -04002849#define NO_XRI 0xffff
James Smart5ffc2662009-11-18 15:39:44 -05002850
James Smartda0436e2009-05-22 14:51:39 -04002851struct wqe_common {
2852 uint32_t word6;
James Smart6669f9b2009-10-02 15:16:45 -04002853#define wqe_xri_tag_SHIFT 0
2854#define wqe_xri_tag_MASK 0x0000FFFF
2855#define wqe_xri_tag_WORD word6
James Smartda0436e2009-05-22 14:51:39 -04002856#define wqe_ctxt_tag_SHIFT 16
2857#define wqe_ctxt_tag_MASK 0x0000FFFF
2858#define wqe_ctxt_tag_WORD word6
2859 uint32_t word7;
2860#define wqe_ct_SHIFT 2
2861#define wqe_ct_MASK 0x00000003
2862#define wqe_ct_WORD word7
2863#define wqe_status_SHIFT 4
2864#define wqe_status_MASK 0x0000000f
2865#define wqe_status_WORD word7
2866#define wqe_cmnd_SHIFT 8
2867#define wqe_cmnd_MASK 0x000000ff
2868#define wqe_cmnd_WORD word7
2869#define wqe_class_SHIFT 16
2870#define wqe_class_MASK 0x00000007
2871#define wqe_class_WORD word7
2872#define wqe_pu_SHIFT 20
2873#define wqe_pu_MASK 0x00000003
2874#define wqe_pu_WORD word7
2875#define wqe_erp_SHIFT 22
2876#define wqe_erp_MASK 0x00000001
2877#define wqe_erp_WORD word7
2878#define wqe_lnk_SHIFT 23
2879#define wqe_lnk_MASK 0x00000001
2880#define wqe_lnk_WORD word7
2881#define wqe_tmo_SHIFT 24
2882#define wqe_tmo_MASK 0x000000ff
2883#define wqe_tmo_WORD word7
2884 uint32_t abort_tag; /* word 8 in WQE */
2885 uint32_t word9;
2886#define wqe_reqtag_SHIFT 0
2887#define wqe_reqtag_MASK 0x0000FFFF
2888#define wqe_reqtag_WORD word9
James Smartc31098c2011-04-16 11:03:33 -04002889#define wqe_temp_rpi_SHIFT 16
2890#define wqe_temp_rpi_MASK 0x0000FFFF
2891#define wqe_temp_rpi_WORD word9
James Smartda0436e2009-05-22 14:51:39 -04002892#define wqe_rcvoxid_SHIFT 16
James Smartf0d9bcc2010-10-22 11:07:09 -04002893#define wqe_rcvoxid_MASK 0x0000FFFF
2894#define wqe_rcvoxid_WORD word9
James Smartda0436e2009-05-22 14:51:39 -04002895 uint32_t word10;
James Smartf0d9bcc2010-10-22 11:07:09 -04002896#define wqe_ebde_cnt_SHIFT 0
James Smart2fcee4b2010-12-15 17:57:46 -05002897#define wqe_ebde_cnt_MASK 0x0000000f
James Smartf0d9bcc2010-10-22 11:07:09 -04002898#define wqe_ebde_cnt_WORD word10
2899#define wqe_lenloc_SHIFT 7
2900#define wqe_lenloc_MASK 0x00000003
2901#define wqe_lenloc_WORD word10
2902#define LPFC_WQE_LENLOC_NONE 0
2903#define LPFC_WQE_LENLOC_WORD3 1
2904#define LPFC_WQE_LENLOC_WORD12 2
2905#define LPFC_WQE_LENLOC_WORD4 3
2906#define wqe_qosd_SHIFT 9
2907#define wqe_qosd_MASK 0x00000001
2908#define wqe_qosd_WORD word10
2909#define wqe_xbl_SHIFT 11
2910#define wqe_xbl_MASK 0x00000001
2911#define wqe_xbl_WORD word10
2912#define wqe_iod_SHIFT 13
2913#define wqe_iod_MASK 0x00000001
2914#define wqe_iod_WORD word10
2915#define LPFC_WQE_IOD_WRITE 0
2916#define LPFC_WQE_IOD_READ 1
2917#define wqe_dbde_SHIFT 14
2918#define wqe_dbde_MASK 0x00000001
2919#define wqe_dbde_WORD word10
2920#define wqe_wqes_SHIFT 15
2921#define wqe_wqes_MASK 0x00000001
2922#define wqe_wqes_WORD word10
James Smartfedd3b72011-02-16 12:39:24 -05002923/* Note that this field overlaps above fields */
2924#define wqe_wqid_SHIFT 1
James Smart9589b062011-04-16 11:03:17 -04002925#define wqe_wqid_MASK 0x00007fff
James Smartfedd3b72011-02-16 12:39:24 -05002926#define wqe_wqid_WORD word10
James Smartda0436e2009-05-22 14:51:39 -04002927#define wqe_pri_SHIFT 16
2928#define wqe_pri_MASK 0x00000007
2929#define wqe_pri_WORD word10
2930#define wqe_pv_SHIFT 19
2931#define wqe_pv_MASK 0x00000001
2932#define wqe_pv_WORD word10
2933#define wqe_xc_SHIFT 21
2934#define wqe_xc_MASK 0x00000001
2935#define wqe_xc_WORD word10
2936#define wqe_ccpe_SHIFT 23
2937#define wqe_ccpe_MASK 0x00000001
2938#define wqe_ccpe_WORD word10
2939#define wqe_ccp_SHIFT 24
James Smartf0d9bcc2010-10-22 11:07:09 -04002940#define wqe_ccp_MASK 0x000000ff
2941#define wqe_ccp_WORD word10
James Smartda0436e2009-05-22 14:51:39 -04002942 uint32_t word11;
James Smartf0d9bcc2010-10-22 11:07:09 -04002943#define wqe_cmd_type_SHIFT 0
2944#define wqe_cmd_type_MASK 0x0000000f
2945#define wqe_cmd_type_WORD word11
2946#define wqe_els_id_SHIFT 4
2947#define wqe_els_id_MASK 0x00000003
2948#define wqe_els_id_WORD word11
2949#define LPFC_ELS_ID_FLOGI 3
2950#define LPFC_ELS_ID_FDISC 2
2951#define LPFC_ELS_ID_LOGO 1
2952#define LPFC_ELS_ID_DEFAULT 0
2953#define wqe_wqec_SHIFT 7
2954#define wqe_wqec_MASK 0x00000001
2955#define wqe_wqec_WORD word11
2956#define wqe_cqid_SHIFT 16
2957#define wqe_cqid_MASK 0x0000ffff
2958#define wqe_cqid_WORD word11
2959#define LPFC_WQE_CQ_ID_DEFAULT 0xffff
James Smartda0436e2009-05-22 14:51:39 -04002960};
2961
2962struct wqe_did {
2963 uint32_t word5;
2964#define wqe_els_did_SHIFT 0
2965#define wqe_els_did_MASK 0x00FFFFFF
2966#define wqe_els_did_WORD word5
James Smart6669f9b2009-10-02 15:16:45 -04002967#define wqe_xmit_bls_pt_SHIFT 28
2968#define wqe_xmit_bls_pt_MASK 0x00000003
2969#define wqe_xmit_bls_pt_WORD word5
James Smartda0436e2009-05-22 14:51:39 -04002970#define wqe_xmit_bls_ar_SHIFT 30
2971#define wqe_xmit_bls_ar_MASK 0x00000001
2972#define wqe_xmit_bls_ar_WORD word5
2973#define wqe_xmit_bls_xo_SHIFT 31
2974#define wqe_xmit_bls_xo_MASK 0x00000001
2975#define wqe_xmit_bls_xo_WORD word5
2976};
2977
James Smartf0d9bcc2010-10-22 11:07:09 -04002978struct lpfc_wqe_generic{
2979 struct ulp_bde64 bde;
2980 uint32_t word3;
2981 uint32_t word4;
2982 uint32_t word5;
2983 struct wqe_common wqe_com;
2984 uint32_t payload[4];
2985};
2986
James Smartda0436e2009-05-22 14:51:39 -04002987struct els_request64_wqe {
2988 struct ulp_bde64 bde;
2989 uint32_t payload_len;
2990 uint32_t word4;
2991#define els_req64_sid_SHIFT 0
2992#define els_req64_sid_MASK 0x00FFFFFF
2993#define els_req64_sid_WORD word4
2994#define els_req64_sp_SHIFT 24
2995#define els_req64_sp_MASK 0x00000001
2996#define els_req64_sp_WORD word4
2997#define els_req64_vf_SHIFT 25
2998#define els_req64_vf_MASK 0x00000001
2999#define els_req64_vf_WORD word4
3000 struct wqe_did wqe_dest;
3001 struct wqe_common wqe_com; /* words 6-11 */
3002 uint32_t word12;
3003#define els_req64_vfid_SHIFT 1
3004#define els_req64_vfid_MASK 0x00000FFF
3005#define els_req64_vfid_WORD word12
3006#define els_req64_pri_SHIFT 13
3007#define els_req64_pri_MASK 0x00000007
3008#define els_req64_pri_WORD word12
3009 uint32_t word13;
3010#define els_req64_hopcnt_SHIFT 24
3011#define els_req64_hopcnt_MASK 0x000000ff
3012#define els_req64_hopcnt_WORD word13
3013 uint32_t reserved[2];
3014};
3015
3016struct xmit_els_rsp64_wqe {
3017 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003018 uint32_t response_payload_len;
James Smartda0436e2009-05-22 14:51:39 -04003019 uint32_t rsvd4;
James Smartf0d9bcc2010-10-22 11:07:09 -04003020 struct wqe_did wqe_dest;
James Smartda0436e2009-05-22 14:51:39 -04003021 struct wqe_common wqe_com; /* words 6-11 */
James Smartc31098c2011-04-16 11:03:33 -04003022 uint32_t word12;
3023#define wqe_rsp_temp_rpi_SHIFT 0
3024#define wqe_rsp_temp_rpi_MASK 0x0000FFFF
3025#define wqe_rsp_temp_rpi_WORD word12
3026 uint32_t rsvd_13_15[3];
James Smartda0436e2009-05-22 14:51:39 -04003027};
3028
3029struct xmit_bls_rsp64_wqe {
3030 uint32_t payload0;
James Smart6669f9b2009-10-02 15:16:45 -04003031/* Payload0 for BA_ACC */
3032#define xmit_bls_rsp64_acc_seq_id_SHIFT 16
3033#define xmit_bls_rsp64_acc_seq_id_MASK 0x000000ff
3034#define xmit_bls_rsp64_acc_seq_id_WORD payload0
3035#define xmit_bls_rsp64_acc_seq_id_vald_SHIFT 24
3036#define xmit_bls_rsp64_acc_seq_id_vald_MASK 0x000000ff
3037#define xmit_bls_rsp64_acc_seq_id_vald_WORD payload0
3038/* Payload0 for BA_RJT */
3039#define xmit_bls_rsp64_rjt_vspec_SHIFT 0
3040#define xmit_bls_rsp64_rjt_vspec_MASK 0x000000ff
3041#define xmit_bls_rsp64_rjt_vspec_WORD payload0
3042#define xmit_bls_rsp64_rjt_expc_SHIFT 8
3043#define xmit_bls_rsp64_rjt_expc_MASK 0x000000ff
3044#define xmit_bls_rsp64_rjt_expc_WORD payload0
3045#define xmit_bls_rsp64_rjt_rsnc_SHIFT 16
3046#define xmit_bls_rsp64_rjt_rsnc_MASK 0x000000ff
3047#define xmit_bls_rsp64_rjt_rsnc_WORD payload0
James Smartda0436e2009-05-22 14:51:39 -04003048 uint32_t word1;
3049#define xmit_bls_rsp64_rxid_SHIFT 0
3050#define xmit_bls_rsp64_rxid_MASK 0x0000ffff
3051#define xmit_bls_rsp64_rxid_WORD word1
3052#define xmit_bls_rsp64_oxid_SHIFT 16
3053#define xmit_bls_rsp64_oxid_MASK 0x0000ffff
3054#define xmit_bls_rsp64_oxid_WORD word1
3055 uint32_t word2;
James Smart6669f9b2009-10-02 15:16:45 -04003056#define xmit_bls_rsp64_seqcnthi_SHIFT 0
James Smartda0436e2009-05-22 14:51:39 -04003057#define xmit_bls_rsp64_seqcnthi_MASK 0x0000ffff
3058#define xmit_bls_rsp64_seqcnthi_WORD word2
James Smart6669f9b2009-10-02 15:16:45 -04003059#define xmit_bls_rsp64_seqcntlo_SHIFT 16
3060#define xmit_bls_rsp64_seqcntlo_MASK 0x0000ffff
3061#define xmit_bls_rsp64_seqcntlo_WORD word2
James Smartda0436e2009-05-22 14:51:39 -04003062 uint32_t rsrvd3;
3063 uint32_t rsrvd4;
3064 struct wqe_did wqe_dest;
3065 struct wqe_common wqe_com; /* words 6-11 */
3066 uint32_t rsvd_12_15[4];
3067};
James Smart6669f9b2009-10-02 15:16:45 -04003068
James Smartda0436e2009-05-22 14:51:39 -04003069struct wqe_rctl_dfctl {
3070 uint32_t word5;
3071#define wqe_si_SHIFT 2
3072#define wqe_si_MASK 0x000000001
3073#define wqe_si_WORD word5
3074#define wqe_la_SHIFT 3
3075#define wqe_la_MASK 0x000000001
3076#define wqe_la_WORD word5
3077#define wqe_ls_SHIFT 7
3078#define wqe_ls_MASK 0x000000001
3079#define wqe_ls_WORD word5
3080#define wqe_dfctl_SHIFT 8
3081#define wqe_dfctl_MASK 0x0000000ff
3082#define wqe_dfctl_WORD word5
3083#define wqe_type_SHIFT 16
3084#define wqe_type_MASK 0x0000000ff
3085#define wqe_type_WORD word5
3086#define wqe_rctl_SHIFT 24
3087#define wqe_rctl_MASK 0x0000000ff
3088#define wqe_rctl_WORD word5
3089};
3090
3091struct xmit_seq64_wqe {
3092 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003093 uint32_t rsvd3;
James Smartda0436e2009-05-22 14:51:39 -04003094 uint32_t relative_offset;
3095 struct wqe_rctl_dfctl wge_ctl;
3096 struct wqe_common wqe_com; /* words 6-11 */
James Smartda0436e2009-05-22 14:51:39 -04003097 uint32_t xmit_len;
3098 uint32_t rsvd_12_15[3];
3099};
3100struct xmit_bcast64_wqe {
3101 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003102 uint32_t seq_payload_len;
James Smartda0436e2009-05-22 14:51:39 -04003103 uint32_t rsvd4;
3104 struct wqe_rctl_dfctl wge_ctl; /* word 5 */
3105 struct wqe_common wqe_com; /* words 6-11 */
3106 uint32_t rsvd_12_15[4];
3107};
3108
3109struct gen_req64_wqe {
3110 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003111 uint32_t request_payload_len;
3112 uint32_t relative_offset;
James Smartda0436e2009-05-22 14:51:39 -04003113 struct wqe_rctl_dfctl wge_ctl; /* word 5 */
3114 struct wqe_common wqe_com; /* words 6-11 */
3115 uint32_t rsvd_12_15[4];
3116};
3117
3118struct create_xri_wqe {
3119 uint32_t rsrvd[5]; /* words 0-4 */
3120 struct wqe_did wqe_dest; /* word 5 */
3121 struct wqe_common wqe_com; /* words 6-11 */
3122 uint32_t rsvd_12_15[4]; /* word 12-15 */
3123};
3124
3125#define T_REQUEST_TAG 3
3126#define T_XRI_TAG 1
3127
3128struct abort_cmd_wqe {
3129 uint32_t rsrvd[3];
3130 uint32_t word3;
3131#define abort_cmd_ia_SHIFT 0
3132#define abort_cmd_ia_MASK 0x000000001
3133#define abort_cmd_ia_WORD word3
3134#define abort_cmd_criteria_SHIFT 8
3135#define abort_cmd_criteria_MASK 0x0000000ff
3136#define abort_cmd_criteria_WORD word3
3137 uint32_t rsrvd4;
3138 uint32_t rsrvd5;
3139 struct wqe_common wqe_com; /* words 6-11 */
3140 uint32_t rsvd_12_15[4]; /* word 12-15 */
3141};
3142
3143struct fcp_iwrite64_wqe {
3144 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003145 uint32_t payload_offset_len;
James Smartda0436e2009-05-22 14:51:39 -04003146 uint32_t total_xfer_len;
3147 uint32_t initial_xfer_len;
3148 struct wqe_common wqe_com; /* words 6-11 */
James Smartfedd3b72011-02-16 12:39:24 -05003149 uint32_t rsrvd12;
3150 struct ulp_bde64 ph_bde; /* words 13-15 */
James Smartda0436e2009-05-22 14:51:39 -04003151};
3152
3153struct fcp_iread64_wqe {
3154 struct ulp_bde64 bde;
James Smartf0d9bcc2010-10-22 11:07:09 -04003155 uint32_t payload_offset_len; /* word 3 */
James Smartda0436e2009-05-22 14:51:39 -04003156 uint32_t total_xfer_len; /* word 4 */
3157 uint32_t rsrvd5; /* word 5 */
3158 struct wqe_common wqe_com; /* words 6-11 */
James Smartfedd3b72011-02-16 12:39:24 -05003159 uint32_t rsrvd12;
3160 struct ulp_bde64 ph_bde; /* words 13-15 */
James Smartda0436e2009-05-22 14:51:39 -04003161};
3162
3163struct fcp_icmnd64_wqe {
James Smartf0d9bcc2010-10-22 11:07:09 -04003164 struct ulp_bde64 bde; /* words 0-2 */
3165 uint32_t rsrvd3; /* word 3 */
3166 uint32_t rsrvd4; /* word 4 */
3167 uint32_t rsrvd5; /* word 5 */
James Smartda0436e2009-05-22 14:51:39 -04003168 struct wqe_common wqe_com; /* words 6-11 */
James Smartf0d9bcc2010-10-22 11:07:09 -04003169 uint32_t rsvd_12_15[4]; /* word 12-15 */
James Smartda0436e2009-05-22 14:51:39 -04003170};
3171
3172
3173union lpfc_wqe {
3174 uint32_t words[16];
3175 struct lpfc_wqe_generic generic;
3176 struct fcp_icmnd64_wqe fcp_icmd;
3177 struct fcp_iread64_wqe fcp_iread;
3178 struct fcp_iwrite64_wqe fcp_iwrite;
3179 struct abort_cmd_wqe abort_cmd;
3180 struct create_xri_wqe create_xri;
3181 struct xmit_bcast64_wqe xmit_bcast64;
3182 struct xmit_seq64_wqe xmit_sequence;
3183 struct xmit_bls_rsp64_wqe xmit_bls_rsp;
3184 struct xmit_els_rsp64_wqe xmit_els_rsp;
3185 struct els_request64_wqe els_req;
3186 struct gen_req64_wqe gen_req;
3187};
3188
James Smart52d52442011-05-24 11:42:45 -04003189#define LPFC_GROUP_OJECT_MAGIC_NUM 0xfeaa0001
3190#define LPFC_FILE_TYPE_GROUP 0xf7
3191#define LPFC_FILE_ID_GROUP 0xa2
3192struct lpfc_grp_hdr {
3193 uint32_t size;
3194 uint32_t magic_number;
3195 uint32_t word2;
3196#define lpfc_grp_hdr_file_type_SHIFT 24
3197#define lpfc_grp_hdr_file_type_MASK 0x000000FF
3198#define lpfc_grp_hdr_file_type_WORD word2
3199#define lpfc_grp_hdr_id_SHIFT 16
3200#define lpfc_grp_hdr_id_MASK 0x000000FF
3201#define lpfc_grp_hdr_id_WORD word2
3202 uint8_t rev_name[128];
James Smart88a2cfb2011-07-22 18:36:33 -04003203 uint8_t date[12];
3204 uint8_t revision[32];
James Smart52d52442011-05-24 11:42:45 -04003205};
3206
James Smartda0436e2009-05-22 14:51:39 -04003207#define FCP_COMMAND 0x0
3208#define FCP_COMMAND_DATA_OUT 0x1
3209#define ELS_COMMAND_NON_FIP 0xC
3210#define ELS_COMMAND_FIP 0xD
3211#define OTHER_COMMAND 0x8
3212
James Smart52d52442011-05-24 11:42:45 -04003213#define LPFC_FW_DUMP 1
3214#define LPFC_FW_RESET 2
3215#define LPFC_DV_RESET 3