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review.evervolv.com / android_kernel_oneplus_msm8996 / 0830ceedbfde20c9110c59597fdffbf51886565a / . / drivers / net / wireless / wl12xx / ini.h
blob: 1420c842b8f1585ac0146071fa88cb63d263cf09 [file] [log] [blame]
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 2010 Nokia Corporation
5 *
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
Shahar Levi00d20102010-11-08 11:20:10 +0000[diff] [blame]24#ifndef __INI_H__
25#define __INI_H__
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]26
27#define WL1271_INI_MAX_SMART_REFLEX_PARAM 16
28
29struct wl1271_ini_general_params {
30 u8 ref_clock;
31 u8 settling_time;
32 u8 clk_valid_on_wakeup;
33 u8 dc2dc_mode;
34 u8 dual_mode_select;
35 u8 tx_bip_fem_auto_detect;
36 u8 tx_bip_fem_manufacturer;
37 u8 general_settings;
38 u8 sr_state;
39 u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
40 u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
41 u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
David S. Miller14599f12010-06-11 11:34:06 -0700[diff] [blame]42} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]43
Shahar Levi49d750ca2011-03-06 16:32:09 +0200[diff] [blame]44#define WL128X_INI_MAX_SETTINGS_PARAM 4
45
46struct wl128x_ini_general_params {
47 u8 ref_clock;
48 u8 settling_time;
49 u8 clk_valid_on_wakeup;
50 u8 tcxo_ref_clock;
51 u8 tcxo_settling_time;
52 u8 tcxo_valid_on_wakeup;
53 u8 tcxo_ldo_voltage;
54 u8 xtal_itrim_val;
55 u8 platform_conf;
56 u8 dual_mode_select;
57 u8 tx_bip_fem_auto_detect;
58 u8 tx_bip_fem_manufacturer;
59 u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
60 u8 sr_state;
61 u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
62 u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
63 u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
64} __packed;
65
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]66#define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15
67
68struct wl1271_ini_band_params_2 {
69 u8 rx_trace_insertion_loss;
70 u8 tx_trace_loss;
71 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
David S. Miller14599f12010-06-11 11:34:06 -0700[diff] [blame]72} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]73
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]74#define WL1271_INI_CHANNEL_COUNT_2 14
75
Shahar Levi49d750ca2011-03-06 16:32:09 +0200[diff] [blame]76struct wl128x_ini_band_params_2 {
77 u8 rx_trace_insertion_loss;
78 u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
79 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
80} __packed;
81
82#define WL1271_INI_RATE_GROUP_COUNT 6
83
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]84struct wl1271_ini_fem_params_2 {
85 __le16 tx_bip_ref_pd_voltage;
86 u8 tx_bip_ref_power;
87 u8 tx_bip_ref_offset;
88 u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
89 u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
90 u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
91 u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
92 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
93 u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
94 u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
95 u8 rx_fem_insertion_loss;
96 u8 degraded_low_to_normal_thr;
97 u8 normal_to_degraded_high_thr;
David S. Miller14599f12010-06-11 11:34:06 -0700[diff] [blame]98} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]99
Shahar Levi49d750ca2011-03-06 16:32:09 +0200[diff] [blame]100#define WL128X_INI_RATE_GROUP_COUNT 7
101/* low and high temperatures */
102#define WL128X_INI_PD_VS_TEMPERATURE_RANGES 2
103
104struct wl128x_ini_fem_params_2 {
105 __le16 tx_bip_ref_pd_voltage;
106 u8 tx_bip_ref_power;
107 u8 tx_bip_ref_offset;
108 u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
109 u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
110 u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
111 u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
112 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
113 u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
114 u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
115 u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
116 u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
117 u8 rx_fem_insertion_loss;
118 u8 degraded_low_to_normal_thr;
119 u8 normal_to_degraded_high_thr;
120} __packed;
121
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]122#define WL1271_INI_CHANNEL_COUNT_5 35
123#define WL1271_INI_SUB_BAND_COUNT_5 7
124
125struct wl1271_ini_band_params_5 {
126 u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
127 u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
128 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
David S. Miller14599f12010-06-11 11:34:06 -0700[diff] [blame]129} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]130
Shahar Levi49d750ca2011-03-06 16:32:09 +0200[diff] [blame]131struct wl128x_ini_band_params_5 {
132 u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
133 u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
134 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
135} __packed;
136
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]137struct wl1271_ini_fem_params_5 {
138 __le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
139 u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
140 u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
141 u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
142 u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
143 u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
144 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
145 u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
146 u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
147 u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
148 u8 degraded_low_to_normal_thr;
149 u8 normal_to_degraded_high_thr;
David S. Miller14599f12010-06-11 11:34:06 -0700[diff] [blame]150} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]151
Shahar Levi49d750ca2011-03-06 16:32:09 +0200[diff] [blame]152struct wl128x_ini_fem_params_5 {
153 __le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
154 u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
155 u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
156 u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
157 u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
158 u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
159 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
160 u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
161 u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
162 u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
163 u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
164 WL128X_INI_PD_VS_TEMPERATURE_RANGES];
165 u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
166 u8 degraded_low_to_normal_thr;
167 u8 normal_to_degraded_high_thr;
168} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]169
170/* NVS data structure */
171#define WL1271_INI_NVS_SECTION_SIZE 468
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]172#define WL1271_INI_FEM_MODULE_COUNT 2
173
Juuso Oikarinena7da74f2010-05-14 10:46:23 +0300[diff] [blame]174#define WL1271_INI_LEGACY_NVS_FILE_SIZE 800
175
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]176struct wl1271_nvs_file {
Shahar Levibc765bf2011-03-06 16:32:10 +0200[diff] [blame]177 /* NVS section - must be first! */
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]178 u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
179
180 /* INI section */
181 struct wl1271_ini_general_params general_params;
182 u8 padding1;
183 struct wl1271_ini_band_params_2 stat_radio_params_2;
184 u8 padding2;
185 struct {
186 struct wl1271_ini_fem_params_2 params;
187 u8 padding;
188 } dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
Juuso Oikarinena7da74f2010-05-14 10:46:23 +0300[diff] [blame]189 struct wl1271_ini_band_params_5 stat_radio_params_5;
190 u8 padding3;
191 struct {
192 struct wl1271_ini_fem_params_5 params;
193 u8 padding;
194 } dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
David S. Miller14599f12010-06-11 11:34:06 -0700[diff] [blame]195} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]196
Shahar Levi49d750ca2011-03-06 16:32:09 +0200[diff] [blame]197struct wl128x_nvs_file {
Shahar Levibc765bf2011-03-06 16:32:10 +0200[diff] [blame]198 /* NVS section - must be first! */
Shahar Levi49d750ca2011-03-06 16:32:09 +0200[diff] [blame]199 u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
200
201 /* INI section */
202 struct wl128x_ini_general_params general_params;
203 u8 fem_vendor_and_options;
204 struct wl128x_ini_band_params_2 stat_radio_params_2;
205 u8 padding2;
206 struct {
207 struct wl128x_ini_fem_params_2 params;
208 u8 padding;
209 } dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
210 struct wl128x_ini_band_params_5 stat_radio_params_5;
211 u8 padding3;
212 struct {
213 struct wl128x_ini_fem_params_5 params;
214 u8 padding;
215 } dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
216} __packed;
Juuso Oikarineneb70eb72010-05-14 10:46:22 +0300[diff] [blame]217#endif