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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-sa1100/assabet.c
3 *
4 * Author: Nicolas Pitre
5 *
6 * This file contains all Assabet-specific tweaks.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/errno.h>
16#include <linux/ioport.h>
17#include <linux/serial_core.h>
18#include <linux/mtd/mtd.h>
19#include <linux/mtd/partitions.h>
20#include <linux/delay.h>
21#include <linux/mm.h>
22
Russell Kinge1b7a722012-01-14 11:50:04 +000023#include <video/sa1100fb.h>
24
Russell Kinga09e64f2008-08-05 16:14:15 +010025#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <asm/mach-types.h>
27#include <asm/irq.h>
28#include <asm/setup.h>
29#include <asm/page.h>
Russell King74945c82006-03-16 14:44:36 +000030#include <asm/pgtable-hwdef.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <asm/pgtable.h>
32#include <asm/tlbflush.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/flash.h>
36#include <asm/mach/irda.h>
37#include <asm/mach/map.h>
38#include <asm/mach/serial_sa1100.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010039#include <mach/assabet.h>
40#include <mach/mcp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070041
42#include "generic.h"
43
44#define ASSABET_BCR_DB1110 \
45 (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
46 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
47 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
48 ASSABET_BCR_IRDA_MD0)
49
50#define ASSABET_BCR_DB1111 \
51 (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
52 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
53 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
54 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
55 ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
56
57unsigned long SCR_value = ASSABET_SCR_INIT;
58EXPORT_SYMBOL(SCR_value);
59
60static unsigned long BCR_value = ASSABET_BCR_DB1110;
61
62void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
63{
64 unsigned long flags;
65
66 local_irq_save(flags);
67 BCR_value = (BCR_value & ~mask) | val;
68 ASSABET_BCR = BCR_value;
69 local_irq_restore(flags);
70}
71
72EXPORT_SYMBOL(ASSABET_BCR_frob);
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
75/*
76 * Assabet flash support code.
77 */
78
79#ifdef ASSABET_REV_4
80/*
81 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
82 */
83static struct mtd_partition assabet_partitions[] = {
84 {
85 .name = "bootloader",
86 .size = 0x00020000,
87 .offset = 0,
88 .mask_flags = MTD_WRITEABLE,
89 }, {
90 .name = "bootloader params",
91 .size = 0x00020000,
92 .offset = MTDPART_OFS_APPEND,
93 .mask_flags = MTD_WRITEABLE,
94 }, {
95 .name = "jffs",
96 .size = MTDPART_SIZ_FULL,
97 .offset = MTDPART_OFS_APPEND,
98 }
99};
100#else
101/*
102 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
103 */
104static struct mtd_partition assabet_partitions[] = {
105 {
106 .name = "bootloader",
107 .size = 0x00040000,
108 .offset = 0,
109 .mask_flags = MTD_WRITEABLE,
110 }, {
111 .name = "bootloader params",
112 .size = 0x00040000,
113 .offset = MTDPART_OFS_APPEND,
114 .mask_flags = MTD_WRITEABLE,
115 }, {
116 .name = "jffs",
117 .size = MTDPART_SIZ_FULL,
118 .offset = MTDPART_OFS_APPEND,
119 }
120};
121#endif
122
123static struct flash_platform_data assabet_flash_data = {
124 .map_name = "cfi_probe",
125 .parts = assabet_partitions,
126 .nr_parts = ARRAY_SIZE(assabet_partitions),
127};
128
129static struct resource assabet_flash_resources[] = {
130 {
131 .start = SA1100_CS0_PHYS,
132 .end = SA1100_CS0_PHYS + SZ_32M - 1,
133 .flags = IORESOURCE_MEM,
134 }, {
135 .start = SA1100_CS1_PHYS,
136 .end = SA1100_CS1_PHYS + SZ_32M - 1,
137 .flags = IORESOURCE_MEM,
138 }
139};
140
141
142/*
143 * Assabet IrDA support code.
144 */
145
146static int assabet_irda_set_power(struct device *dev, unsigned int state)
147{
148 static unsigned int bcr_state[4] = {
149 ASSABET_BCR_IRDA_MD0,
150 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
151 ASSABET_BCR_IRDA_MD1,
152 0
153 };
154
155 if (state < 4) {
156 state = bcr_state[state];
157 ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
158 ASSABET_BCR_IRDA_MD0));
159 ASSABET_BCR_set(state);
160 }
161 return 0;
162}
163
164static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
165{
166 if (speed < 4000000)
167 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
168 else
169 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
170}
171
172static struct irda_platform_data assabet_irda_data = {
173 .set_power = assabet_irda_set_power,
174 .set_speed = assabet_irda_set_speed,
175};
176
Russell King323cdfc2005-08-18 10:10:46 +0100177static struct mcp_plat_data assabet_mcp_data = {
178 .mccr0 = MCCR0_ADM,
179 .sclk_rate = 11981000,
180};
181
Russell King086ada52012-01-14 12:03:22 +0000182static void assabet_lcd_set_visual(u32 visual)
183{
184 u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
185
186 if (machine_is_assabet()) {
187#if 1 // phase 4 or newer Assabet's
188 if (is_true_color)
189 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
190 else
191 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
192#else
193 // older Assabet's
194 if (is_true_color)
195 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
196 else
197 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
198#endif
199 }
200}
201
Russell Kinge1b7a722012-01-14 11:50:04 +0000202#ifndef ASSABET_PAL_VIDEO
Russell King086ada52012-01-14 12:03:22 +0000203static void assabet_lcd_backlight_power(int on)
204{
205 if (on)
206 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
207 else
208 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
209}
210
211/*
212 * Turn on/off the backlight. When turning the backlight on, we wait
213 * 500us after turning it on so we don't cause the supplies to droop
214 * when we enable the LCD controller (and cause a hard reset.)
215 */
216static void assabet_lcd_power(int on)
217{
218 if (on) {
219 ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
220 udelay(500);
221 } else
222 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
223}
224
Russell Kinge1b7a722012-01-14 11:50:04 +0000225/*
226 * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
227 * takes an RGB666 signal, but we provide it with an RGB565 signal
228 * instead (def_rgb_16).
229 */
230static struct sa1100fb_mach_info lq039q2ds54_info = {
231 .pixclock = 171521, .bpp = 16,
232 .xres = 320, .yres = 240,
233
234 .hsync_len = 5, .vsync_len = 1,
235 .left_margin = 61, .upper_margin = 3,
236 .right_margin = 9, .lower_margin = 0,
237
238 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
239
240 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
241 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
Russell King086ada52012-01-14 12:03:22 +0000242
243 .backlight_power = assabet_lcd_backlight_power,
244 .lcd_power = assabet_lcd_power,
245 .set_visual = assabet_lcd_set_visual,
Russell Kinge1b7a722012-01-14 11:50:04 +0000246};
247#else
Russell King086ada52012-01-14 12:03:22 +0000248static void assabet_pal_backlight_power(int on)
249{
250 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
251}
252
253static void assabet_pal_power(int on)
254{
255 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
256}
257
Russell Kinge1b7a722012-01-14 11:50:04 +0000258static struct sa1100fb_mach_info pal_info = {
259 .pixclock = 67797, .bpp = 16,
260 .xres = 640, .yres = 512,
261
262 .hsync_len = 64, .vsync_len = 6,
263 .left_margin = 125, .upper_margin = 70,
264 .right_margin = 115, .lower_margin = 36,
265
266 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
267 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
Russell King086ada52012-01-14 12:03:22 +0000268
269 .backlight_power = assabet_pal_backlight_power,
270 .lcd_power = assabet_pal_power,
271 .set_visual = assabet_lcd_set_visual,
Russell Kinge1b7a722012-01-14 11:50:04 +0000272};
273#endif
274
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275static void __init assabet_init(void)
276{
277 /*
278 * Ensure that the power supply is in "high power" mode.
279 */
280 GPDR |= GPIO_GPIO16;
281 GPSR = GPIO_GPIO16;
282
283 /*
284 * Ensure that these pins are set as outputs and are driving
285 * logic 0. This ensures that we won't inadvertently toggle
286 * the WS latch in the CPLD, and we don't float causing
287 * excessive power drain. --rmk
288 */
289 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
290 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
291
292 /*
293 * Set up registers for sleep mode.
294 */
295 PWER = PWER_GPIO0;
296 PGSR = 0;
297 PCFR = 0;
298 PSDR = 0;
299 PPDR |= PPC_TXD3 | PPC_TXD1;
300 PPSR |= PPC_TXD3 | PPC_TXD1;
301
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302 if (machine_has_neponset()) {
303 /*
304 * Angel sets this, but other bootloaders may not.
305 *
306 * This must precede any driver calls to BCR_set()
307 * or BCR_clear().
308 */
309 ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
310
311#ifndef CONFIG_ASSABET_NEPONSET
312 printk( "Warning: Neponset detected but full support "
313 "hasn't been configured in the kernel\n" );
314#endif
315 }
316
Russell Kinge1b7a722012-01-14 11:50:04 +0000317#ifndef ASSABET_PAL_VIDEO
318 sa11x0_register_lcd(&lq039q2ds54_info);
319#else
320 sa11x0_register_lcd(&pal_video);
321#endif
Russell King7a5b4e12009-10-06 14:55:53 +0100322 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
323 ARRAY_SIZE(assabet_flash_resources));
324 sa11x0_register_irda(&assabet_irda_data);
325 sa11x0_register_mcp(&assabet_mcp_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326}
327
328/*
329 * On Assabet, we must probe for the Neponset board _before_
330 * paging_init() has occurred to actually determine the amount
331 * of RAM available. To do so, we map the appropriate IO section
332 * in the page table here in order to access GPIO registers.
333 */
334static void __init map_sa1100_gpio_regs( void )
335{
336 unsigned long phys = __PREG(GPLR) & PMD_MASK;
337 unsigned long virt = io_p2v(phys);
338 int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
339 pmd_t *pmd;
340
Russell Kinga61c2332012-01-14 16:10:53 +0000341 pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342 *pmd = __pmd(phys | prot);
343 flush_pmd_entry(pmd);
344}
345
346/*
347 * Read System Configuration "Register"
348 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
349 * User's Guide", section 4.4.1)
350 *
351 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
352 * to set up the serial port for decompression status messages. We
353 * repeat it here because the kernel may not be loaded as a zImage, and
354 * also because it's a hassle to communicate the SCR value to the kernel
355 * from the decompressor.
356 *
357 * Note that IRQs are guaranteed to be disabled.
358 */
359static void __init get_assabet_scr(void)
360{
361 unsigned long scr, i;
362
363 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
364 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
365 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
Russell King2f3eca82005-11-21 17:01:13 +0000366 for(i = 100; i--; ) /* Read GPIO 9:2 */
367 scr = GPLR;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368 GPDR |= 0x3fc; /* restore correct pin direction */
369 scr &= 0x3fc; /* save as system configuration byte. */
370 SCR_value = scr;
371}
372
373static void __init
Russell King0744a3e2010-12-20 10:37:50 +0000374fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375{
376 /* This must be done before any call to machine_has_neponset() */
377 map_sa1100_gpio_regs();
378 get_assabet_scr();
379
380 if (machine_has_neponset())
381 printk("Neponset expansion board detected\n");
382}
383
384
385static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
386{
387 if (port->mapbase == _Ser1UTCR0) {
388 if (state)
389 ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
390 ASSABET_BCR_COM_RTS |
391 ASSABET_BCR_COM_DTR);
392 else
393 ASSABET_BCR_set(ASSABET_BCR_RS232EN |
394 ASSABET_BCR_COM_RTS |
395 ASSABET_BCR_COM_DTR);
396 }
397}
398
399/*
400 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
401 * and UART3 (radio module). We only handle them for UART1 here.
402 */
403static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
404{
405 if (port->mapbase == _Ser1UTCR0) {
406 u_int set = 0, clear = 0;
407
408 if (mctrl & TIOCM_RTS)
409 clear |= ASSABET_BCR_COM_RTS;
410 else
411 set |= ASSABET_BCR_COM_RTS;
412
413 if (mctrl & TIOCM_DTR)
414 clear |= ASSABET_BCR_COM_DTR;
415 else
416 set |= ASSABET_BCR_COM_DTR;
417
418 ASSABET_BCR_clear(clear);
419 ASSABET_BCR_set(set);
420 }
421}
422
423static u_int assabet_get_mctrl(struct uart_port *port)
424{
425 u_int ret = 0;
426 u_int bsr = ASSABET_BSR;
427
428 /* need 2 reads to read current value */
429 bsr = ASSABET_BSR;
430
431 if (port->mapbase == _Ser1UTCR0) {
432 if (bsr & ASSABET_BSR_COM_DCD)
433 ret |= TIOCM_CD;
434 if (bsr & ASSABET_BSR_COM_CTS)
435 ret |= TIOCM_CTS;
436 if (bsr & ASSABET_BSR_COM_DSR)
437 ret |= TIOCM_DSR;
438 } else if (port->mapbase == _Ser3UTCR0) {
439 if (bsr & ASSABET_BSR_RAD_DCD)
440 ret |= TIOCM_CD;
441 if (bsr & ASSABET_BSR_RAD_CTS)
442 ret |= TIOCM_CTS;
443 if (bsr & ASSABET_BSR_RAD_DSR)
444 ret |= TIOCM_DSR;
445 if (bsr & ASSABET_BSR_RAD_RI)
446 ret |= TIOCM_RI;
447 } else {
448 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
449 }
450
451 return ret;
452}
453
454static struct sa1100_port_fns assabet_port_fns __initdata = {
455 .set_mctrl = assabet_set_mctrl,
456 .get_mctrl = assabet_get_mctrl,
457 .pm = assabet_uart_pm,
458};
459
460static struct map_desc assabet_io_desc[] __initdata = {
Deepak Saxena92519d82005-10-28 15:19:04 +0100461 { /* Board Control Register */
462 .virtual = 0xf1000000,
463 .pfn = __phys_to_pfn(0x12000000),
464 .length = 0x00100000,
465 .type = MT_DEVICE
466 }, { /* MQ200 */
467 .virtual = 0xf2800000,
468 .pfn = __phys_to_pfn(0x4b800000),
469 .length = 0x00800000,
470 .type = MT_DEVICE
471 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472};
473
474static void __init assabet_map_io(void)
475{
476 sa1100_map_io();
477 iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
478
479 /*
480 * Set SUS bit in SDCR0 so serial port 1 functions.
481 * Its called GPCLKR0 in my SA1110 manual.
482 */
483 Ser1SDCR0 |= SDCR0_SUS;
484
485 if (machine_has_neponset()) {
486#ifdef CONFIG_ASSABET_NEPONSET
487 extern void neponset_map_io(void);
488
489 /*
490 * We map Neponset registers even if it isn't present since
491 * many drivers will try to probe their stuff (and fail).
492 * This is still more friendly than a kernel paging request
493 * crash.
494 */
495 neponset_map_io();
496#endif
497 } else {
498 sa1100_register_uart_fns(&assabet_port_fns);
499 }
500
501 /*
502 * When Neponset is attached, the first UART should be
503 * UART3. That's what Angel is doing and many documents
504 * are stating this.
505 *
506 * We do the Neponset mapping even if Neponset support
507 * isn't compiled in so the user will still get something on
508 * the expected physical serial port.
509 *
510 * We no longer do this; not all boot loaders support it,
511 * and UART3 appears to be somewhat unreliable with blob.
512 */
513 sa1100_register_uart(0, 1);
514 sa1100_register_uart(2, 3);
515}
516
517
518MACHINE_START(ASSABET, "Intel-Assabet")
Nicolas Pitre17f44252011-07-05 22:38:17 -0400519 .atag_offset = 0x100,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100520 .fixup = fixup_assabet,
521 .map_io = assabet_map_io,
522 .init_irq = sa1100_init_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 .timer = &sa1100_timer,
524 .init_machine = assabet_init,
Nicolas Pitree9107ab2011-07-05 22:28:09 -0400525#ifdef CONFIG_SA1111
526 .dma_zone_size = SZ_1M,
527#endif
Russell Kingd9ca5832011-11-05 10:28:50 +0000528 .restart = sa11x0_restart,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529MACHINE_END