| Sascha Hauer | 6c7b068 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 1 | #ifndef __MACH_IMX_CLK_H | 
|  | 2 | #define __MACH_IMX_CLK_H | 
|  | 3 |  | 
|  | 4 | #include <linux/spinlock.h> | 
|  | 5 | #include <linux/clk-provider.h> | 
| Sascha Hauer | 3a84d17 | 2012-09-11 08:50:00 +0200 | [diff] [blame] | 6 |  | 
|  | 7 | extern spinlock_t imx_ccm_lock; | 
| Sascha Hauer | 6c7b068 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 8 |  | 
| Sascha Hauer | 2af9e6d | 2012-03-09 09:11:55 +0100 | [diff] [blame] | 9 | struct clk *imx_clk_pllv1(const char *name, const char *parent, | 
| Sascha Hauer | 6c7b068 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 10 | void __iomem *base); | 
|  | 11 |  | 
| Sascha Hauer | a547b81 | 2012-03-19 12:36:10 +0100 | [diff] [blame] | 12 | struct clk *imx_clk_pllv2(const char *name, const char *parent, | 
|  | 13 | void __iomem *base); | 
|  | 14 |  | 
| Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 15 | enum imx_pllv3_type { | 
|  | 16 | IMX_PLLV3_GENERIC, | 
|  | 17 | IMX_PLLV3_SYS, | 
|  | 18 | IMX_PLLV3_USB, | 
|  | 19 | IMX_PLLV3_AV, | 
|  | 20 | IMX_PLLV3_ENET, | 
|  | 21 | IMX_PLLV3_MLB, | 
|  | 22 | }; | 
|  | 23 |  | 
|  | 24 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, | 
| Sascha Hauer | 2b25469 | 2012-11-22 10:18:41 +0100 | [diff] [blame] | 25 | const char *parent_name, void __iomem *base, u32 div_mask); | 
| Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 26 |  | 
| Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 27 | struct clk *clk_register_gate2(struct device *dev, const char *name, | 
|  | 28 | const char *parent_name, unsigned long flags, | 
|  | 29 | void __iomem *reg, u8 bit_idx, | 
|  | 30 | u8 clk_gate_flags, spinlock_t *lock); | 
|  | 31 |  | 
|  | 32 | static inline struct clk *imx_clk_gate2(const char *name, const char *parent, | 
|  | 33 | void __iomem *reg, u8 shift) | 
|  | 34 | { | 
|  | 35 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, | 
|  | 36 | shift, 0, &imx_ccm_lock); | 
|  | 37 | } | 
|  | 38 |  | 
| Shawn Guo | a10bd67 | 2012-04-04 16:07:53 +0800 | [diff] [blame] | 39 | struct clk *imx_clk_pfd(const char *name, const char *parent_name, | 
|  | 40 | void __iomem *reg, u8 idx); | 
|  | 41 |  | 
| Shawn Guo | 32af7a8 | 2012-04-04 16:20:56 +0800 | [diff] [blame] | 42 | struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, | 
|  | 43 | void __iomem *reg, u8 shift, u8 width, | 
|  | 44 | void __iomem *busy_reg, u8 busy_shift); | 
|  | 45 |  | 
|  | 46 | struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, | 
|  | 47 | u8 width, void __iomem *busy_reg, u8 busy_shift, | 
|  | 48 | const char **parent_names, int num_parents); | 
|  | 49 |  | 
| Sascha Hauer | 6c7b068 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 50 | static inline struct clk *imx_clk_fixed(const char *name, int rate) | 
|  | 51 | { | 
|  | 52 | return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); | 
|  | 53 | } | 
|  | 54 |  | 
|  | 55 | static inline struct clk *imx_clk_divider(const char *name, const char *parent, | 
|  | 56 | void __iomem *reg, u8 shift, u8 width) | 
|  | 57 | { | 
|  | 58 | return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, | 
|  | 59 | reg, shift, width, 0, &imx_ccm_lock); | 
|  | 60 | } | 
|  | 61 |  | 
|  | 62 | static inline struct clk *imx_clk_gate(const char *name, const char *parent, | 
|  | 63 | void __iomem *reg, u8 shift) | 
|  | 64 | { | 
|  | 65 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, | 
|  | 66 | shift, 0, &imx_ccm_lock); | 
|  | 67 | } | 
|  | 68 |  | 
|  | 69 | static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, | 
|  | 70 | u8 shift, u8 width, const char **parents, int num_parents) | 
|  | 71 | { | 
|  | 72 | return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift, | 
|  | 73 | width, 0, &imx_ccm_lock); | 
|  | 74 | } | 
|  | 75 |  | 
|  | 76 | static inline struct clk *imx_clk_fixed_factor(const char *name, | 
|  | 77 | const char *parent, unsigned int mult, unsigned int div) | 
|  | 78 | { | 
|  | 79 | return clk_register_fixed_factor(NULL, name, parent, | 
|  | 80 | CLK_SET_RATE_PARENT, mult, div); | 
|  | 81 | } | 
|  | 82 |  | 
|  | 83 | #endif |