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Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 driver internal defines and structures
3 *
4 * Derived from ivtv-driver.h
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
Andy Walls6afdeaf2010-05-23 18:53:35 -03007 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#ifndef CX18_DRIVER_H
26#define CX18_DRIVER_H
27
28#include <linux/version.h>
29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/sched.h>
34#include <linux/fs.h>
35#include <linux/pci.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/i2c.h>
39#include <linux/i2c-algo-bit.h>
40#include <linux/list.h>
41#include <linux/unistd.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030042#include <linux/pagemap.h>
43#include <linux/workqueue.h>
44#include <linux/mutex.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090045#include <linux/slab.h>
Harvey Harrison1a651a02008-10-18 20:28:37 -070046#include <asm/byteorder.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030047
48#include <linux/dvb/video.h>
49#include <linux/dvb/audio.h>
50#include <media/v4l2-common.h>
Hans Verkuil35ea11f2008-07-20 08:12:02 -030051#include <media/v4l2-ioctl.h>
Andy Walls888cdb02009-01-11 15:08:53 -030052#include <media/v4l2-device.h>
Hans Verkuil0b5f2652011-03-12 06:35:33 -030053#include <media/v4l2-fh.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030054#include <media/tuner.h>
Andy Walls83526192009-11-21 13:39:28 -030055#include <media/ir-kbd-i2c.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030056#include "cx18-mailbox.h"
57#include "cx18-av-core.h"
58#include "cx23418.h"
59
60/* DVB */
61#include "demux.h"
62#include "dmxdev.h"
63#include "dvb_demux.h"
64#include "dvb_frontend.h"
65#include "dvb_net.h"
66#include "dvbdev.h"
67
68#ifndef CONFIG_PCI
69# error "This driver requires kernel PCI support."
70#endif
71
72#define CX18_MEM_OFFSET 0x00000000
73#define CX18_MEM_SIZE 0x04000000
74#define CX18_REG_OFFSET 0x02000000
75
76/* Maximum cx18 driver instances. */
77#define CX18_MAX_CARDS 32
78
79/* Supported cards */
80#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
81#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
82#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
83#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
Sri Deevi03c28082008-06-21 11:06:44 -030084#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
Andy Walls9eee4fb2008-10-04 20:28:40 -030085#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
Andy Walls9d5af862009-06-09 20:37:24 -030086#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
87#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
Alexey Chernova3634362010-10-28 18:12:02 -030088#define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */
Devin Heitmuellere3bfeab2011-02-26 02:44:38 -030089#define CX18_CARD_HVR_1600_S5H1411 9 /* Hauppauge HVR 1600 s5h1411/tda18271*/
90#define CX18_CARD_LAST 9
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030091
92#define CX18_ENC_STREAM_TYPE_MPG 0
93#define CX18_ENC_STREAM_TYPE_TS 1
94#define CX18_ENC_STREAM_TYPE_YUV 2
95#define CX18_ENC_STREAM_TYPE_VBI 3
96#define CX18_ENC_STREAM_TYPE_PCM 4
97#define CX18_ENC_STREAM_TYPE_IDX 5
98#define CX18_ENC_STREAM_TYPE_RAD 6
99#define CX18_MAX_STREAMS 7
100
101/* system vendor and device IDs */
102#define PCI_VENDOR_ID_CX 0x14f1
103#define PCI_DEVICE_ID_CX23418 0x5b7a
104
105/* subsystem vendor ID */
106#define CX18_PCI_ID_HAUPPAUGE 0x0070
107#define CX18_PCI_ID_COMPRO 0x185b
108#define CX18_PCI_ID_YUAN 0x12ab
Sri Deevi03c28082008-06-21 11:06:44 -0300109#define CX18_PCI_ID_CONEXANT 0x14f1
Andy Walls9eee4fb2008-10-04 20:28:40 -0300110#define CX18_PCI_ID_TOSHIBA 0x1179
111#define CX18_PCI_ID_LEADTEK 0x107D
Alexey Chernova3634362010-10-28 18:12:02 -0300112#define CX18_PCI_ID_GOTVIEW 0x5854
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300113
114/* ======================================================================== */
115/* ========================== START USER SETTABLE DMA VARIABLES =========== */
116/* ======================================================================== */
117
118/* DMA Buffers, Default size in MB allocated */
119#define CX18_DEFAULT_ENC_TS_BUFFERS 1
120#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
121#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
122#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
123#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
124#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
125
Andy Walls6ecd86d2008-12-07 23:30:17 -0300126/* Maximum firmware DMA buffers per stream */
Andy Walls0ef02892008-12-14 18:52:12 -0300127#define CX18_MAX_FW_MDLS_PER_STREAM 63
Andy Walls6ecd86d2008-12-07 23:30:17 -0300128
Andy Walls22dce182009-11-09 23:55:30 -0300129/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */
130#define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */
131#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
132#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
133
Andy Wallsefc0b122009-12-30 22:54:53 -0300134/* IDX buffer size should be a multiple of the index entry size from the chip */
135struct cx18_enc_idx_entry {
136 __le32 length;
137 __le32 offset_low;
138 __le32 offset_high;
139 __le32 flags;
140 __le32 pts_low;
141 __le32 pts_high;
142} __attribute__ ((packed));
143#define CX18_UNIT_ENC_IDX_BUFSIZE \
144 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
145
Andy Walls6ecd86d2008-12-07 23:30:17 -0300146/* DMA buffer, default size in kB allocated */
147#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
148#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
Andy Wallsefc0b122009-12-30 22:54:53 -0300149#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
Andy Walls22dce182009-11-09 23:55:30 -0300150#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
Andy Walls6ecd86d2008-12-07 23:30:17 -0300151#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
152
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300153/* i2c stuff */
154#define I2C_CLIENTS_MAX 16
155
156/* debugging */
157
158/* Flag to turn on high volume debugging */
159#define CX18_DBGFLG_WARN (1 << 0)
160#define CX18_DBGFLG_INFO (1 << 1)
161#define CX18_DBGFLG_API (1 << 2)
162#define CX18_DBGFLG_DMA (1 << 3)
163#define CX18_DBGFLG_IOCTL (1 << 4)
164#define CX18_DBGFLG_FILE (1 << 5)
165#define CX18_DBGFLG_I2C (1 << 6)
166#define CX18_DBGFLG_IRQ (1 << 7)
167/* Flag to turn on high volume debugging */
168#define CX18_DBGFLG_HIGHVOL (1 << 8)
169
Andy Walls5811cf92009-02-14 17:08:37 -0300170/* NOTE: extra space before comma in 'fmt , ## args' is required for
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300171 gcc-2.95, otherwise it won't compile. */
172#define CX18_DEBUG(x, type, fmt, args...) \
173 do { \
174 if ((x) & cx18_debug) \
Andy Walls5811cf92009-02-14 17:08:37 -0300175 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300176 } while (0)
177#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
178#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
179#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
180#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
181#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
182#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
183#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
184#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
185
186#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
187 do { \
188 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
Andy Walls5811cf92009-02-14 17:08:37 -0300189 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300190 } while (0)
191#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
192#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
193#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
194#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
195#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
196#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
197#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
198#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
199
200/* Standard kernel messages */
Andy Walls5811cf92009-02-14 17:08:37 -0300201#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args)
202#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args)
203#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300204
Andy Walls6246d4e2009-02-21 22:27:37 -0300205/* Messages for internal subdevs to use */
206#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
207 do { \
208 if ((x) & cx18_debug) \
209 v4l2_info(dev, " " type ": " fmt , ## args); \
210 } while (0)
211#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
212 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
213#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
214 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
215#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
216 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
217#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
218 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
219#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
220 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
221#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
222 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
223#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
224 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
225#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
226 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
227
228#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
229 do { \
230 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
231 v4l2_info(dev, " " type ": " fmt , ## args); \
232 } while (0)
233#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
234 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
235#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
236 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
237#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
238 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
239#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
240 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
241#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
242 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
243#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
244 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
245#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
246 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
247#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
248 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
249
250#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args)
251#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
252#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
253
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300254extern int cx18_debug;
255
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300256struct cx18_options {
257 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
258 int cardtype; /* force card type on load */
259 int tuner; /* set tuner on load */
260 int radio; /* enable/disable radio */
261};
262
Andy Walls52fcb3e2009-11-08 23:45:24 -0300263/* per-mdl bit flags */
264#define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianess swapped */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300265
266/* per-stream, s_flags */
267#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
268#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
269#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
270#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
271#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
Andy Walls87116152009-04-13 22:42:43 -0300272#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300273
274/* per-cx18, i_flags */
Andy Walls1d6782b2008-11-05 00:49:14 -0300275#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */
276#define CX18_F_I_EOS 4 /* End of encoder stream */
277#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */
278#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
Andy Walls1d6782b2008-11-05 00:49:14 -0300279#define CX18_F_I_INITED 21 /* set after first open */
280#define CX18_F_I_FAILED 22 /* set if first open failed */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300281
282/* These are the VBI types as they appear in the embedded VBI private packets. */
283#define CX18_SLICED_TYPE_TELETEXT_B (1)
284#define CX18_SLICED_TYPE_CAPTION_525 (4)
285#define CX18_SLICED_TYPE_WSS_625 (5)
286#define CX18_SLICED_TYPE_VPS (7)
287
Andy Walls82acdc82009-12-31 22:09:51 -0300288/**
289 * list_entry_is_past_end - check if a previous loop cursor is off list end
290 * @pos: the type * previously used as a loop cursor.
291 * @head: the head for your list.
292 * @member: the name of the list_struct within the struct.
293 *
294 * Check if the entry's list_head is the head of the list, thus it's not a
295 * real entry but was the loop cursor that walked past the end
296 */
297#define list_entry_is_past_end(pos, head, member) \
298 (&pos->member == (head))
299
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300300struct cx18_buffer {
301 struct list_head list;
302 dma_addr_t dma_handle;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300303 char *buf;
304
305 u32 bytesused;
306 u32 readpos;
307};
308
Andy Walls52fcb3e2009-11-08 23:45:24 -0300309struct cx18_mdl {
310 struct list_head list;
311 u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */
312
313 unsigned int skipped;
314 unsigned long m_flags;
315
316 struct list_head buf_list;
317 struct cx18_buffer *curr_buf; /* current buffer in list for reading */
318
319 u32 bytesused;
320 u32 readpos;
321};
322
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300323struct cx18_queue {
324 struct list_head list;
Andy Wallsc37b11b2009-11-04 23:13:58 -0300325 atomic_t depth;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300326 u32 bytesused;
Andy Walls40c55202009-04-13 23:08:00 -0300327 spinlock_t lock;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300328};
329
Andy Walls754f9962010-12-11 20:38:20 -0300330struct cx18_stream; /* forward reference */
331
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300332struct cx18_dvb {
Andy Walls754f9962010-12-11 20:38:20 -0300333 struct cx18_stream *stream;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300334 struct dmx_frontend hw_frontend;
335 struct dmx_frontend mem_frontend;
336 struct dmxdev dmxdev;
337 struct dvb_adapter dvb_adapter;
338 struct dvb_demux demux;
339 struct dvb_frontend *fe;
340 struct dvb_net dvbnet;
341 int enabled;
342 int feeding;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300343 struct mutex feedlock;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300344};
345
346struct cx18; /* forward reference */
347struct cx18_scb; /* forward reference */
348
Andy Walls72a4f802008-11-16 21:18:00 -0300349
Andy Wallsee2d64f2008-11-16 01:38:19 -0300350#define CX18_MAX_MDL_ACKS 2
Andy Wallsdeed75e2009-04-13 22:22:40 -0300351#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
Andy Walls0ef02892008-12-14 18:52:12 -0300352/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
Andy Wallsee2d64f2008-11-16 01:38:19 -0300353
Andy Walls72a4f802008-11-16 21:18:00 -0300354#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
355#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
356#define CX18_F_EWO_MB_STALE \
357 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
358
Andy Wallsdeed75e2009-04-13 22:22:40 -0300359struct cx18_in_work_order {
Andy Wallsee2d64f2008-11-16 01:38:19 -0300360 struct work_struct work;
361 atomic_t pending;
362 struct cx18 *cx;
Andy Walls72a4f802008-11-16 21:18:00 -0300363 unsigned long flags;
Andy Wallsee2d64f2008-11-16 01:38:19 -0300364 int rpu;
365 struct cx18_mailbox mb;
366 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
367 char *str;
368};
369
Andy Wallsd3c5e702008-08-23 16:42:29 -0300370#define CX18_INVALID_TASK_HANDLE 0xffffffff
371
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300372struct cx18_stream {
Andy Walls754f9962010-12-11 20:38:20 -0300373 /* These first five fields are always set, even if the stream
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300374 is not actually created. */
Andy Walls3d059132009-01-10 21:54:39 -0300375 struct video_device *video_dev; /* NULL when stream not created */
Andy Walls754f9962010-12-11 20:38:20 -0300376 struct cx18_dvb *dvb; /* DVB / Digital Transport */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300377 struct cx18 *cx; /* for ease of use */
378 const char *name; /* name of the stream */
379 int type; /* stream type */
380 u32 handle; /* task handle */
Andy Wallsfa655dd2009-11-05 21:51:24 -0300381 unsigned int mdl_base_idx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300382
383 u32 id;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300384 unsigned long s_flags; /* status flags, see above */
385 int dma; /* can be PCI_DMA_TODEVICE,
386 PCI_DMA_FROMDEVICE or
387 PCI_DMA_NONE */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300388 wait_queue_head_t waitq;
389
Andy Walls52fcb3e2009-11-08 23:45:24 -0300390 /* Buffers */
391 struct list_head buf_pool; /* buffers not attached to an MDL */
392 u32 buffers; /* total buffers owned by this stream */
393 u32 buf_size; /* size in bytes of a single buffer */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300394
Andy Walls52fcb3e2009-11-08 23:45:24 -0300395 /* MDL sizes - all stream MDLs are the same size */
396 u32 bufs_per_mdl;
397 u32 mdl_size; /* total bytes in all buffers in a mdl */
398
399 /* MDL Queues */
400 struct cx18_queue q_free; /* free - in rotation, not committed */
401 struct cx18_queue q_busy; /* busy - in use by firmware */
402 struct cx18_queue q_full; /* full - data for user apps */
403 struct cx18_queue q_idle; /* idle - not in rotation */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300404
Andy Walls21a278b2009-04-15 20:45:10 -0300405 struct work_struct out_work_order;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300406};
407
408struct cx18_open_id {
Hans Verkuil0b5f2652011-03-12 06:35:33 -0300409 struct v4l2_fh fh;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300410 u32 open_id;
411 int type;
412 enum v4l2_priority prio;
413 struct cx18 *cx;
414};
415
Hans Verkuil0b5f2652011-03-12 06:35:33 -0300416static inline struct cx18_open_id *fh2id(struct v4l2_fh *fh)
417{
418 return container_of(fh, struct cx18_open_id, fh);
419}
420
421static inline struct cx18_open_id *file2id(struct file *file)
422{
423 return fh2id(file->private_data);
424}
425
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300426/* forward declaration of struct defined in cx18-cards.h */
427struct cx18_card;
428
Andy Walls302df972009-01-31 00:33:02 -0300429/*
430 * A note about "sliced" VBI data as implemented in this driver:
431 *
432 * Currently we collect the sliced VBI in the form of Ancillary Data
433 * packets, inserted by the AV core decoder/digitizer/slicer in the
434 * horizontal blanking region of the VBI lines, in "raw" mode as far as
435 * the Encoder is concerned. We don't ever tell the Encoder itself
436 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
437 *
438 * We then process the ancillary data ourselves to send the sliced data
439 * to the user application directly or build up MPEG-2 private stream 1
440 * packets to splice into (only!) MPEG-2 PS streams for the user app.
441 *
442 * (That's how ivtv essentially does it.)
443 *
444 * The Encoder should be able to extract certain sliced VBI data for
445 * us and provide it in a separate stream or splice it into any type of
446 * MPEG PS or TS stream, but this isn't implemented yet.
447 */
448
449/*
450 * Number of "raw" VBI samples per horizontal line we tell the Encoder to
451 * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
452 * It depends on the pixel clock and the horiz rate:
453 *
454 * (1/Fh)*(2*Fp) = Samples/line
455 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
456 *
457 * Sliced VBI data is sent as ancillary data during horizontal blanking
458 * Raw VBI is sent as active video samples during vertcal blanking
459 *
460 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
461 * length of 720 pixels @ 4:2:2 sampling. Thus...
462 *
463 * For systems that use a 15.734 kHz horizontal rate, such as
464 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
465 *
466 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
467 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
468 *
469 * For systems that use a 15.625 kHz horizontal rate, such as
470 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
471 *
472 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
473 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
474 */
475static const u32 vbi_active_samples = 1444; /* 4 byte SAV + 720 Y + 720 U/V */
476static const u32 vbi_hblank_samples_60Hz = 272; /* 4 byte EAV + 268 anc/fill */
477static const u32 vbi_hblank_samples_50Hz = 284; /* 4 byte EAV + 280 anc/fill */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300478
479#define CX18_VBI_FRAMES 32
480
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300481struct vbi_info {
Andy Walls302df972009-01-31 00:33:02 -0300482 /* Current state of v4l2 VBI settings for this device */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300483 struct v4l2_format in;
Andy Walls302df972009-01-31 00:33:02 -0300484 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
485 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
486 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
487
488 u32 frame; /* Count of VBI buffers/frames received from Encoder */
489
490 /*
491 * Vars for creation and insertion of MPEG Private Stream 1 packets
492 * of sliced VBI data into an MPEG PS
493 */
494
495 /* Boolean: create and insert Private Stream 1 packets into the PS */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300496 int insert_mpeg;
497
Andy Walls302df972009-01-31 00:33:02 -0300498 /*
499 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
500 * Used in cx18-vbi.c only for collecting sliced data, and as a source
501 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
502 * We don't need to save state here, but the array may have been a bit
503 * too big (2304 bytes) to alloc from the stack.
504 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300505 struct v4l2_sliced_vbi_data sliced_data[36];
506
Andy Walls302df972009-01-31 00:33:02 -0300507 /*
508 * A ring buffer of driver-generated MPEG-2 PS
509 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
510 * into the MPEG PS stream.
511 *
512 * In each sliced_mpeg_data[] buffer is:
513 * 16 byte MPEG-2 PS Program Pack Header
514 * 16 byte MPEG-2 Private Stream 1 PES Header
515 * 4 byte magic number: "itv0" or "ITV0"
516 * 4 byte first field line mask, if "itv0"
517 * 4 byte second field line mask, if "itv0"
518 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
519 *
520 * Each line in the payload is
521 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
522 * 42 bytes of line data
523 *
524 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
525 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
526 * accept for VBI data. So, including the headers, it's a maximum 1584
527 * bytes total.
528 */
529#define CX18_SLICED_MPEG_DATA_MAXSZ 1584
530 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
531#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300532 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
533 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
Andy Walls302df972009-01-31 00:33:02 -0300534
535 /* Count of Program Pack/Program Stream 1 packets inserted into PS */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300536 u32 inserted_frame;
537
Andy Walls302df972009-01-31 00:33:02 -0300538 /*
Andy Walls52fcb3e2009-11-08 23:45:24 -0300539 * A dummy driver stream transfer mdl & buffer with a copy of the next
Andy Walls302df972009-01-31 00:33:02 -0300540 * sliced_mpeg_data[] buffer for output to userland apps.
541 * Only used in cx18-fileops.c, but its state needs to persist at times.
542 */
Andy Walls52fcb3e2009-11-08 23:45:24 -0300543 struct cx18_mdl sliced_mpeg_mdl;
Andy Walls302df972009-01-31 00:33:02 -0300544 struct cx18_buffer sliced_mpeg_buf;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300545};
546
547/* Per cx23418, per I2C bus private algo callback data */
548struct cx18_i2c_algo_callback_data {
549 struct cx18 *cx;
550 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
551};
552
Andy Wallsf7823f82008-11-02 18:15:28 -0300553#define CX18_MAX_MMIO_WR_RETRIES 10
Andy Walls330c6ec2008-11-08 14:19:37 -0300554
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300555/* Struct to hold info about cx18 cards */
556struct cx18 {
Andy Walls5811cf92009-02-14 17:08:37 -0300557 int instance;
Andy Walls3d059132009-01-10 21:54:39 -0300558 struct pci_dev *pci_dev;
Andy Walls888cdb02009-01-11 15:08:53 -0300559 struct v4l2_device v4l2_dev;
Andy Wallsff2a2002009-02-20 23:52:13 -0300560 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */
Andy Wallseefe1012009-02-21 18:42:49 -0300561 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
Andy Walls888cdb02009-01-11 15:08:53 -0300562
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300563 const struct cx18_card *card; /* card information */
564 const char *card_name; /* full name of the card */
565 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
566 u8 is_50hz;
567 u8 is_60hz;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300568 u8 nof_inputs; /* number of video inputs */
569 u8 nof_audio_inputs; /* number of audio inputs */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300570 u32 v4l2_cap; /* V4L2 capabilities of card */
571 u32 hw_flags; /* Hardware description of the board */
Andy Wallsfa655dd2009-11-05 21:51:24 -0300572 unsigned int free_mdl_idx;
Andy Walls72c2d6d2008-11-06 01:15:41 -0300573 struct cx18_scb __iomem *scb; /* pointer to SCB */
574 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
575 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
576
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300577 struct cx18_av_state av_state;
578
579 /* codec settings */
Hans Verkuila75b9be2010-12-31 10:22:52 -0300580 struct cx2341x_handler cxhdl;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300581 u32 filter_mode;
582 u32 temporal_strength;
583 u32 spatial_strength;
584
585 /* dualwatch */
586 unsigned long dualwatch_jiffies;
Andy Walls0d82fe82009-01-01 19:02:31 -0300587 u32 dualwatch_stereo_mode;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300588
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300589 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
590 struct cx18_options options; /* User options */
Andy Walls6ecd86d2008-12-07 23:30:17 -0300591 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300592 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
593 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
Andy Walls9722c8f2009-05-25 21:40:25 -0300594 struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */
Devin Heitmueller9972de92010-01-18 21:29:51 -0300595 void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data,
596 size_t num_bytes);
597
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300598 unsigned long i_flags; /* global cx18 flags */
Hans Verkuil31554ae2008-05-25 11:21:27 -0300599 atomic_t ana_capturing; /* count number of active analog capture streams */
600 atomic_t tot_capturing; /* total count number of active capture streams */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300601 int search_pack_header;
602
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300603 int open_id; /* incremented each time an open occurs, used as
604 unique ID. Starts at 1, so 0 can be used as
605 uninitialized value in the stream->id. */
606
607 u32 base_addr;
608 struct v4l2_prio_state prio;
609
610 u8 card_rev;
611 void __iomem *enc_mem, *reg_mem;
612
613 struct vbi_info vbi;
614
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300615 u64 mpg_data_received;
616 u64 vbi_data_inserted;
617
618 wait_queue_head_t mb_apu_waitq;
619 wait_queue_head_t mb_cpu_waitq;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300620 wait_queue_head_t cap_w;
621 /* when the current DMA is finished this queue is woken up */
622 wait_queue_head_t dma_waitq;
623
Andy Wallsd6c7e5f2008-11-17 22:48:46 -0300624 u32 sw1_irq_mask;
625 u32 sw2_irq_mask;
626 u32 hw2_irq_mask;
627
Andy Wallsdeed75e2009-04-13 22:22:40 -0300628 struct workqueue_struct *in_work_queue;
629 char in_workq_name[11]; /* "cx18-NN-in" */
630 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
Andy Wallsee2d64f2008-11-16 01:38:19 -0300631 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
Andy Walls1d6782b2008-11-05 00:49:14 -0300632
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300633 /* i2c */
634 struct i2c_adapter i2c_adap[2];
635 struct i2c_algo_bit_data i2c_algo[2];
636 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300637
Andy Walls83526192009-11-21 13:39:28 -0300638 struct IR_i2c_init_data ir_i2c_init_data;
639
Hans Verkuilba60bc62008-05-25 14:34:36 -0300640 /* gpio */
641 u32 gpio_dir;
642 u32 gpio_val;
Andy Walls8abdd002008-07-13 19:05:25 -0300643 struct mutex gpio_lock;
Andy Wallseefe1012009-02-21 18:42:49 -0300644 struct v4l2_subdev sd_gpiomux;
645 struct v4l2_subdev sd_resetctrl;
Hans Verkuilba60bc62008-05-25 14:34:36 -0300646
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300647 /* v4l2 and User settings */
648
649 /* codec settings */
650 u32 audio_input;
651 u32 active_input;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300652 v4l2_std_id std;
653 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
Devin Heitmuellerd68b6872009-11-20 01:15:54 -0300654
655 /* Used for cx18-alsa module loading */
656 struct work_struct request_module_wk;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300657};
658
Andy Walls5811cf92009-02-14 17:08:37 -0300659static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
660{
661 return container_of(v4l2_dev, struct cx18, v4l2_dev);
662}
663
Devin Heitmuellerd68b6872009-11-20 01:15:54 -0300664/* cx18 extensions to be loaded */
665extern int (*cx18_ext_init)(struct cx18 *);
666
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300667/* Globals */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300668extern int cx18_first_minor;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300669
670/*==============Prototypes==================*/
671
672/* Return non-zero if a signal is pending */
673int cx18_msleep_timeout(unsigned int msecs, int intr);
674
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300675/* Read Hauppauge eeprom */
676struct tveeprom; /* forward reference */
677void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
678
679/* First-open initialization: load firmware, etc. */
680int cx18_init_on_first_open(struct cx18 *cx);
681
Andy Wallsdd073432008-12-12 16:24:04 -0300682/* Test if the current VBI mode is raw (1) or sliced (0) */
683static inline int cx18_raw_vbi(const struct cx18 *cx)
684{
685 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
686}
687
Andy Wallsff2a2002009-02-20 23:52:13 -0300688/* Call the specified callback for all subdevs with a grp_id bit matching the
689 * mask in hw (if 0, then match them all). Ignore any errors. */
Guennadi Liakhovetski6c2d4dd2010-08-12 17:16:00 -0300690#define cx18_call_hw(cx, hw, o, f, args...) \
691 do { \
692 struct v4l2_subdev *__sd; \
693 __v4l2_device_call_subdevs_p(&(cx)->v4l2_dev, __sd, \
694 !(hw) || (__sd->grp_id & (hw)), o, f , ##args); \
695 } while (0)
Andy Wallsff2a2002009-02-20 23:52:13 -0300696
697#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
698
699/* Call the specified callback for all subdevs with a grp_id bit matching the
700 * mask in hw (if 0, then match them all). If the callback returns an error
701 * other than 0 or -ENOIOCTLCMD, then return with that error code. */
Guennadi Liakhovetski6c2d4dd2010-08-12 17:16:00 -0300702#define cx18_call_hw_err(cx, hw, o, f, args...) \
703({ \
704 struct v4l2_subdev *__sd; \
705 __v4l2_device_call_subdevs_until_err_p(&(cx)->v4l2_dev, \
706 __sd, !(hw) || (__sd->grp_id & (hw)), o, f, \
707 ##args); \
708})
Andy Wallsff2a2002009-02-20 23:52:13 -0300709
710#define cx18_call_all_err(cx, o, f, args...) \
711 cx18_call_hw_err(cx, 0, o, f , ##args)
712
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300713#endif /* CX18_DRIVER_H */