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Takashi Iwaief5fa1a2007-07-27 16:52:46 +02001#ifndef __SOUND_HDSPM_H
Takashi Iwai763f3562005-06-03 11:25:34 +02002#define __SOUND_HDSPM_H
3/*
4 * Copyright (C) 2003 Winfried Ritsch (IEM)
5 * based on hdsp.h from Thomas Charbonnel (thomas@undata.org)
Adrian Knoth0dca1792011-01-26 19:32:14 +01006 *
7 *
Takashi Iwai763f3562005-06-03 11:25:34 +02008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23/* Maximum channels is 64 even on 56Mode you have 64playbacks to matrix */
24#define HDSPM_MAX_CHANNELS 64
25
Adrian Knoth0dca1792011-01-26 19:32:14 +010026enum hdspm_io_type {
27 MADI,
28 MADIface,
29 AIO,
30 AES32,
31 RayDAT
32};
33
34enum hdspm_speed {
35 ss,
36 ds,
37 qs
38};
39
Takashi Iwai763f3562005-06-03 11:25:34 +020040/* -------------------- IOCTL Peak/RMS Meters -------------------- */
41
Takashi Iwai98274f02005-11-17 14:52:34 +010042struct hdspm_peak_rms {
Adrian Knoth0dca1792011-01-26 19:32:14 +010043 uint32_t input_peaks[64];
44 uint32_t playback_peaks[64];
45 uint32_t output_peaks[64];
Takashi Iwai763f3562005-06-03 11:25:34 +020046
Adrian Knoth0dca1792011-01-26 19:32:14 +010047 uint64_t input_rms[64];
48 uint64_t playback_rms[64];
49 uint64_t output_rms[64];
Takashi Iwai763f3562005-06-03 11:25:34 +020050
Adrian Knoth0dca1792011-01-26 19:32:14 +010051 uint8_t speed; /* enum {ss, ds, qs} */
52 int status2;
Takashi Iwai763f3562005-06-03 11:25:34 +020053};
54
Takashi Iwaief5fa1a2007-07-27 16:52:46 +020055#define SNDRV_HDSPM_IOCTL_GET_PEAK_RMS \
Adrian Knoth0dca1792011-01-26 19:32:14 +010056 _IOR('H', 0x42, struct hdspm_peak_rms)
Takashi Iwai763f3562005-06-03 11:25:34 +020057
58/* ------------ CONFIG block IOCTL ---------------------- */
59
Adrian Knoth0dca1792011-01-26 19:32:14 +010060struct hdspm_config {
Takashi Iwai763f3562005-06-03 11:25:34 +020061 unsigned char pref_sync_ref;
62 unsigned char wordclock_sync_check;
63 unsigned char madi_sync_check;
64 unsigned int system_sample_rate;
65 unsigned int autosync_sample_rate;
66 unsigned char system_clock_mode;
67 unsigned char clock_source;
68 unsigned char autosync_ref;
69 unsigned char line_out;
70 unsigned int passthru;
71 unsigned int analog_out;
72};
73
Adrian Knoth0dca1792011-01-26 19:32:14 +010074#define SNDRV_HDSPM_IOCTL_GET_CONFIG \
75 _IOR('H', 0x41, struct hdspm_config)
Takashi Iwai763f3562005-06-03 11:25:34 +020076
Adrian Knoth0dca1792011-01-26 19:32:14 +010077/**
78 * If there's a TCO (TimeCode Option) board installed,
79 * there are further options and status data available.
80 * The hdspm_ltc structure contains the current SMPTE
81 * timecode and some status information and can be
82 * obtained via SNDRV_HDSPM_IOCTL_GET_LTC or in the
83 * hdspm_status struct.
84 **/
Takashi Iwai763f3562005-06-03 11:25:34 +020085
Adrian Knoth0dca1792011-01-26 19:32:14 +010086enum hdspm_ltc_format {
87 format_invalid,
88 fps_24,
89 fps_25,
90 fps_2997,
91 fps_30
Takashi Iwai763f3562005-06-03 11:25:34 +020092};
93
Adrian Knoth0dca1792011-01-26 19:32:14 +010094enum hdspm_ltc_frame {
95 frame_invalid,
96 drop_frame,
97 full_frame
98};
Takashi Iwai763f3562005-06-03 11:25:34 +020099
Adrian Knoth0dca1792011-01-26 19:32:14 +0100100enum hdspm_ltc_input_format {
101 ntsc,
102 pal,
103 no_video
104};
105
106struct hdspm_ltc {
107 unsigned int ltc;
108
109 enum hdspm_ltc_format format;
110 enum hdspm_ltc_frame frame;
111 enum hdspm_ltc_input_format input_format;
112};
113
114#define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_mixer_ioctl)
115
116/**
117 * The status data reflects the device's current state
118 * as determined by the card's configuration and
119 * connection status.
120 **/
121
122enum hdspm_sync {
123 hdspm_sync_no_lock = 0,
124 hdspm_sync_lock = 1,
125 hdspm_sync_sync = 2
126};
127
128enum hdspm_madi_input {
129 hdspm_input_optical = 0,
130 hdspm_input_coax = 1
131};
132
133enum hdspm_madi_channel_format {
134 hdspm_format_ch_64 = 0,
135 hdspm_format_ch_56 = 1
136};
137
138enum hdspm_madi_frame_format {
139 hdspm_frame_48 = 0,
140 hdspm_frame_96 = 1
141};
142
143enum hdspm_syncsource {
144 syncsource_wc = 0,
145 syncsource_madi = 1,
146 syncsource_tco = 2,
147 syncsource_sync = 3,
148 syncsource_none = 4
149};
150
151struct hdspm_status {
152 uint8_t card_type; /* enum hdspm_io_type */
153 enum hdspm_syncsource autosync_source;
154
155 uint64_t card_clock;
156 uint32_t master_period;
157
158 union {
159 struct {
160 uint8_t sync_wc; /* enum hdspm_sync */
161 uint8_t sync_madi; /* enum hdspm_sync */
162 uint8_t sync_tco; /* enum hdspm_sync */
163 uint8_t sync_in; /* enum hdspm_sync */
164 uint8_t madi_input; /* enum hdspm_madi_input */
165 uint8_t channel_format; /* enum hdspm_madi_channel_format */
166 uint8_t frame_format; /* enum hdspm_madi_frame_format */
167 } madi;
168 } card_specific;
169};
170
171#define SNDRV_HDSPM_IOCTL_GET_STATUS \
172 _IOR('H', 0x47, struct hdspm_status)
173
174/**
175 * Get information about the card and its add-ons.
176 **/
177
178#define HDSPM_ADDON_TCO 1
179
180struct hdspm_version {
181 uint8_t card_type; /* enum hdspm_io_type */
182 char cardname[20];
183 unsigned int serial;
184 unsigned short firmware_rev;
185 int addons;
186};
187
188#define SNDRV_HDSPM_IOCTL_GET_VERSION _IOR('H', 0x48, struct hdspm_version)
Takashi Iwai763f3562005-06-03 11:25:34 +0200189
190/* ------------- get Matrix Mixer IOCTL --------------- */
191
Takashi Iwaief5fa1a2007-07-27 16:52:46 +0200192/* MADI mixer: 64inputs+64playback in 64outputs = 8192 => *4Byte =
193 * 32768 Bytes
194 */
Takashi Iwai763f3562005-06-03 11:25:34 +0200195
196/* organisation is 64 channelfader in a continous memory block */
Takashi Iwaief5fa1a2007-07-27 16:52:46 +0200197/* equivalent to hardware definition, maybe for future feature of mmap of
198 * them
199 */
Adrian Knoth0dca1792011-01-26 19:32:14 +0100200/* each of 64 outputs has 64 infader and 64 outfader:
Takashi Iwai763f3562005-06-03 11:25:34 +0200201 Ins to Outs mixer[out].in[in], Outstreams to Outs mixer[out].pb[pb] */
202
203#define HDSPM_MIXER_CHANNELS HDSPM_MAX_CHANNELS
204
Takashi Iwai98274f02005-11-17 14:52:34 +0100205struct hdspm_channelfader {
Takashi Iwai763f3562005-06-03 11:25:34 +0200206 unsigned int in[HDSPM_MIXER_CHANNELS];
207 unsigned int pb[HDSPM_MIXER_CHANNELS];
208};
209
Takashi Iwai98274f02005-11-17 14:52:34 +0100210struct hdspm_mixer {
211 struct hdspm_channelfader ch[HDSPM_MIXER_CHANNELS];
Takashi Iwai763f3562005-06-03 11:25:34 +0200212};
213
Takashi Iwai98274f02005-11-17 14:52:34 +0100214struct hdspm_mixer_ioctl {
215 struct hdspm_mixer *mixer;
Takashi Iwai763f3562005-06-03 11:25:34 +0200216};
217
218/* use indirect access due to the limit of ioctl bit size */
Takashi Iwai98274f02005-11-17 14:52:34 +0100219#define SNDRV_HDSPM_IOCTL_GET_MIXER _IOR('H', 0x44, struct hdspm_mixer_ioctl)
220
221/* typedefs for compatibility to user-space */
222typedef struct hdspm_peak_rms hdspm_peak_rms_t;
223typedef struct hdspm_config_info hdspm_config_info_t;
224typedef struct hdspm_version hdspm_version_t;
225typedef struct hdspm_channelfader snd_hdspm_channelfader_t;
226typedef struct hdspm_mixer hdspm_mixer_t;
Takashi Iwai763f3562005-06-03 11:25:34 +0200227
Adrian Knoth0dca1792011-01-26 19:32:14 +0100228/* These tables map the ALSA channels 1..N to the channels that we
229 need to use in order to find the relevant channel buffer. RME
230 refers to this kind of mapping as between "the ADAT channel and
231 the DMA channel." We index it using the logical audio channel,
232 and the value is the DMA channel (i.e. channel buffer number)
233 where the data for that channel can be read/written from/to.
234*/
235
236char channel_map_unity_ss[HDSPM_MAX_CHANNELS] = {
237 0, 1, 2, 3, 4, 5, 6, 7,
238 8, 9, 10, 11, 12, 13, 14, 15,
239 16, 17, 18, 19, 20, 21, 22, 23,
240 24, 25, 26, 27, 28, 29, 30, 31,
241 32, 33, 34, 35, 36, 37, 38, 39,
242 40, 41, 42, 43, 44, 45, 46, 47,
243 48, 49, 50, 51, 52, 53, 54, 55,
244 56, 57, 58, 59, 60, 61, 62, 63
245};
246
247char channel_map_unity_ds[HDSPM_MAX_CHANNELS] = {
248 0, 2, 4, 6, 8, 10, 12, 14,
249 16, 18, 20, 22, 24, 26, 28, 30,
250 32, 34, 36, 38, 40, 42, 44, 46,
251 48, 50, 52, 54, 56, 58, 60, 62,
252 -1, -1, -1, -1, -1, -1, -1, -1,
253 -1, -1, -1, -1, -1, -1, -1, -1,
254 -1, -1, -1, -1, -1, -1, -1, -1,
255 -1, -1, -1, -1, -1, -1, -1, -1,
256};
257
258char channel_map_unity_qs[HDSPM_MAX_CHANNELS] = {
259 0, 4, 8, 12, 16, 20, 24, 28,
260 32, 36, 40, 44, 48, 52, 56, 60,
261 -1, -1, -1, -1, -1, -1, -1, -1,
262 -1, -1, -1, -1, -1, -1, -1, -1,
263 -1, -1, -1, -1, -1, -1, -1, -1,
264 -1, -1, -1, -1, -1, -1, -1, -1,
265 -1, -1, -1, -1, -1, -1, -1, -1,
266 -1, -1, -1, -1, -1, -1, -1, -1,
267};
268
269char channel_map_raydat_ss[HDSPM_MAX_CHANNELS] = {
270 4, 5, 6, 7, 8, 9, 10, 11, /* ADAT 1 */
271 12, 13, 14, 15, 16, 17, 18, 19, /* ADAT 2 */
272 20, 21, 22, 23, 24, 25, 26, 27, /* ADAT 3 */
273 28, 29, 30, 31, 32, 33, 34, 35, /* ADAT 4 */
274 0, 1, /* AES */
275 2, 3, /* SPDIF */
276 -1, -1, -1, -1,
277 -1, -1, -1, -1, -1, -1, -1, -1,
278 -1, -1, -1, -1, -1, -1, -1, -1,
279 -1, -1, -1, -1, -1, -1, -1, -1,
280};
281
282char channel_map_raydat_ds[HDSPM_MAX_CHANNELS] = {
283 4, 5, 6, 7, /* ADAT 1 */
284 8, 9, 10, 11, /* ADAT 2 */
285 12, 13, 14, 15, /* ADAT 3 */
286 16, 17, 18, 19, /* ADAT 4 */
287 0, 1, /* AES */
288 2, 3, /* SPDIF */
289 -1, -1, -1, -1,
290 -1, -1, -1, -1, -1, -1, -1, -1,
291 -1, -1, -1, -1, -1, -1, -1, -1,
292 -1, -1, -1, -1, -1, -1, -1, -1,
293 -1, -1, -1, -1, -1, -1, -1, -1,
294 -1, -1, -1, -1, -1, -1, -1, -1,
295};
296
297char channel_map_raydat_qs[HDSPM_MAX_CHANNELS] = {
298 4, 5, /* ADAT 1 */
299 6, 7, /* ADAT 2 */
300 8, 9, /* ADAT 3 */
301 10, 11, /* ADAT 4 */
302 0, 1, /* AES */
303 2, 3, /* SPDIF */
304 -1, -1, -1, -1,
305 -1, -1, -1, -1, -1, -1, -1, -1,
306 -1, -1, -1, -1, -1, -1, -1, -1,
307 -1, -1, -1, -1, -1, -1, -1, -1,
308 -1, -1, -1, -1, -1, -1, -1, -1,
309 -1, -1, -1, -1, -1, -1, -1, -1,
310 -1, -1, -1, -1, -1, -1, -1, -1,
311};
312
313char channel_map_aio_in_ss[HDSPM_MAX_CHANNELS] = {
314 0, 1, /* line in */
315 8, 9, /* aes in, */
316 10, 11, /* spdif in */
317 12, 13, 14, 15, 16, 17, 18, 19, /* ADAT in */
318 -1, -1,
319 -1, -1, -1, -1, -1, -1, -1, -1,
320 -1, -1, -1, -1, -1, -1, -1, -1,
321 -1, -1, -1, -1, -1, -1, -1, -1,
322 -1, -1, -1, -1, -1, -1, -1, -1,
323 -1, -1, -1, -1, -1, -1, -1, -1,
324 -1, -1, -1, -1, -1, -1, -1, -1,
325};
326
327char channel_map_aio_out_ss[HDSPM_MAX_CHANNELS] = {
328 0, 1, /* line out */
329 8, 9, /* aes out */
330 10, 11, /* spdif out */
331 12, 13, 14, 15, 16, 17, 18, 19, /* ADAT out */
332 6, 7, /* phone out */
333 -1, -1, -1, -1, -1, -1, -1, -1,
334 -1, -1, -1, -1, -1, -1, -1, -1,
335 -1, -1, -1, -1, -1, -1, -1, -1,
336 -1, -1, -1, -1, -1, -1, -1, -1,
337 -1, -1, -1, -1, -1, -1, -1, -1,
338 -1, -1, -1, -1, -1, -1, -1, -1,
339};
340
341char channel_map_aio_in_ds[HDSPM_MAX_CHANNELS] = {
342 0, 1, /* line in */
343 8, 9, /* aes in */
344 10, 11, /* spdif in */
345 12, 14, 16, 18, /* adat in */
346 -1, -1, -1, -1, -1, -1,
347 -1, -1, -1, -1, -1, -1, -1, -1,
348 -1, -1, -1, -1, -1, -1, -1, -1,
349 -1, -1, -1, -1, -1, -1, -1, -1,
350 -1, -1, -1, -1, -1, -1, -1, -1,
351 -1, -1, -1, -1, -1, -1, -1, -1,
352 -1, -1, -1, -1, -1, -1, -1, -1
353};
354
355char channel_map_aio_out_ds[HDSPM_MAX_CHANNELS] = {
356 0, 1, /* line out */
357 8, 9, /* aes out */
358 10, 11, /* spdif out */
359 12, 14, 16, 18, /* adat out */
360 6, 7, /* phone out */
361 -1, -1, -1, -1,
362 -1, -1, -1, -1, -1, -1, -1, -1,
363 -1, -1, -1, -1, -1, -1, -1, -1,
364 -1, -1, -1, -1, -1, -1, -1, -1,
365 -1, -1, -1, -1, -1, -1, -1, -1,
366 -1, -1, -1, -1, -1, -1, -1, -1,
367 -1, -1, -1, -1, -1, -1, -1, -1
368};
369
370char channel_map_aio_in_qs[HDSPM_MAX_CHANNELS] = {
371 0, 1, /* line in */
372 8, 9, /* aes in */
373 10, 11, /* spdif in */
374 12, 16, /* adat in */
375 -1, -1, -1, -1, -1, -1, -1, -1,
376 -1, -1, -1, -1, -1, -1, -1, -1,
377 -1, -1, -1, -1, -1, -1, -1, -1,
378 -1, -1, -1, -1, -1, -1, -1, -1,
379 -1, -1, -1, -1, -1, -1, -1, -1,
380 -1, -1, -1, -1, -1, -1, -1, -1,
381 -1, -1, -1, -1, -1, -1, -1, -1
382};
383
384char channel_map_aio_out_qs[HDSPM_MAX_CHANNELS] = {
385 0, 1, /* line out */
386 8, 9, /* aes out */
387 10, 11, /* spdif out */
388 12, 16, /* adat out */
389 6, 7, /* phone out */
390 -1, -1, -1, -1, -1, -1,
391 -1, -1, -1, -1, -1, -1, -1, -1,
392 -1, -1, -1, -1, -1, -1, -1, -1,
393 -1, -1, -1, -1, -1, -1, -1, -1,
394 -1, -1, -1, -1, -1, -1, -1, -1,
395 -1, -1, -1, -1, -1, -1, -1, -1,
396 -1, -1, -1, -1, -1, -1, -1, -1
397};
398
399#endif