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Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 init/start/stop/exit stream functions
3 *
4 * Derived from ivtv-streams.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
Andy Walls6afdeaf2010-05-23 18:53:35 -03007 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include "cx18-driver.h"
Andy Wallsb1526422008-08-30 16:03:44 -030026#include "cx18-io.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030027#include "cx18-fileops.h"
28#include "cx18-mailbox.h"
29#include "cx18-i2c.h"
30#include "cx18-queue.h"
31#include "cx18-ioctl.h"
32#include "cx18-streams.h"
33#include "cx18-cards.h"
34#include "cx18-scb.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030035#include "cx18-dvb.h"
36
37#define CX18_DSP0_INTERRUPT_MASK 0xd0004C
38
Hans Verkuilbec43662008-12-30 06:58:20 -030039static struct v4l2_file_operations cx18_v4l2_enc_fops = {
Hans Verkuildaf20d92008-05-12 11:21:58 -030040 .owner = THIS_MODULE,
41 .read = cx18_v4l2_read,
42 .open = cx18_v4l2_open,
Andy Walls3b6fe582008-06-21 08:36:31 -030043 /* FIXME change to video_ioctl2 if serialization lock can be removed */
Hans Verkuil78b055b2010-11-19 17:04:31 -030044 .unlocked_ioctl = cx18_v4l2_ioctl,
Hans Verkuildaf20d92008-05-12 11:21:58 -030045 .release = cx18_v4l2_close,
46 .poll = cx18_v4l2_enc_poll,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030047};
48
49/* offset from 0 to register ts v4l2 minors on */
50#define CX18_V4L2_ENC_TS_OFFSET 16
51/* offset from 0 to register pcm v4l2 minors on */
52#define CX18_V4L2_ENC_PCM_OFFSET 24
53/* offset from 0 to register yuv v4l2 minors on */
54#define CX18_V4L2_ENC_YUV_OFFSET 32
55
56static struct {
57 const char *name;
58 int vfl_type;
Hans Verkuildd896012008-10-04 08:36:54 -030059 int num_offset;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030060 int dma;
61 enum v4l2_buf_type buf_type;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030062} cx18_stream_info[] = {
63 { /* CX18_ENC_STREAM_TYPE_MPG */
64 "encoder MPEG",
65 VFL_TYPE_GRABBER, 0,
66 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030067 },
68 { /* CX18_ENC_STREAM_TYPE_TS */
69 "TS",
70 VFL_TYPE_GRABBER, -1,
71 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030072 },
73 { /* CX18_ENC_STREAM_TYPE_YUV */
74 "encoder YUV",
75 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
76 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030077 },
78 { /* CX18_ENC_STREAM_TYPE_VBI */
79 "encoder VBI",
80 VFL_TYPE_VBI, 0,
81 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030082 },
83 { /* CX18_ENC_STREAM_TYPE_PCM */
84 "encoder PCM audio",
85 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
86 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030087 },
88 { /* CX18_ENC_STREAM_TYPE_IDX */
89 "encoder IDX",
90 VFL_TYPE_GRABBER, -1,
91 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030092 },
93 { /* CX18_ENC_STREAM_TYPE_RAD */
94 "encoder radio",
95 VFL_TYPE_RADIO, 0,
96 PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030097 },
98};
99
100static void cx18_stream_init(struct cx18 *cx, int type)
101{
102 struct cx18_stream *s = &cx->streams[type];
Andy Walls3d059132009-01-10 21:54:39 -0300103 struct video_device *video_dev = s->video_dev;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300104
Andy Walls3d059132009-01-10 21:54:39 -0300105 /* we need to keep video_dev, so restore it afterwards */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300106 memset(s, 0, sizeof(*s));
Andy Walls3d059132009-01-10 21:54:39 -0300107 s->video_dev = video_dev;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300108
109 /* initialize cx18_stream fields */
Andy Walls754f9962010-12-11 20:38:20 -0300110 s->dvb = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300111 s->cx = cx;
112 s->type = type;
113 s->name = cx18_stream_info[type].name;
Andy Wallsd3c5e702008-08-23 16:42:29 -0300114 s->handle = CX18_INVALID_TASK_HANDLE;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300115
116 s->dma = cx18_stream_info[type].dma;
Andy Walls6ecd86d2008-12-07 23:30:17 -0300117 s->buffers = cx->stream_buffers[type];
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300118 s->buf_size = cx->stream_buf_size[type];
Andy Walls52fcb3e2009-11-08 23:45:24 -0300119 INIT_LIST_HEAD(&s->buf_pool);
120 s->bufs_per_mdl = 1;
121 s->mdl_size = s->buf_size * s->bufs_per_mdl;
Andy Walls6ecd86d2008-12-07 23:30:17 -0300122
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300123 init_waitqueue_head(&s->waitq);
124 s->id = -1;
Andy Walls40c55202009-04-13 23:08:00 -0300125 spin_lock_init(&s->q_free.lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300126 cx18_queue_init(&s->q_free);
Andy Walls40c55202009-04-13 23:08:00 -0300127 spin_lock_init(&s->q_busy.lock);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300128 cx18_queue_init(&s->q_busy);
Andy Walls40c55202009-04-13 23:08:00 -0300129 spin_lock_init(&s->q_full.lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300130 cx18_queue_init(&s->q_full);
Andy Walls52fcb3e2009-11-08 23:45:24 -0300131 spin_lock_init(&s->q_idle.lock);
132 cx18_queue_init(&s->q_idle);
Andy Walls21a278b2009-04-15 20:45:10 -0300133
134 INIT_WORK(&s->out_work_order, cx18_out_work_handler);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300135}
136
137static int cx18_prep_dev(struct cx18 *cx, int type)
138{
139 struct cx18_stream *s = &cx->streams[type];
140 u32 cap = cx->v4l2_cap;
Hans Verkuildd896012008-10-04 08:36:54 -0300141 int num_offset = cx18_stream_info[type].num_offset;
Andy Walls5811cf92009-02-14 17:08:37 -0300142 int num = cx->instance + cx18_first_minor + num_offset;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300143
Andy Walls754f9962010-12-11 20:38:20 -0300144 /*
145 * These five fields are always initialized.
146 * For analog capture related streams, if video_dev == NULL then the
147 * stream is not in use.
148 * For the TS stream, if dvb == NULL then the stream is not in use.
149 * In those cases no other fields but these four can be used.
150 */
Andy Walls3d059132009-01-10 21:54:39 -0300151 s->video_dev = NULL;
Andy Walls754f9962010-12-11 20:38:20 -0300152 s->dvb = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300153 s->cx = cx;
154 s->type = type;
155 s->name = cx18_stream_info[type].name;
156
157 /* Check whether the radio is supported */
158 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
159 return 0;
160
161 /* Check whether VBI is supported */
162 if (type == CX18_ENC_STREAM_TYPE_VBI &&
163 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
164 return 0;
165
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300166 /* User explicitly selected 0 buffers for these streams, so don't
167 create them. */
168 if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
Andy Walls6ecd86d2008-12-07 23:30:17 -0300169 cx->stream_buffers[type] == 0) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300170 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
171 return 0;
172 }
173
174 cx18_stream_init(cx, type);
175
Andy Walls754f9962010-12-11 20:38:20 -0300176 /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
177 if (type == CX18_ENC_STREAM_TYPE_TS) {
178 if (cx->card->hw_all & CX18_HW_DVB) {
179 s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
180 if (s->dvb == NULL) {
181 CX18_ERR("Couldn't allocate cx18_dvb structure"
182 " for %s\n", s->name);
183 return -ENOMEM;
184 }
185 } else {
186 /* Don't need buffers for the TS, if there is no DVB */
187 s->buffers = 0;
188 }
189 }
190
Hans Verkuildd896012008-10-04 08:36:54 -0300191 if (num_offset == -1)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300192 return 0;
193
194 /* allocate and initialize the v4l2 video device structure */
Andy Walls3d059132009-01-10 21:54:39 -0300195 s->video_dev = video_device_alloc();
196 if (s->video_dev == NULL) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300197 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
198 s->name);
199 return -ENOMEM;
200 }
201
Andy Walls5811cf92009-02-14 17:08:37 -0300202 snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
203 cx->v4l2_dev.name, s->name);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300204
Andy Walls3d059132009-01-10 21:54:39 -0300205 s->video_dev->num = num;
Andy Walls5811cf92009-02-14 17:08:37 -0300206 s->video_dev->v4l2_dev = &cx->v4l2_dev;
Andy Walls3d059132009-01-10 21:54:39 -0300207 s->video_dev->fops = &cx18_v4l2_enc_fops;
208 s->video_dev->release = video_device_release;
209 s->video_dev->tvnorms = V4L2_STD_ALL;
Hans Verkuilb1a873a2011-03-22 10:14:07 -0300210 set_bit(V4L2_FL_USE_FH_PRIO, &s->video_dev->flags);
Andy Walls3d059132009-01-10 21:54:39 -0300211 cx18_set_funcs(s->video_dev);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300212 return 0;
213}
214
215/* Initialize v4l2 variables and register v4l2 devices */
216int cx18_streams_setup(struct cx18 *cx)
217{
Andy Walls9b4a7c82008-10-18 10:20:25 -0300218 int type, ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300219
220 /* Setup V4L2 Devices */
221 for (type = 0; type < CX18_MAX_STREAMS; type++) {
222 /* Prepare device */
Andy Walls9b4a7c82008-10-18 10:20:25 -0300223 ret = cx18_prep_dev(cx, type);
224 if (ret < 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300225 break;
226
227 /* Allocate Stream */
Andy Walls9b4a7c82008-10-18 10:20:25 -0300228 ret = cx18_stream_alloc(&cx->streams[type]);
229 if (ret < 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300230 break;
231 }
232 if (type == CX18_MAX_STREAMS)
233 return 0;
234
235 /* One or more streams could not be initialized. Clean 'em all up. */
Hans Verkuil3f983872008-05-01 10:31:12 -0300236 cx18_streams_cleanup(cx, 0);
Andy Walls9b4a7c82008-10-18 10:20:25 -0300237 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300238}
239
240static int cx18_reg_dev(struct cx18 *cx, int type)
241{
242 struct cx18_stream *s = &cx->streams[type];
243 int vfl_type = cx18_stream_info[type].vfl_type;
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300244 const char *name;
Andy Walls9b4a7c82008-10-18 10:20:25 -0300245 int num, ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300246
Andy Walls754f9962010-12-11 20:38:20 -0300247 if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
Andy Walls9b4a7c82008-10-18 10:20:25 -0300248 ret = cx18_dvb_register(s);
249 if (ret < 0) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300250 CX18_ERR("DVB failed to register\n");
Andy Walls9b4a7c82008-10-18 10:20:25 -0300251 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300252 }
253 }
254
Andy Walls3d059132009-01-10 21:54:39 -0300255 if (s->video_dev == NULL)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300256 return 0;
257
Andy Walls3d059132009-01-10 21:54:39 -0300258 num = s->video_dev->num;
Hans Verkuildd896012008-10-04 08:36:54 -0300259 /* card number + user defined offset + device offset */
260 if (type != CX18_ENC_STREAM_TYPE_MPG) {
261 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
262
Andy Walls3d059132009-01-10 21:54:39 -0300263 if (s_mpg->video_dev)
264 num = s_mpg->video_dev->num
265 + cx18_stream_info[type].num_offset;
Hans Verkuildd896012008-10-04 08:36:54 -0300266 }
Andy Walls5811cf92009-02-14 17:08:37 -0300267 video_set_drvdata(s->video_dev, s);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300268
269 /* Register device. First try the desired minor, then any free one. */
Hans Verkuil6b5270d2009-09-06 07:54:00 -0300270 ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
Andy Walls9b4a7c82008-10-18 10:20:25 -0300271 if (ret < 0) {
Hans Verkuil581644d2009-06-19 11:54:00 -0300272 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
Hans Verkuildd896012008-10-04 08:36:54 -0300273 s->name, num);
Andy Walls3d059132009-01-10 21:54:39 -0300274 video_device_release(s->video_dev);
275 s->video_dev = NULL;
Andy Walls9b4a7c82008-10-18 10:20:25 -0300276 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300277 }
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300278
279 name = video_device_node_name(s->video_dev);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300280
281 switch (vfl_type) {
282 case VFL_TYPE_GRABBER:
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300283 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
284 name, s->name, cx->stream_buffers[type],
Andy Walls22dce182009-11-09 23:55:30 -0300285 cx->stream_buf_size[type] / 1024,
286 (cx->stream_buf_size[type] * 100 / 1024) % 100);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300287 break;
288
289 case VFL_TYPE_RADIO:
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300290 CX18_INFO("Registered device %s for %s\n", name, s->name);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300291 break;
292
293 case VFL_TYPE_VBI:
Andy Walls6ecd86d2008-12-07 23:30:17 -0300294 if (cx->stream_buffers[type])
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300295 CX18_INFO("Registered device %s for %s "
Andy Walls6ecd86d2008-12-07 23:30:17 -0300296 "(%d x %d bytes)\n",
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300297 name, s->name, cx->stream_buffers[type],
Andy Walls6ecd86d2008-12-07 23:30:17 -0300298 cx->stream_buf_size[type]);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300299 else
Laurent Pinchart38c7c032009-11-27 13:57:15 -0300300 CX18_INFO("Registered device %s for %s\n",
301 name, s->name);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300302 break;
303 }
304
305 return 0;
306}
307
308/* Register v4l2 devices */
309int cx18_streams_register(struct cx18 *cx)
310{
311 int type;
Andy Walls9b4a7c82008-10-18 10:20:25 -0300312 int err;
313 int ret = 0;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300314
315 /* Register V4L2 devices */
Andy Walls9b4a7c82008-10-18 10:20:25 -0300316 for (type = 0; type < CX18_MAX_STREAMS; type++) {
317 err = cx18_reg_dev(cx, type);
318 if (err && ret == 0)
319 ret = err;
320 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300321
Andy Walls9b4a7c82008-10-18 10:20:25 -0300322 if (ret == 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300323 return 0;
324
325 /* One or more streams could not be initialized. Clean 'em all up. */
Hans Verkuil3f983872008-05-01 10:31:12 -0300326 cx18_streams_cleanup(cx, 1);
Andy Walls9b4a7c82008-10-18 10:20:25 -0300327 return ret;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300328}
329
330/* Unregister v4l2 devices */
Hans Verkuil3f983872008-05-01 10:31:12 -0300331void cx18_streams_cleanup(struct cx18 *cx, int unregister)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300332{
333 struct video_device *vdev;
334 int type;
335
336 /* Teardown all streams */
337 for (type = 0; type < CX18_MAX_STREAMS; type++) {
Andy Walls7b1dde02009-12-31 01:35:08 -0300338
Andy Walls754f9962010-12-11 20:38:20 -0300339 /* The TS has a cx18_dvb structure, not a video_device */
Andy Walls7b1dde02009-12-31 01:35:08 -0300340 if (type == CX18_ENC_STREAM_TYPE_TS) {
Andy Walls754f9962010-12-11 20:38:20 -0300341 if (cx->streams[type].dvb != NULL) {
342 if (unregister)
343 cx18_dvb_unregister(&cx->streams[type]);
344 kfree(cx->streams[type].dvb);
345 cx->streams[type].dvb = NULL;
Andy Walls7b1dde02009-12-31 01:35:08 -0300346 cx18_stream_free(&cx->streams[type]);
347 }
348 continue;
Hans Verkuilfac36392008-07-18 10:07:10 -0300349 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300350
Andy Walls7b1dde02009-12-31 01:35:08 -0300351 /* No struct video_device, but can have buffers allocated */
352 if (type == CX18_ENC_STREAM_TYPE_IDX) {
Andy Walls0f890ab2011-03-27 20:19:15 -0300353 /* If the module params didn't inhibit IDX ... */
Andy Walls7b1dde02009-12-31 01:35:08 -0300354 if (cx->stream_buffers[type] != 0) {
355 cx->stream_buffers[type] = 0;
Andy Walls0f890ab2011-03-27 20:19:15 -0300356 /*
357 * Before calling cx18_stream_free(),
358 * check if the IDX stream was actually set up.
359 * Needed, since the cx18_probe() error path
360 * exits through here as well as normal clean up
361 */
362 if (cx->streams[type].buffers != 0)
363 cx18_stream_free(&cx->streams[type]);
Andy Walls7b1dde02009-12-31 01:35:08 -0300364 }
365 continue;
366 }
367
368 /* If struct video_device exists, can have buffers allocated */
Andy Walls3d059132009-01-10 21:54:39 -0300369 vdev = cx->streams[type].video_dev;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300370
Andy Walls3d059132009-01-10 21:54:39 -0300371 cx->streams[type].video_dev = NULL;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300372 if (vdev == NULL)
373 continue;
374
375 cx18_stream_free(&cx->streams[type]);
376
Hans Verkuil3f983872008-05-01 10:31:12 -0300377 /* Unregister or release device */
378 if (unregister)
379 video_unregister_device(vdev);
380 else
381 video_device_release(vdev);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300382 }
383}
384
385static void cx18_vbi_setup(struct cx18_stream *s)
386{
387 struct cx18 *cx = s->cx;
Andy Wallsdd073432008-12-12 16:24:04 -0300388 int raw = cx18_raw_vbi(cx);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300389 u32 data[CX2341X_MBOX_MAX_DATA];
390 int lines;
391
392 if (cx->is_60hz) {
393 cx->vbi.count = 12;
394 cx->vbi.start[0] = 10;
395 cx->vbi.start[1] = 273;
396 } else { /* PAL/SECAM */
397 cx->vbi.count = 18;
398 cx->vbi.start[0] = 6;
399 cx->vbi.start[1] = 318;
400 }
401
402 /* setup VBI registers */
Hans Verkuiladd632c2010-03-14 12:24:15 -0300403 if (raw)
404 v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
405 else
406 v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300407
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300408 /*
409 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
410 * VBI when the first analog capture channel starts, as once it starts
411 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
412 * (i.e. for the VBI capture channels). We also send it for each
413 * analog capture channel anyway just to make sure we get the proper
414 * behavior
415 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300416 if (raw) {
417 lines = cx->vbi.count * 2;
418 } else {
Andy Walls812b1f92009-02-08 22:40:04 -0300419 /*
420 * For 525/60 systems, according to the VIP 2 & BT.656 std:
421 * The EAV RP code's Field bit toggles on line 4, a few lines
422 * after the Vertcal Blank bit has already toggled.
423 * Tell the encoder to capture 21-4+1=18 lines per field,
424 * since we want lines 10 through 21.
425 *
Andy Walls5ab74052009-05-10 22:14:29 -0300426 * For 625/50 systems, according to the VIP 2 & BT.656 std:
427 * The EAV RP code's Field bit toggles on line 1, a few lines
428 * after the Vertcal Blank bit has already toggled.
Andy Walls929a3ad2009-05-16 21:06:57 -0300429 * (We've actually set the digitizer so that the Field bit
430 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
431 * lines per field, since we want lines 6 through 23.
Andy Walls812b1f92009-02-08 22:40:04 -0300432 */
Andy Walls929a3ad2009-05-16 21:06:57 -0300433 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300434 }
435
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300436 data[0] = s->handle;
437 /* Lines per field */
438 data[1] = (lines / 2) | ((lines / 2) << 16);
439 /* bytes per line */
Andy Walls302df972009-01-31 00:33:02 -0300440 data[2] = (raw ? vbi_active_samples
441 : (cx->is_60hz ? vbi_hblank_samples_60Hz
442 : vbi_hblank_samples_50Hz));
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300443 /* Every X number of frames a VBI interrupt arrives
444 (frames as in 25 or 30 fps) */
445 data[3] = 1;
Andy Walls302df972009-01-31 00:33:02 -0300446 /*
447 * Set the SAV/EAV RP codes to look for as start/stop points
448 * when in VIP-1.1 mode
449 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300450 if (raw) {
Andy Walls302df972009-01-31 00:33:02 -0300451 /*
452 * Start codes for beginning of "active" line in vertical blank
453 * 0x20 ( VerticalBlank )
454 * 0x60 ( EvenField VerticalBlank )
455 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300456 data[4] = 0x20602060;
Andy Walls302df972009-01-31 00:33:02 -0300457 /*
458 * End codes for end of "active" raw lines and regular lines
459 * 0x30 ( VerticalBlank HorizontalBlank)
460 * 0x70 ( EvenField VerticalBlank HorizontalBlank)
461 * 0x90 (Task HorizontalBlank)
462 * 0xd0 (Task EvenField HorizontalBlank)
463 */
Andy Wallsaf009cf2008-12-12 20:00:29 -0300464 data[5] = 0x307090d0;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300465 } else {
Andy Walls302df972009-01-31 00:33:02 -0300466 /*
467 * End codes for active video, we want data in the hblank region
468 * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
469 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
470 *
471 * Since the V bit is only allowed to toggle in the EAV RP code,
472 * just before the first active region line, these two
Andy Walls812b1f92009-02-08 22:40:04 -0300473 * are problematic:
Andy Walls302df972009-01-31 00:33:02 -0300474 * 0x90 (Task HorizontalBlank)
475 * 0xd0 (Task EvenField HorizontalBlank)
Andy Walls812b1f92009-02-08 22:40:04 -0300476 *
Andy Wallsaf7c58b2009-02-28 20:13:50 -0300477 * We have set the digitzer such that we don't have to worry
478 * about these problem codes.
Andy Walls302df972009-01-31 00:33:02 -0300479 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300480 data[4] = 0xB0F0B0F0;
Andy Walls302df972009-01-31 00:33:02 -0300481 /*
482 * Start codes for beginning of active line in vertical blank
483 * 0xa0 (Task VerticalBlank )
484 * 0xe0 (Task EvenField VerticalBlank )
485 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300486 data[5] = 0xA0E0A0E0;
487 }
488
489 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
490 data[0], data[1], data[2], data[3], data[4], data[5]);
491
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300492 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300493}
494
Andy Wallsef991792009-12-31 18:27:13 -0300495void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
496{
497 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
498 struct cx18_mdl *mdl;
499
500 if (!cx18_stream_enabled(s))
501 return;
502
503 /* Return if the firmware is not running low on MDLs */
504 if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
505 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
506 return;
507
508 /* Return if there are no MDLs to rotate back to the firmware */
509 if (atomic_read(&s->q_full.depth) < 2)
510 return;
511
512 /*
513 * Take the oldest IDX MDL still holding data, and discard its index
514 * entries by scheduling the MDL to go back to the firmware
515 */
516 mdl = cx18_dequeue(s, &s->q_full);
517 if (mdl != NULL)
518 cx18_enqueue(s, mdl, &s->q_free);
519}
520
Andy Walls87116152009-04-13 22:42:43 -0300521static
Andy Walls52fcb3e2009-11-08 23:45:24 -0300522struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
523 struct cx18_mdl *mdl)
Andy Walls66c2a6b2008-12-08 23:02:45 -0300524{
525 struct cx18 *cx = s->cx;
526 struct cx18_queue *q;
527
528 /* Don't give it to the firmware, if we're not running a capture */
529 if (s->handle == CX18_INVALID_TASK_HANDLE ||
Andy Walls87116152009-04-13 22:42:43 -0300530 test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
Andy Walls66c2a6b2008-12-08 23:02:45 -0300531 !test_bit(CX18_F_S_STREAMING, &s->s_flags))
Andy Walls52fcb3e2009-11-08 23:45:24 -0300532 return cx18_enqueue(s, mdl, &s->q_free);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300533
Andy Walls52fcb3e2009-11-08 23:45:24 -0300534 q = cx18_enqueue(s, mdl, &s->q_busy);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300535 if (q != &s->q_busy)
Andy Walls52fcb3e2009-11-08 23:45:24 -0300536 return q; /* The firmware has the max MDLs it can handle */
Andy Walls66c2a6b2008-12-08 23:02:45 -0300537
Andy Walls52fcb3e2009-11-08 23:45:24 -0300538 cx18_mdl_sync_for_device(s, mdl);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300539 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
Andy Walls52fcb3e2009-11-08 23:45:24 -0300540 (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
541 s->bufs_per_mdl, mdl->id, s->mdl_size);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300542 return q;
543}
544
Andy Walls87116152009-04-13 22:42:43 -0300545static
546void _cx18_stream_load_fw_queue(struct cx18_stream *s)
Andy Walls66c2a6b2008-12-08 23:02:45 -0300547{
Andy Wallsabb096d2008-12-12 15:50:27 -0300548 struct cx18_queue *q;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300549 struct cx18_mdl *mdl;
Andy Walls66c2a6b2008-12-08 23:02:45 -0300550
Andy Wallsc37b11b2009-11-04 23:13:58 -0300551 if (atomic_read(&s->q_free.depth) == 0 ||
552 atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
Andy Wallsabb096d2008-12-12 15:50:27 -0300553 return;
Andy Walls66c2a6b2008-12-08 23:02:45 -0300554
Andy Wallsabb096d2008-12-12 15:50:27 -0300555 /* Move from q_free to q_busy notifying the firmware, until the limit */
556 do {
Andy Walls52fcb3e2009-11-08 23:45:24 -0300557 mdl = cx18_dequeue(s, &s->q_free);
558 if (mdl == NULL)
Andy Wallsabb096d2008-12-12 15:50:27 -0300559 break;
Andy Walls52fcb3e2009-11-08 23:45:24 -0300560 q = _cx18_stream_put_mdl_fw(s, mdl);
Andy Wallsc37b11b2009-11-04 23:13:58 -0300561 } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
Andy Walls0ef02892008-12-14 18:52:12 -0300562 && q == &s->q_busy);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300563}
564
Andy Walls87116152009-04-13 22:42:43 -0300565void cx18_out_work_handler(struct work_struct *work)
566{
Andy Walls21a278b2009-04-15 20:45:10 -0300567 struct cx18_stream *s =
568 container_of(work, struct cx18_stream, out_work_order);
Andy Walls87116152009-04-13 22:42:43 -0300569
Andy Walls21a278b2009-04-15 20:45:10 -0300570 _cx18_stream_load_fw_queue(s);
Andy Walls87116152009-04-13 22:42:43 -0300571}
572
Andy Walls52fcb3e2009-11-08 23:45:24 -0300573static void cx18_stream_configure_mdls(struct cx18_stream *s)
574{
575 cx18_unload_queues(s);
576
Andy Walls22dce182009-11-09 23:55:30 -0300577 switch (s->type) {
578 case CX18_ENC_STREAM_TYPE_YUV:
579 /*
580 * Height should be a multiple of 32 lines.
581 * Set the MDL size to the exact size needed for one frame.
582 * Use enough buffers per MDL to cover the MDL size
583 */
Hans Verkuila75b9be2010-12-31 10:22:52 -0300584 s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
Andy Walls22dce182009-11-09 23:55:30 -0300585 s->bufs_per_mdl = s->mdl_size / s->buf_size;
586 if (s->mdl_size % s->buf_size)
587 s->bufs_per_mdl++;
588 break;
Andy Walls127ce5f2009-11-11 00:22:57 -0300589 case CX18_ENC_STREAM_TYPE_VBI:
590 s->bufs_per_mdl = 1;
591 if (cx18_raw_vbi(s->cx)) {
592 s->mdl_size = (s->cx->is_60hz ? 12 : 18)
593 * 2 * vbi_active_samples;
594 } else {
595 /*
596 * See comment in cx18_vbi_setup() below about the
597 * extra lines we capture in sliced VBI mode due to
598 * the lines on which EAV RP codes toggle.
599 */
600 s->mdl_size = s->cx->is_60hz
601 ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
602 : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
603 }
604 break;
Andy Walls22dce182009-11-09 23:55:30 -0300605 default:
606 s->bufs_per_mdl = 1;
607 s->mdl_size = s->buf_size * s->bufs_per_mdl;
608 break;
609 }
Andy Walls52fcb3e2009-11-08 23:45:24 -0300610
611 cx18_load_queues(s);
612}
613
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300614int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
615{
616 u32 data[MAX_MB_ARGUMENTS];
617 struct cx18 *cx = s->cx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300618 int captype = 0;
Andy Wallse46c54a2009-12-31 02:14:51 -0300619 struct cx18_stream *s_idx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300620
Andy Walls540bab92009-12-31 00:26:49 -0300621 if (!cx18_stream_enabled(s))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300622 return -EINVAL;
623
624 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
625
626 switch (s->type) {
627 case CX18_ENC_STREAM_TYPE_MPG:
628 captype = CAPTURE_CHANNEL_TYPE_MPEG;
629 cx->mpg_data_received = cx->vbi_data_inserted = 0;
630 cx->dualwatch_jiffies = jiffies;
Hans Verkuila75b9be2010-12-31 10:22:52 -0300631 cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300632 cx->search_pack_header = 0;
633 break;
634
Andy Wallse46c54a2009-12-31 02:14:51 -0300635 case CX18_ENC_STREAM_TYPE_IDX:
636 captype = CAPTURE_CHANNEL_TYPE_INDEX;
637 break;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300638 case CX18_ENC_STREAM_TYPE_TS:
639 captype = CAPTURE_CHANNEL_TYPE_TS;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300640 break;
641 case CX18_ENC_STREAM_TYPE_YUV:
642 captype = CAPTURE_CHANNEL_TYPE_YUV;
643 break;
644 case CX18_ENC_STREAM_TYPE_PCM:
645 captype = CAPTURE_CHANNEL_TYPE_PCM;
646 break;
647 case CX18_ENC_STREAM_TYPE_VBI:
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300648#ifdef CX18_ENCODER_PARSES_SLICED
Andy Wallsdd073432008-12-12 16:24:04 -0300649 captype = cx18_raw_vbi(cx) ?
650 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300651#else
652 /*
653 * Currently we set things up so that Sliced VBI from the
654 * digitizer is handled as Raw VBI by the encoder
655 */
656 captype = CAPTURE_CHANNEL_TYPE_VBI;
657#endif
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300658 cx->vbi.frame = 0;
659 cx->vbi.inserted_frame = 0;
660 memset(cx->vbi.sliced_mpeg_size,
661 0, sizeof(cx->vbi.sliced_mpeg_size));
662 break;
663 default:
664 return -EINVAL;
665 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300666
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300667 /* Clear Streamoff flags in case left from last capture */
668 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
669
670 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
671 s->handle = data[0];
672 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
673
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300674 /*
675 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
676 * set up all the parameters, as it is not obvious which parameters the
677 * firmware shares across capture channel types and which it does not.
678 *
679 * Some of the cx18_vapi() calls below apply to only certain capture
680 * channel types. We're hoping there's no harm in calling most of them
681 * anyway, as long as the values are all consistent. Setting some
682 * shared parameters will have no effect once an analog capture channel
683 * has started streaming.
684 */
685 if (captype != CAPTURE_CHANNEL_TYPE_TS) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300686 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
687 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
688 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
689 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300690
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300691 /*
692 * Audio related reset according to
693 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
694 */
695 if (atomic_read(&cx->ana_capturing) == 0)
696 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
697 s->handle, 12);
698
699 /*
700 * Number of lines for Field 1 & Field 2 according to
701 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
Andy Wallsf37aa512009-02-07 01:15:44 -0300702 * Field 1 is 312 for 625 line systems in BT.656
703 * Field 2 is 313 for 625 line systems in BT.656
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300704 */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300705 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
Andy Wallsf37aa512009-02-07 01:15:44 -0300706 s->handle, 312, 313);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300707
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300708 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
709 cx18_vbi_setup(s);
710
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300711 /*
Andy Wallse46c54a2009-12-31 02:14:51 -0300712 * Select to receive I, P, and B frame index entries, if the
713 * index stream is enabled. Otherwise disable index entry
714 * generation.
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300715 */
Andy Wallse46c54a2009-12-31 02:14:51 -0300716 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
Andy Walls5ada5772010-01-01 13:25:41 -0300717 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
718 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300719
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300720 /* Call out to the common CX2341x API setup for user controls */
Hans Verkuila75b9be2010-12-31 10:22:52 -0300721 cx->cxhdl.priv = s;
722 cx2341x_handler_setup(&cx->cxhdl);
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300723
724 /*
725 * When starting a capture and we're set for radio,
726 * ensure the video is muted, despite the user control.
727 */
Hans Verkuila75b9be2010-12-31 10:22:52 -0300728 if (!cx->cxhdl.video_mute &&
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300729 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
730 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
Hans Verkuila75b9be2010-12-31 10:22:52 -0300731 (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300732 }
733
Hans Verkuil31554ae2008-05-25 11:21:27 -0300734 if (atomic_read(&cx->tot_capturing) == 0) {
Hans Verkuila75b9be2010-12-31 10:22:52 -0300735 cx2341x_handler_set_busy(&cx->cxhdl, 1);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300736 clear_bit(CX18_F_I_EOS, &cx->i_flags);
Andy Wallsb1526422008-08-30 16:03:44 -0300737 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300738 }
739
740 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
Al Viro990c81c2008-05-21 00:32:01 -0300741 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
742 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300743
Andy Walls66c2a6b2008-12-08 23:02:45 -0300744 /* Init all the cpu_mdls for this stream */
Andy Walls52fcb3e2009-11-08 23:45:24 -0300745 cx18_stream_configure_mdls(s);
Andy Walls87116152009-04-13 22:42:43 -0300746 _cx18_stream_load_fw_queue(s);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300747
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300748 /* begin_capture */
749 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
750 CX18_DEBUG_WARN("Error starting capture!\n");
Andy Walls3b5df8e2008-08-23 18:36:50 -0300751 /* Ensure we're really not capturing before releasing MDLs */
Andy Walls87116152009-04-13 22:42:43 -0300752 set_bit(CX18_F_S_STOPPING, &s->s_flags);
Andy Walls3b5df8e2008-08-23 18:36:50 -0300753 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
754 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
755 else
756 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300757 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
758 /* FIXME - CX18_F_S_STREAMOFF as well? */
Andy Walls3b5df8e2008-08-23 18:36:50 -0300759 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300760 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300761 s->handle = CX18_INVALID_TASK_HANDLE;
Andy Walls87116152009-04-13 22:42:43 -0300762 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
Andy Walls66c2a6b2008-12-08 23:02:45 -0300763 if (atomic_read(&cx->tot_capturing) == 0) {
764 set_bit(CX18_F_I_EOS, &cx->i_flags);
765 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
766 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300767 return -EINVAL;
768 }
769
770 /* you're live! sit back and await interrupts :) */
Andy Wallsdcc0ef82009-02-06 18:33:43 -0300771 if (captype != CAPTURE_CHANNEL_TYPE_TS)
Hans Verkuil31554ae2008-05-25 11:21:27 -0300772 atomic_inc(&cx->ana_capturing);
773 atomic_inc(&cx->tot_capturing);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300774 return 0;
775}
Devin Heitmueller0f4cf672009-11-19 23:23:57 -0300776EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300777
778void cx18_stop_all_captures(struct cx18 *cx)
779{
780 int i;
781
782 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
783 struct cx18_stream *s = &cx->streams[i];
784
Andy Walls540bab92009-12-31 00:26:49 -0300785 if (!cx18_stream_enabled(s))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300786 continue;
787 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
788 cx18_stop_v4l2_encode_stream(s, 0);
789 }
790}
791
792int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
793{
794 struct cx18 *cx = s->cx;
795 unsigned long then;
796
Andy Walls540bab92009-12-31 00:26:49 -0300797 if (!cx18_stream_enabled(s))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300798 return -EINVAL;
799
800 /* This function assumes that you are allowed to stop the capture
801 and that we are actually capturing */
802
803 CX18_DEBUG_INFO("Stop Capture\n");
804
Hans Verkuil31554ae2008-05-25 11:21:27 -0300805 if (atomic_read(&cx->tot_capturing) == 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300806 return 0;
807
Andy Walls87116152009-04-13 22:42:43 -0300808 set_bit(CX18_F_S_STOPPING, &s->s_flags);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300809 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
810 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
811 else
812 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
813
814 then = jiffies;
815
816 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
817 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
818 }
819
Hans Verkuil31554ae2008-05-25 11:21:27 -0300820 if (s->type != CX18_ENC_STREAM_TYPE_TS)
821 atomic_dec(&cx->ana_capturing);
822 atomic_dec(&cx->tot_capturing);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300823
824 /* Clear capture and no-read bits */
825 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
826
Andy Wallsf68d0cf2008-11-05 21:19:15 -0300827 /* Tell the CX23418 it can't use our buffers anymore */
828 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
829
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300830 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
Andy Wallsd3c5e702008-08-23 16:42:29 -0300831 s->handle = CX18_INVALID_TASK_HANDLE;
Andy Walls87116152009-04-13 22:42:43 -0300832 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300833
Hans Verkuil31554ae2008-05-25 11:21:27 -0300834 if (atomic_read(&cx->tot_capturing) > 0)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300835 return 0;
836
Hans Verkuila75b9be2010-12-31 10:22:52 -0300837 cx2341x_handler_set_busy(&cx->cxhdl, 0);
Andy Wallsb1526422008-08-30 16:03:44 -0300838 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300839 wake_up(&s->waitq);
840
841 return 0;
842}
Devin Heitmueller0f4cf672009-11-19 23:23:57 -0300843EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300844
845u32 cx18_find_handle(struct cx18 *cx)
846{
847 int i;
848
849 /* find first available handle to be used for global settings */
850 for (i = 0; i < CX18_MAX_STREAMS; i++) {
851 struct cx18_stream *s = &cx->streams[i];
852
Andy Walls3d059132009-01-10 21:54:39 -0300853 if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300854 return s->handle;
855 }
Andy Wallsd3c5e702008-08-23 16:42:29 -0300856 return CX18_INVALID_TASK_HANDLE;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300857}
Andy Wallsee2d64f2008-11-16 01:38:19 -0300858
859struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
860{
861 int i;
862 struct cx18_stream *s;
863
864 if (handle == CX18_INVALID_TASK_HANDLE)
865 return NULL;
866
867 for (i = 0; i < CX18_MAX_STREAMS; i++) {
868 s = &cx->streams[i];
869 if (s->handle != handle)
870 continue;
Andy Walls540bab92009-12-31 00:26:49 -0300871 if (cx18_stream_enabled(s))
Andy Wallsee2d64f2008-11-16 01:38:19 -0300872 return s;
873 }
874 return NULL;
875}